Sony CSX-V58MP User manual

1
Model Name Using Similar Mechanism NEW
CD Drive Mechanism Type MG-383KA-121//K
Optical Pick-up Name KSS-720A
E Model
SYSTEM UP VCD/MP3 PLAYER
System Compact disc digital audio
system
Signal format system NTSC/PAL switchable
Frequency response 20 – 20,000 Hz
Wow and flutter Below the measurable limit
Signal-to-noise ratio 85 dB
Outputs Audio outputs (left/right)
Video output
BUS control output
Power requirement 12 V DC car battery
(negative ground)
Current drain 0.9 A (during disc playback)
1.8 A (during loading or ejecting
a disc)
Operating temperature –10 °C to +55 °C
Dimensions Approx. 178 ×50 ×172 mm
(w/h/d)
Mounting Dimensions Approx. 178 ×50 ×154 mm
(w/h/d)
Mass Approx. 1.3 kg
Supplied accessories Parts for installation and
connections (1 set)
Design and specifications are subject to change without notice .
SPECIFICATIONS
• The CD section have no adjustments.
Sony Corporation
e Vehicle Company
Published by Sony Engineering Corporation
9-874-103-02
2002K0400-1
© 2002. 11
SERVICE MANUAL
CSX-V58MP
Ver 1.1 2002. 11
•Sony BUS system compatible VCD/MP3
Player.
•MP3 file playback (recorded in the ISO9660
level 1 or 2 format, or Joliet or Romeo in the
expansion format or in Multi Session)
•CD-R/CD-RW which can have a session
added can be played.
•Discs recorded in Multi Session (CD-Extra,
Mixed mode CD, etc.) can be played,
depending on the recording method.
Features

2
CSX-V58MP
SERVICE NOTES
If the optical pick-up block is defective, please replace the whole
optical pick-up block.
Never turn the semi-fixed resistor located at the side of optical
pick-up block.
CAUTION
Use of controls or adjustments or performance of procedures
other than those specified herein may result in hazardous
radiation exposure.
NOTES ON HANDLING THE OPTICAL PICK-UP BLOCK
OR BASE UNIT
The laser diode in the optical pick-up block may suffer electrostatic
breakdown because of the potential difference generated by the
charged electrostatic load, etc. on clothing and the human body.
During repair, pay attention to electrostatic breakdown and also use
the procedure in the printed matter which is included in the repair
parts.
The flexible board is easily damaged and should be handled with
care.
NOTES ON LASER DIODE EMISSION CHECK
The laser beam on this model is concentrated so as to be focused on
the disc reflective surface by the objective lens in the optical pick-
up block. Therefore, when checking the laser diode emission, ob-
serve from more than 30 cm away from the objective lens.
Notes on Chip Component Replacement
•Never reuse a disconnected chip component.
•Notice that the minus side of a tantalum capacitor may be dam-
aged by heat.
optical pick-up bloc
k
semi-fixed resistor
TEST DISCS
This set can playback CD-R and CD-ROM discs. The following
test discs should be used to check the capability:
CD-R test disc TCD-R082LMT (Part No. J-2501-063-1)
CD-RW test disc TCD-W082L (Part No. J-2501-063-2)
Notes on CD-R/CD-RW discs
•You can play CD-Rs (recordable CDs)/CD-RWs (rewritable CDs)
designed for audio use on this unit.
Look for these marks to distinguish CD-Rs/CD-RWs for audio
use.
These marks denote that a disc is not for audio use.
•Some CD-Rs/CD-RWs (depending on the equipment used for
its recording or the condition of the disc) may not play on this
unit.
•You cannot play a CD-R/a CD-RW that is not finalized∗.
∗A process necessary for a recorded CD-R/CD-RW disc to be
played on the audio CD player.
SAFETY-RELATED COMPONENT WARNING!!
COMPONENTS IDENTIFIED BY MARK 0OR DOTTED LINE
WITH MARK 0ON THE SCHEMATIC DIAGRAMS AND IN
THE PARTS LIST ARE CRITICAL TO SAFE OPERATION.
REPLACE THESE COMPONENTS WITH SONY PARTS WHOSE
PART NUMBERS APPEAR AS SHOWN IN THIS MANUAL OR
IN SUPPLEMENTS PUBLISHED BY SONY.

3
CSX-V58MP
MAIN BOARD CNP701
SERVO BOARD CN519
J-2502-011-1
EXTENSION CABLE AND SERVICE POSITION
Whenrepairing or servicingthis set,connect the jig(extensioncable)
as shown below.
•Connect the MAIN board (CNP701) and the SERVO board
(CN519) with the extension cable (Part No. J-2502-011-1).

4
TABLE OF CONTENTS
1. GENERAL............................................................................ 5
2. DISASSEMBLY
2-1. Front Panel Assy ................................................................. 7
2-2. CD Mechanism Block ......................................................... 8
2-3. Main Board ......................................................................... 8
2-4. Chassis (T) Sub Assy .......................................................... 9
2-5. Lever Section....................................................................... 9
2-6. Servo Board....................................................................... 10
2-7. Shaft Roller Assy, Load SW Board................................... 10
2-8. Floating Block Assy .......................................................... 11
2-9. Optical Pick-up Block ....................................................... 11
3. DIAGRAMS
3-1. IC Pin Descriptions ........................................................... 12
3-2. Circuit Boards Location .................................................... 19
3-3. Block Diagram –CD Section–........................................... 20
3-4. Block Diagram –MPEG Section– ..................................... 21
3-5. Block Diagram –Main Section–........................................ 22
3-6. Printed Wiring Board –CD Mechanism Section (1/2)– .... 24
3-7. Printed Wiring Boards –CD Mechanism Section (2/2)–... 25
3-8. Schematic Diagram –CD Mechanism Section (1/3)– ....... 26
3-9. Schematic Diagram –CD Mechanism Section (2/3)– ....... 27
3-10. Schematic Diagram –CD Mechanism Section (3/3)– ....... 28
3-11. Printed Wiring Board –Main Section– .............................. 29
3-12. Schematic Diagram –Main Section–................................. 30
3-13. Printed Wiring Board –Control Section– .......................... 31
3-14. Schematic Diagram –Control Section– ............................. 31
3-15. IC Block Diagrams............................................................ 32
4. EXPLODEDVIEWS
4-1. Chassis Section ................................................................. 34
4-2. CD Mechanism Section (1) ............................................... 35
4-3. CD Mechanism Section (2) ............................................... 36
4-4. CD Mechanism Section (3) ............................................... 37
5. ELECTRICAL PARTS LIST......................................... 38
CSX-V58MP

5
CSX-V58MP
SECTION 1
GENERAL This section is extracted
from instruction manual.
Location of controls and indication lights
CSX-V58MP
1PAUSE indication
lights up while the unit is pausing a disc.
2DISC IN indication
lights up when a disc is in the unit.
3VCD indication
lights up when a Video CD is in the unit.
4MP3 indication
lights up when the disc in the unit contains
MP3 files.
5CD indication
lights up when an audio CD is in the unit.
6PAUSE (X) button
To pause disc playback.
7NTSC/PAL select switch (located on the
bottom of the unit)
This unit conforms to the NTSC/PAL colour
system by setting the select switch to NTSC
or PAL. The TV colour system of this unit is
factory-set to the NTSC position. See
“NTSC/PAL select switch”in the
Installation/Connections manual.
8EJECT (Z) button
To eject a disc from the unit.
Tip
This unit must be connected to an optional Sony
master unit with BUS control functions, such as the
recommended Media Center/Receiver XAV-7W.

6
CSX-V58MP
Connections
Cautions
•This unit is designed for negative earth 12 V
DC operation only.
•Do not get the wires under a screw, or caught
in moving parts (e.g., seat railing).
•Before making connections, turn the car
ignition off to avoid short circuits.
•Read carefully the Installation/Connections
manual supplied with both this unit and
optional units, before making connections.
•Be sure to insulate any loose unconnected
wires with electrical tape for safety.
•For your safety, the monitor connected to the
VIDEO OUT of this unit can only be viewed
when the car is stopped and the parking brake
is applied.
Be sure to connect the parking brake cord 8
(light green) to the car’s parking brake switch
cord.
Parts Iist (1)
The numbers in the list are keyed to those in the
instructions.
The supplied tool qs is necessary for removing
the unit. For details, refer to “Removing the
unit”in the supplied operating instructions.
Caution
Handle the bracket 1carefully to avoid injuring
your fingers.
TOP
Connection example (2)
This unit must be connected to an optional Sony
master unit with BUS control functions, such as
Media Center/Receiver XAV-7W.
To use the unit with:
— an optional Media Center/Receiver XAV-7W
connected (A).
— an optional monitor and an optional Sony
BUS compatible master unit connected (B).
Connection diagram (3)
Connecting the parking brake
cord (4)
Be sure to connect the parking brake cord 8
(light green) to the car’s parking brake switch
cord, whose mounting position depends on your
car. Please consult your car dealer or your
nearest Sony dealer for further details.
Using the pressure terminal
Clasp the end of the parking brake cord 8(light
green) and the car’s parking brake switch cord
with the pressure terminal 7.
Note
If the car’s parking brake switch cord is too thin,
connect the parking brake cord
8 (light green) to
the car’s parking brake switch cord directly without
using the pressure terminal
7 .

7
CSX-V58MP
SECTION 2
DISASSEMBLY
Note : This equipment can be removed using the following procedure.
Note : Follow the disassembly procedure in the numerical order given.
2-1. FRONT PANEL ASSY
2-1. FRONT PANEL ASSY
(Page 7)
2-2. CD MECHANISM BLOCK
(Page 8)
2-4. CHASSIS (T) SUB ASSY
(Page 9)
2-5. LEVER SECTION
(Page 9)
2-7. SHAFT ROLLER ASSY,
LOAD SW BOARD
(Page 10)
2-8. FLOATING BLOCK ASSY
(Page 11)
2-9. OPTICAL PICK-UP BLOCK
(Page 11)
SET
2-6. SERVO BOARD
(Page 10)
2-3. MAIN BOARD
(Page 8)
4 cla
w
6 flexible flat cable (8P)
7 front panel assy
3 claw
1 PTT 2.6x6
2 PTT 2.6x6
5

8
CSX-V58MP
2-2. CD MECHANISM BLOCK
2-3. MAIN BOARD
1 PTT 2.6x6
7 PTT 2.6x
6
8 bracket (CD)
2 PTT 2.6x6
3 PTT 2.6x6
6 CD mechanism block
5 CNP701
4
1 PTT 2.6x8
3 PTT 2.6x6
4 PTT 2.6x6
5 PTT 2.6x6
7 screw (+BTT)
8 screws (+BTT)
6 back chassis
2 PTT 2.6x8
9 MAIN board

9
CSX-V58MP
2-5. LEVER SECTION
2-4. CHASSIS (T) SUB ASSY
6 chassis (T) sub assy
5 P 2x3
1 special screws
2 heat sink (CD)
4 P 2x3
3 Unsolder the
lead wires.
black
red
white
4 claws
2 IN SELF SW board
7 lever (L)
3 tension spring (LR)
6 lever (R)
5 guide (disc)
1 special screw

10
CSX-V58MP
2-6. SERVO BOARD
2-7. SHAFT ROLLER ASSY, LOAD SW BOARD
7 special screw
1 CN517
3 Removal the solders.
5 P 2x3
6 LO motor sub assy
(M903)
8 SERVO board
2 CN518
4 Unsolder the
lead wires.
yellow
black
Fig. 1
1 tension spring (RA)
2 arm (roller)
3 retaining ring (RA)
4 shaft retainer (roller)
5 shaft roller assy
6 special screw
7 LOAD SW board
retaining ring
(RA) arm arm
washer washer shaft retainer
(roller)
shaft retainer (roller)

11
CSX-V58MP
2-9. OPTICAL PICK-UP BLOCK
2-8. FLOATING BLOCK ASSY
1 tension spring (KF1)
7 compression spring (FL)
6 floating block assy
8 compression spring (FL)
4 Fit lever (D) in the
direction of the arrow.
2 damper (T)
3 damper (T)
5 Turn loading ring in the
direction of the arrow.
1 P 2x3
3 P 2x3
2 sled motor assy
(M902)
7 optical pick-up block
6 pick-up flexible board
4 plate spring (feed)
5 shaft (feed) assy

12
CSX-V58MP SECTION 3
DIAGRAMS
3-1. IC PIN DESCRIPTIONS
• IC513 CXP81960M-672R (CD SYSTEM CONTROL) (SERVO BOARD (2/3))
Pin No. Pin Name I/O Pin Description
1A_MUTE O Audio mute control output
2N.C — Not used. (Open)
3CD_ON O CD servo power supply control output (H: Power on)
4RW/R O RF amplifier gain control output (H: CD-RW, L: CD-R/CD-DA)
5SLD_MINUS O Sled motor control output
6SELF_SW I Disc self store switch (SW2) input
7E/(U) I Destination initial setting input (Fixed at H in this set)
8PH1 I Photo coupler input 1 (Not used in this set)
9SDAI/OI
2C interface data input/output for video encoder IC (IC518).
10 SCL O I2C interface clock output for video encoder IC (IC518).
11 H_WAIT I Wait input from MPEG decoder IC (IC514).
12 H_INT I Interruption input from MPEG decoder IC (IC514).
13 to 20 HDATA7 to 0 I/O Host data 7 to 0 input/output for MPEG decoder IC (IC514).
21 EMPH_O O D/A converter emphasis control output for DSP IC (IC516).
22 CD_DATA O Data output for DSP IC (IC516).
23 CD_XTAL O System latch output for DSP IC (IC516).
24 CD_CKO O Clock output for DSP IC (IC516).
25 D_SW I Down switch (SW5) input
26 N.C — Not used. (Connect to VDD in this set)
27 LIMIT_SW I Sled limit switch (SW4) input (L: ON)
28 SUBQ I CD sub-Q serial data input from DSP IC (IC516).
29 N.C — Not used. (Open)
30 SQCK O Sub-Q clock output for DSP IC (IC516).
31 N.C — Not used. (Open)
32 MSRQ O Serial request output for master microcomputer (IC801).
33 N.C — Not used. (Open)
34 CD_RST O CD reset output for DSP IC (IC516). (L: Reset)
35, 36 N.C — Not used. (Open)
37 MP I Not used. (Connect to VSS in this set)
38 RESET I Slave microcomputer hard reset input from master microcomputer (IC801).
39 VSS — Ground
40 XTAL O Crystal oscillation output (12 MHz)
41 EXTAL I Crystal oscillation input (12 MHz)
42 N.C — Not used. (Connect to VDD in this set)
43 TEXT_IN I CD text deter input
44 N.C — Not used. (Open)
45 TEXT_CLK O CD text clock output
46 to 49 N.C — Not used. (Open)
50 AVSS — Analog ground
51 AVREF — Analog reference voltage input
52 AVDD — Analog power supply pin (+3.3 V)
53 GFS/MNT2_SEL I GFS/MNT2 select input from DSP IC (IC516). (Fixed at H in this set)
54 PH2 I Photo coupler input 2 (Fixed at H in this set)
55 FOK I Focus OK input from DSP IC (IC516).
56 GFS I Guard frame synchro input from DSP IC (IC516).
57, 58 N.C — Not used. (Connect toVSS in this set)
59 TEMP_H I Not used. (Open)
60 TEMP_L I Not used. (Open)
61 LOCK I LOCK input from DSP IC (IC516).
62 TEST_MODE I Not used. (Fixed at H in this set)

13
CSX-V58MP
Pin No. Pin Name I/O Pin Description
63 SENS I Sensitivity input from DSP IC (IC516).
64 IN_SW I Disc in switch (SW3) input
65, 66 N.C — Not used. (Connect to VDD in this set)
67 MP3 I MP3 playback control input (Fixed at L in this set)
68 PH3 I Photo coupler input 3 (Not used in this set)
69 SCLK O Serial clock output for DSP IC (IC516).
70 LM_LOADING O Loading motor loading (CD tray close) output
71 TV_RST O Reset output for video encoder IC (IC518).
72 N.C — Not used. (Open)
73 TE_CANCEL O Tracking error offset cancel output for RF amplifier IC (IC511).
74 FE_CANCEL O Focus error offset cancel output for RF amplifier IC (IC511).
75 BU_IN I Back-up power supply input
76 SCOR I SCOR input from DSP IC (IC516).
77 MSO I Serial input from master microcomputer (IC801).
78 MSI O Serial output for master microcomputer (IC801).
79 MSC I Serial clock input from master microcomputer (IC801).
80 MCS I Chip select input from master microcomputer (IC801).
81 LM_EJECT O Loading motor eject (CD tray open) output
82 DRV_OE O Mute control output for coil/motor drive IC (IC512).
83 MD2 O Check output for operation mode. (Not used in this set)
84 TEX I Not used. (Connect to VSS in this set)
85 TX O Not used. (Open)
86 VSS — Digital ground
87 VDD — Digital power supply pin (+3.3 V)
88 N.C — Not used. (Connect to VDD in this set)
89 H_R/W O Read/Write select output for MPEG decoder IC (IC514). (H: Read, L: Write)
90 H_RD O Mode select output for MPEG decoder IC (IC514) at read. (H: Multiflux, L: Individual)
91 to 93 HADDR2 to 0 O Host address 2 to 0 output for MPEG decoder IC (IC514).
94 H_CS O Host chip select output for MPEG decoder IC (IC514).
95 N.C — Not used. (Open)
96 H_RST O Host reset output for MPEG decoder IC (IC514).
97 to 99 N.C — Not used. (Open)
100 CDM_ON O CD mechanism deck loading motor power supply control output

14
CSX-V58MP
• IC514 CL8830-PE0 (MPEG DECODER) (SERVO BOARD (3/3))
Pin No. Pin Name I/O Pin Description
1RESERVED I Not used. (Fixed at L in this set)
2 to 4 HDATA0 to 2 I/O 8-bit bi-directional host data bus 0 to 2 input/output for CD system control IC (IC513).
5VDD — Power supply pin (+3.3 V)
6HDATA3I/O 8-bit bi-directional host data bus 3 input/output for CD system control IC (IC513).
7VSS — Ground
8 to 11 HDATA4 to 7 I/O 8-bit bi-directional host data bus 4 to 7 input/output for CD system control IC (IC513).
12 VDD2.5 — Power supply pin (+2.5V)
13 RESET I Hardware reset input from CD system control IC (IC513).
14 VSS — Ground
15 WAIT O Host wait output for CD system control IC (IC513).
16 INT O Host interrupt output for CD system control IC (IC513).
17 VDD — Power supply pin (+3.3V)
18 NC O Not used. (Open)
19 VSS — Ground
20 to 26 NC O Not used. (Open)
27 VDD — Power supply pin (+3.3V)
28 NC O Not used. (Open)
29 VSS — Ground
30 to 35 NC O Not used. (Open)
36 VDD — Power supply pin (+3.3V)
37 NC O Not used. (Open)
38 VSS — Ground
39 NC O Not used. (Open)
40 VDD2.5 — Power supply pin (+2.5V)
41 NC O Not used. (Open)
42 VSS — Ground
43 to 46 NC O Not used. (Open)
47 VDD — Power supply pin (+3.3V)
48 NC O Not used. (Open)
49 VSS — Ground
50, 51 NC O Not used. (Open)
52 RESERVED I Not used. (Fixed at L in this set)
53, 54 MDATA15, 0 I/O Memory data 15 and 0 input/output
55 VDD — Power supply pin (+3.3V)
56 MDATA14 I/O Memory data 14 input/output
57 VSS — Ground
58 to 60 MDATA1, 13, 2 I/O Memory data 1, 13 and 2 input/output
61 VDD — Power supply pin (+3.3V)
62 MDATA12 I/O Memory data 12 input/output
63 VSS — Ground
64 MDATA3 I/O Memory data 3 input/output
65 VDD2.5 — Power supply pin (+2.5V)
66 MDATA11 I/O Memory data 11 input/output
67 VSS — Ground
68 MDATA4 I/O Memory data 4 input/output
69 VDD — Power supply pin (+3.3V)
70 MDATA10 I/O Memory data 10 input/output
71 VSS — Ground
72 to 74 MDATA5, 9, 6 I/O Memory data 5, 9 and 6 input/output
75 VDD — Power supply pin (+3.3V)
76 MDATA8 I/O Memory data 8 input/output
77 VSS — Ground

15
CSX-V58MP
Pin No. Pin Name I/O Pin Description
78 MDATA7 I/O Memory data 7 input/output
79 LDQM O SDRAM LDQM output for DRAM IC (IC520).
80 UDQM O SDRAM UDQM output for DRAM IC (IC520).
81 VDD — Power supply pin (+3.3 V)
82 MWE O SDRAM write enable output for DRAM IC (IC520).
83 VSS — Ground
84 SD-CLK O SDRAM system clock output for DRAM IC (IC520).
85 SD-CAS O SDRAM column address output for DRAM IC (IC520).
86 SD-RAS O SDRAM row address output for DRAM IC (IC520).
87 VDD — Power supply pin (+3.3 V)
88 SD-CS1 O SDRAM bank select 1 output for DRAM IC (IC520). (Not used in this set)
89 VSS — Ground
90 SD-CS0 O SDRAM bank select 0 output for DRAM IC (IC520).
91 VDD2.5 — Power supply pin (+2.5 V)
92 NC O Not used. (Open)
93 VSS — Ground
94 NC O Not used. (Open)
95 VDD — Power supply pin (+3.3 V)
96 MADDR9 O Memory address 9 output
97 VSS — Ground
98 to 100 MADDR11, 8, 10 O Memory address 11, 8 and 10 output
101 VDD — Power supply pin (+3.3 V)
102 MADDR7 O Memory address 7 output
103 VSS — Ground
104 to 106 MADDR0, 6, 1 O Memory address 0, 6 and 1 output
107 VDD — Power supply pin (+3.3 V)
108 MADDR5 O Memory address 5 output
109 VSS — Ground
110 to 112 MADDR2, 4, 3 O Memory address 2, 4 and 3 output
113 VDD — Power supply pin (+3.3 V)
114 MADDR12 O Memory address 12 output
115 VSS — Ground
116 MADDR13 O Memory address 13 output
117 VDD2.5 — Power supply pin (+2.5V)
118 MADDR14 O Memory address 14 output
119 VSS — Ground
120 to 122 MADDR15 to 17 O Memory address 15 to 17 output
123 VDD — Power supply pin (+3.3 V)
124 MADDR18 O Memory address 18 output
125 VSS — Ground
126, 127 MADDR19, 20 O Memory address 19 and 20 output (Not used in this set)
128 ROM-CS O ROM chip select output for ROM IC (IC521).
129 RESERVED I Not used. (Fixed at L in this set)
130 NC O Not used. (Open)
131, 132 GND — Ground
133 RESERVED I Not used. (Fixed at L in this set)
134 VDD — Power supply pin (+3.3 V)
135 RESERVED I Not used. (Fixed at L in this set)
136 VSS — Ground
137 to 141 RESERVED I Not used. (Fixed at L in this set)
142, 143 VDATA0, 1 O Video data bus 0 and 1 output
144 VDD2.5 — Power supply pin (+2.5V)
145 VDATA2 O Video data bus 2 output

16
CSX-V58MP
Pin No. Pin Name I/O Pin Description
146 VSS — Ground
147 RESERVED I Not used. (Fixed at L in this set)
148 VDATA3 O Video data bus 3 output
149 VDD — Power supply pin (+3.3V)
150 VDATA4 O Video data bus 4 output
151 VSS — Ground
152 VDATA5 O Video data bus 5 output
153 RESERVED I Not used. (Fixed at L in this set)
154, 155 VDATA6, 7 O Video data bus 6 and 7 output
156 RESERVED I Not used. (Fixed at L in this set)
157 HSYNC I/O Horizontal sync input/output
158 VSYNC I/O Vertical sync input/output
159 NC O Not used. (Open)
160 VDD — Power supply pin (+3.3V)
161 NC O Not used. (Open)
162 VSS — Ground
163 DA-DATA1 O Serial audio samples relative to DA-BCK clock.
164 DA-DATA2 O Serial audio samples relative to DA-BCK clock. (Not used in this set)
165 NC O Not used. (Open)
166 DA-LRCK O PCM left-right clock output
167 DA-BCK O PCM bit clock output
168 VDD2.5 — Power supply pin (+2.5 V)
169 DA-XCK O Audio external frequency clock output
170 VSS — Ground
171 DAI-DATA I PCM data (two channels) input (Not used in this set)
172 DAI-LRCK I PCM left-right clock input (Not used in this set)
173 DAI-BCK I PCM bit clock input (Not used in this set)
174 RESERVED I Not used. (Fixed at L in this set)
175 VDD — Power supply pin (+3.3V)
176 A-VDD — Analog power supply pin (+3.3 V)
177 VCLK I Video clock input
178 SYSCLK I System clock input
179 A-VSS — Analog ground
180 CD-DATA I Serial CD data input
181 VDD — Power supply pin (+3.3V)
182 CD-LRCK I Programmable polarity 16-bit word synchronization to the decoder (right channel HIGH).
183 VSS — Ground
184 CD-BCK I CD bit clock input
185 CD-C2PO I Asserted HIGH indicated a corrupted byte (Fixed at L in this set)
186 to 190 RESERVED I Not used. (Fixed at L in this set)
191 NC O Not used. (Open)
192 RESERVED I Not used. (Fixed at L in this set)
193 VDD — Power supply pin (+3.3V)
194 NC O Not used. (Open)
195 VSS — Ground
196 VSS1 — Ground
197 VDD2.5 — Power supply pin (+2.5 V)
198 VSS1 — Ground
199 VSS — Ground
200 VSS1 — Ground
201 HOST8SEL I Host select input
202 to 204 HADDR0 to 2 I Host address bus 0 to 2 input
205 DTACKSEL I Data acknowledge select input

17
CSX-V58MP
Pin No. Pin Name I/O Pin Description
206 CS I Host chip select input
207 R/W I Read/write strobe input in I mode.
208 RD I Read strobe input in M mode.

18
CSX-V58MP
• IC801 µPD780076GK-542-9ET (MASTER CONTROL) (MAIN BOARD)
Pin No. Pin Name I/O Pin Description
1—INot used. (Open)
2CDDA_LED O CD LED control output
3 to 5 — I Not used. (Open)
6P_MSRQ I Serial request input from CD system control IC (IC513).
7P_SYS_RESET O Slave microcomputer hard reset output for CD system control IC (IC513).
8P_MCS O Chip select output for CD system control IC (IC513).
9VSS0 — Ground
10 VDD0 — Power supply pin (+5 V)
11 PAUSE_ON_LED O PAUSE LED control output
12 VCD_IN_LED O VCD LED control output
13 MP3_IN_LED O MP3 LED control output
14 CD_IN_LED O DISC IN LED control output
15 P_MSI I Serial input from CD system control IC (IC513).
16 P_MSO O Serial output for CD system control IC (IC513).
17 P_MCLK O Serial clock output for CD system control IC (IC513).
18 UNI_SI I SONY BUS serial input from BUS interface IC (IC803).
19 UNI_SO O SONY BUS serial output for BUS interface IC (IC803).
20 UNI_CKI I SONY BUS serial clock input from BUS interface IC (IC803).
21 UNI_DATA_CHK I SONY BUS serial data check input from BUS interface IC (IC803).
22 LINK_OFF O Link off output for bus interface IC (IC803).
23 — I Not used. (Open)
24 VDD1 — Power supply pin (+5 V)
25 AVSS — Analog ground
26 to 29 — I Not used. (Open)
30 EJECT/PAUSE I Key input (EJECT and PAUSE)
31 TEST I Test pin
32 P_PARK I Parking brake signal input
33 — I Not used. (Open)
34 AVREF — Power supply (minus) pin forA/D converter.
35 AVDD — Power supply (plus) pin for A/D converter.
36 RESET I Master reset input
37 XT2 O Sub clock output (Not used in this set)
38 XT1 I Sub clock input (Not used in this set)
39 IC — Not used. (Connect to VSS in this set)
40 X2 O Master clock output (8.38 MHz)
41 X1 I Master clock input (8.38 MHz)
42 VSS1 — Ground
43 KEY_ACK I Key acknowledge detection input
44 BUS_ON I BUS ON signal input
45 SELF_SW I Disc self store switch (SW2) input
46 BU_IN I Back-up power supply detection input
47 MUTE O Mute on control output
48 ILL_ON O Illumination power supply control output
49 PAL/NTSC I PAL/NTSC select output (L: NTSC, H: PAL)
50 to 64 — I Not used. (Open)

19 19
CSX-V58MP
IN SELF SW board
LOAD SW board SERVO board
SL SW board
MAIN board
CONTROL board
3-2. CIRCUIT BOARDS LOCATION

2020
CSX-V58MP
3-3. BLOCK DIAGRAM — CD SECTION —
MAIN
SECTION
C
MPEG
SECTION
B
MPEG
SECTION
A
MAIN
SECTION
D
A
TRACKING
COIL
FOCUS
COIL
OPTICAL PICK-UP
BLOCK
(KSS-720A)
M
M
LOADING
MOTOR
SPINDLE
MOTOR
SW2
(SELF)
SW3
(DISC IN)
SW5
(DOWN)
B
C
D
PD
E
F
A
B
C
D
PD
LD
VC
E
F
6
12
13
10
11
8
9
5
4
M6SLED
MOTOR
DRIVE
LD
DRIVE
Q511
SLED
SERVO
TRACKING
SERVO
FOCUS
SERVO
TRACKING
COIL
DRIVE
FOCUS
COIL
DRIVE
SPINDLE
MOTOR
DRIVE
LOADING
MOTOR
DRIVE
7
18
22
21
25
24
1
2
34
35
31
32
61 92
95
86
7
8
9
2
1
30
11
10
12
16
14
A + B + C + D
A + C B + D
VCA EFM
DEM SERIAL
I/F PWM AMP
PWM
SUB CODE
PROCESSOR
CPU
I/F
AMP
A
+
B
+
C
+
D
COMP
COMP
D/A
I/F
EQ
AMP
APC
23
52
54
50
51
49
22
38
39
40
41
42
43
35
13
80
82
78
79
81
77
23
84
34
22
7
6
24
13
15
14
16
17
32
56
6
43
30
45
28
76
24
23
22
63
69
55
11 34
82
5
4
70
81
21
61
64
25
I - V
CONV
SFDR
SRDR
TFDR
TRDR
FFDR
FRDR
MDP
LM+
LM-
MDP
SE
CE
VC
TE
FE
RFDC
RFAC
FE
TE
RW/R
VC
RFDCO
RFAC
FOK
DATA
CLOK
XLAT
SENS
SCLK
XRST
CD_DATA
CD_CKO
CD_XTAL
SENS
FOK
LM_EJECT
LM_LOADING
RW/R
SLD_MINUS
DRV_OE
CD_RST
SCOR
SQCK
SQSO
FOK
GFS
SCOR
TEXT_CLK
SQCK
SUBQ
TEXT_IN
GFS
SELF_SW
IN_SW
LOCK
EMPHI
C2PO
LRCK
BCK
LRCKI
BCKI
XTAI
PCMDI
PCMD
NC
CD LRCK
SELF SW
DA LRCK
DA BCK
DA DATA
DA XCK
CD PCMD
CD BCK
LOCK
EMPH_O
SCLK
INV.
IC515
L-CH
R-CH
A/D
CONV
CLV
SERVO
CD SYSTEM CONTROL
IC513 (1/2)
D_SW
7
E/(U)
SW4
(LIMIT)
27
LIMIT_SW
DSP
IC516
RF SIGNAL
PROCESSOR
IC511
AMP
A
B
C
D
E
F
PD
LD
VREF-IN
TR+
TR–
F+
F–
LD
FOCUS/TRACKING COIL DRIVE,
SLED/SPINDLE/LOADING MOTOR DRIVE
IC512
M902
SLED MOTOR
MUTE1
MUTE2
M901
M903
Signal path
: CD AUDIO
VO4+
VO4-
VO3+
VO3-
VIN4+
VIN4-
VIN3+
VIN3-
VO2+
VO2-
VIN2+
VIN2-
VO1+
VO1- VIN1-B
VL0+
VLO-
FWD
REV
4 2
53
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