Spectrum Digital Davinci-DM6446 Use and care manual

Davinci-DM644x
Evaluation Module
2007 DSP Development Systems
Reference
Technical

DaVinci-DM644x Evaluation
Module Technical Reference
508165-0001 Rev. E
March 2007
SPECTRUM DIGITAL, INC.
12502 Exchange Drive, Suite 440 Stafford, TX. 77477
Tel: [phone] Fax: [phone]
[e-mail] www.spectrumdigital.com

IMPORTANT NOTICE
Spectrum Digital, Inc. reserves the right to make changes to its products or to discontinue any
product or service without notice. Customers are advised to obtain the latest version of relevant
information to verify that the data being relied on is current before placing orders.
Spectrum Digital, Inc. warrants performance of its products and related software to current
specifications in accordance with Spectrum Digital’s standard warranty. Testing and other quality
control techniques are utilized to the extent deemed necessary to support this warranty.
Please be aware that the products described herein are not intended for use in life-support
appliances, devices, or systems. Spectrum Digital does not warrant nor is Spectrum Digital liable for
the product described herein to be used in other than a development environment.
Spectrum Digital, Inc. assumes no liability for applications assistance, customer product design,
software performance, or infringement of patents or services described herein. Nor does Spectrum
Digital warrant or represent any license, either express or implied, is granted under any patent right,
copyright, or other intellectual property right of Spectrum Digital, Inc. covering or relating to any
combination, machine, or process in which such Digital Signal Processing development products or
services might be or are used.
WARNING
This equipment is intended for use in a laboratory test environment only. It generates, uses, and can
radiate radio frequency energy and has not been tested for compliance with the limits of computing
devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable
protection against radio frequency interference. Operation of this equipment in other environments
may cause interference with radio communications, in which case the user at his own expense will be
required to take whatever measures necessary to correct this interference.
Copyright © 2007 Spectrum Digital, Inc.

Contents
1 Introduction to the DM644x Evaluation Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
Provides you with a description of the DM644x Evaluation Module, key features, and
block diagram.
1.1 Key Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1.2 Functional Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
1.3 Basic Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
1.4 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5
1.5 Configuration Switch Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6
1.6 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7
2 Board Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1
Describes the operation of the major board components on the DM644x Evaluation Module.
2.1 EMIF Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
2.1.1 DDR2 Memory Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
2.1.2 Flash, NAND Flash, SRAM Memory Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
2.1.3 ATA Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
2.1.4 Compact Flash Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
2.1.5 Memory Card Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
2.1.6 VLYNQ Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
2.1.7 UART Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
2.1.8 EMIF Buffer/Decoder Control CPLD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
2.2 Input Video Port Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
2.2.1 On Chip Video Output DACs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
2.2.2 AIC33 Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
2.2.3 Audio PLL/VCXO Circuit/PLL1705 Clock Generator . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
2.3 Ethernet Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
2.4 I2C Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
2.4.1 I/O Expanders . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
2.4.2 MSP430 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
2.5 SPDIF Analog, and Optical Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
2.6 Daughter Card Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
2.7 DM644x Core CPU Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
2.8 USB Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
2.9 Battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11

3 Physical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
Describes the physical layout of the DM644x Evaluation Module and its connectors.
3.1 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
3.2 Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5
3.2.1 J1, Emulation Header . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6
3.2.2 J2, MSP430 JTAG Header . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6
3.2.3 J3, SD/MMC/MS Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7
3.2.4 J4, CS2 Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8
3.2.5 J5, SD/MMC/MS Termination Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8
3.2.6 J6, External RESET Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9
3.2.7 J7, USB Host/Client Termination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9
3.2.8 J8, Dual RCA Jack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10
3.2.9 J9, Video Out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10
3.2.10 J10, USB Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11
3.2.11 J11, Video In . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12
3.2.12 J12, Video In . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12
3.2.13 J13, SPDIF Out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-13
3.2.14 J14, +5V Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-13
3.2.15 J15, SM/xD Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-14
3.2.16 J16, Mini PCI VLYNQ Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-15
3.2.17 J17, FPGA Programming Header . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-16
3.3 Peripheral Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-16
3.3.1 P1, Compact Flash Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-17
3.3.2 P2, Ethernet Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-18
3.3.3 P3, Line In/Mic Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-18
3.3.4 P4, Headphone Out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-19
3.3.5 P5, Dual Output RCA Jack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-20
3.3.6 P6, UART0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-21
3.4 JP1, ATA Interface Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-22
3.5 LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-23
3.6 Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-23
3.6.1 S1, EMU0/1 Select Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-24
3.6.2 S2, TRSTn Select Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-25
3.6.3 S3, Processor Configuration/Boot Load Options . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-26
3.6.4 S4, RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-27
3.6.5 SW1, Power On/Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-27
3.7 Daughter Card Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-27
3.7.1 DC1, EMIF Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-28
3.7.2 DC2, GIOV33/Ethernet Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-29
3.7.3 DC3, SPI, McBSP, I2C Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-30
3.7.4 DC4, Video Input Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-31
3.7.5 DC5, Video Output Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-32
3.7.6 DC6, SD Interface Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-33
3.7.7 DC7, Power Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-33
3.8 Test Points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-34
A Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1
Contains the schematics for the DM644x Evaluation Module
B Mechanical Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-1
Contains the mechanical information about the DM644x Evaluation Module

About This Manual
This document describes the board level operations of the DM644x Evaluation Module
(EVM). The EVM is based on the Texas Instruments DM644x Processor.
The DM644x Evaluation Module is a table top card that allows engineers and software
developers to evaluate certain characteristics of the DM644x processor to determine if
the processor meets the designers application requirements. Evaluators can create
software to execute on board or expand the system in a variety of ways.
Notational Conventions
This document uses the following conventions.
The DM644x Evaluation Module will sometimes be referred to as the DM644x EVM or
EVM.
Program listings, program examples, and interactive displays are shown in a special
italic typeface. Here is a sample program listing.
equations
!rd = !strobe&rw;
Information About Cautions
This book may contain cautions.
This is an example of a caution statement.
A caution statement describes a situation that could potentially damage your software,
or hardware, or other equipment. The information in a caution is provided for your
protection. Please read each caution carefully.

Related Documents, Application Notes and User Guides
Information regarding DaVinciTM technology can be found at the following Texas
Instruments website:
http://www.ti.com/corp/docs/landing/davinci/index.html

Table 1: Manual History
Revision History
A Production Release
BCorrected I2C address of TVP5146
C Corrected Pin 70, Table 30, DC1 connector
D Updated schematics, silkscreens, dimensions
E Updated schematics, silkscreens, dimensions
Table 2: Board History
PWB
Revision History
C Production Release
D Added Intel Flash Memory
E DDR2 ODT Resistors, DM6446 Symbol Update

1-1
Chapter 1
Introduction to the
DM644x EVM
Chapter One provides a description of the DM644x EVM along with the key
features and a block diagram of the circuit board.
Topic Page
1.1 Key Features 1-2
1.2 Functional Overview 1-3
1.3 Basic Operation 1-4
1.4 Memory Map 1-5
1.5 Configuration Switch Settings 1-6
1.6 Power Supply 1-7

Spectrum Digital, Inc
1-2 DM644x EVM Technical Reference
1.1 Key Features
The DM644x EVM is a standalone development platform that enables users to
evaluate and develop applications for the TI DaVinci processor family. Schematics,
logic equations and application notes are available to ease hardware development and
reduce time to market.
The EVM comes with a full complement of on board devices that suit a wide variety of
application environments. Key features include:
• A Texas Instruments DM644x processor with an ARM processor operating up to
300 Mhz. and a C64xx DSP operating up to 600 Mhz.
• 1 video input port, supports composite or S video
• 4 video DAC outputs - component, RGB, composite
• 256 Mbytes of DDR2 DRAM
• UART, Media Card interface (SD card, xD card, SM card, MS card, MMC)
• 16 Mbytes of non-volatile Flash memory, 64 Mbytes NAND Flash, 4 Mbytes SRAM
• AIC33 stereo codec
Figure 1-1, Block Diagram DM644x EVM
SM/xD
Compact
Flash
IR PWR
SW
S3
Config
DC3 DC2
3V
BAT
DC1 (EMIF)
SD/
MMC/
MS
TI JTAG
MSP430
JTAG
SVHS
IN
USB
VIDEO
IN
AUDIO
IN
HP OUT
AUDIO
OUT
S/PDIF
Optical
S/PDIF
Analog
UART
+5V
MSP430
User LEDs
DC7
DC6
S1 S2
NAND
Flash
1.2V DSP Core Voltage
1.8V I/O Voltage
3.3V Board Supply Voltage
AIC33
J5
I2C
GPIO
I2C
GPIO
I2C
GPIO I2C
EEPROM
D A V I N C I
EVALUATION MODULE
A TEXAS INSTRUMENTS TECHNOLOGY
NOR
Flash
DC4 (VIDEO IN)
TVP
5146 S/PDIF
Drivers
SVHS
OUT
DAC OUT
DC5 (VIDEO OUT)
EMIF
Video Ports
ATA Hard Disk
DDR
I2C
CPLD
Serial Media
DaVinci
ENET
PHY
EMAC
Altera
JTAG
DDR
DDR
10/100
ENET

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1-3
• USB2 Interface
• 10/100 MBS Ethernet Interface
• IR Remote Interface, real time clock, via MSP430
• Configurable boot load options
• JTAG emulation interface
• 8 user LEDs
• Single voltage power supply (+5V)
• Expansion connectors for daughter card use
• ATA Interface, Vlynq Interface
• SPDIF Interface, analog, and optical
1.2 Functional Overview of the DM644x EVM
The DM644x on the DaVinci EVM interfaces to on-board peripherals through the
16-bit wide EMIF peripheral interface pins. The DDR2 memory is connected to its own
dedicated 32 bit wide bus. The EMIF bus is also connected to the Flash, SRAM,
NAND, and daughter card expansion connectors which are used for add-in boards.
On board video decoder and on chip encoders interface video streams to the DM644x
processor. One decoder and 4 on chip DAC channels are standard on the EVM. On
screen display functions are implemented in software on the DM644x processor.
An on-board AIC33 codec allows the DSP to transmit and receive analog audio
signals. The I2C bus is used for the codec control interface, while the McBSP controls
the audio stream. Signal interfacing is done through 3.5mm audio jacks that correspond
to microphone input, line input, and line output. The codec can select the line input as
the active input.
The EVM includes 8 LEDs, IR interface, and Real time clock which can be used to
provide the user with interactive feedback. These interfaces are implemented via
software on a MSP430 and are accessed by reading and writing to the I2C registers.
Media cards, ATA interface, VLYNQ, and ethernet MAC interfaces are integrated
peripheral on the DM644x processor exploiting its system on a chip architecture.
An included 5V external power supply is used to power the board. On-board switching
voltage regulators provide the +1.2V CPU core voltage and +3.3V for peripherals and
+1.8V memory and DM644x I/O. The board is held in reset until these supplies are
within operating specifications.

Spectrum Digital, Inc
1-4 DM644x EVM Technical Reference
Code Composer communicates with the EVM through an external emulator via the
20 pin external JTAG connector.
1.3 Basic Operation
The EVM is designed to work with TI’s Code Composer Studio development, or
standard GDB tool environments. Code Composer communicates with the board
through an external JTAG emulator. To start, follow the instructions in the Quick Start
Guide to install Code Composer. This process will install all of the necessary
development tools, documentation and drivers.
Detailed information about the EVM including examples and reference material is
available on the EVM’s CD-ROM.

Spectrum Digital, Inc
1-5
1.4 Memory Map
The DaVinci family of processors have a large byte addressable address space, some
limitations to byte addressing are determined by peripheral interconnection to the
Davinci device. Program code and data can be placed anywhere in the unified address
space. Addresses are multiple sizes depending on hardware implementation. Refer to
the appropriate device data sheets for more details.
The memory map shows the address space of a generic DaVinci processor on the left
with specific details of how each region is used on the right. By default, the internal
memory sits at the beginning of the address space. Portions of memory can be
remapped in software as L2 cache rather than fixed RAM.
The part incorporates a dual EMIF interface. One dedicated EMIF directly interfaces to
the DDR2 memory. The other EMIF has 4 separate addressable regions called chip
enable spaces (CS2-CS5). The Flash, NAND Flash, or SRAM are mapped into CE2
space and selectable via J4. Daughter cards use CE2 and CE3. When CE2 is used for
daughter card interfacing J4 must be set appropriately. CS4 and CS5 are reserved for
the VLYNQ interface on the EVM.
ARM Instruction RAM
DM644x EVM
Generic DaVinci
Address Space
Address
0x00000000
0x00040000
0x02000000
0x06000000
0x08000000
0x80000000
AEMIF CS3
AEMIF CS4
AEMIF CS5
DDR
Figure 1-2, Memory Map, DM644x EVM
ARM Instruction RAM
ARM Data RAM ARM Data RAM
AEMIF CS2 Flash/NAND/SRAM/DC
0x04000000 DC
VLNQ
VLNQ
DDR

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1-6 DM644x EVM Technical Reference
1.5 Configuration Switch Settings
The EVM has a single 10 position configuration switch that allow users to control the
operational state of the processor when it is released from reset. The configuration
switch is labeled S3 on the EVM board.
Switch S3 configures the boot mode that will be used when the DSP starts executing.
By default the switches are configured to EMIF boot (out of 8-bit Flash) in little endian
mode. The table below shows the settings for switch S3.
Table 1: Configuration Switch S3 Settings
Position Name Function Boot Mode
1 COUT0 Boot Mode 0 00 - Boot from ROM NAND
01 - Boot from AEMIF
10 - Boot from ROM HPI
11 - Boot from ROM UART
2 COUT1 Boot Mode 1
3 COUT2 Bus width: 0=8 bit, 1=16 bit
4 COUT3 0=ARM boots DSP,
1=C64xx self boots
5YOUT4
6YOUT3
7YOUT2
8YOUT1
9YOUT0
10 USER For Demos

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1-7
1.6 Power Supply
The EVM operates from a single +5V external power supply connected to the main
power input (J14), a 2.5 MM. barrel-type plug. Internally, the +5V input is converted into
+1.2V, +1.8V and +3.3V using Texas Instruments swift voltage regulators. The +1.2V
supply is used for the DSP core while the +3.3V supply is used for the DSP's I/O buffers
and other chips on the board. The +1.8 volt supply is used for DM644x I/O, low voltage
memory, and peripherals, and DDR2 memory.
There are four power test points on the EVM; TP14, TP25, TP26, and TP43. These test
points provide a convenient mechanism to check the EVM’s multiple power supplies.
The table below shows the voltages for each test point and what the supply is used for.
Table 2: Power Test Points
Test Point Voltage Voltage Use
TP43 +1.2 V DM644x Core
TP25 +1.2 V DM644x Core/Power Down
TP26 +1.8 V DDR2 Memory, DSP I/O,
and logic
TP14 +3.3V DSP I/O and logic

Spectrum Digital, Inc
1-8 DM644x EVM Technical Reference

2-1
Chapter 2
Board Components
This chapter describes the operation of the major board components on
the DM644x EVM.
Topic Page
2.1 EMIF Interfaces 2-2
2.1.1 DDR2 Memory Interface 2-2
2.1.2 Flash, NAND Flash, SRAM Memory Interface 2-2
2.1.3 ATA Interface 2-2
2.1.4 Compact Flash Interface 2-3
2.1.5 Memory Card Interface 2-3
2.1.6 VLYNQ Interface 2-3
2.1.7 UART Interface 2-3
2.1.8 EMIF Buffer/Decoder Control CPLD 2-3
2.2 Input Video Port Interfaces 2-4
2.2.1 On Chip Video Output DACs 2-4
2.2.2 AIC33 Interface 2-5
2.2.3 Audio PLL/VCXO Circuit/PLL1705 Clock Generator 2-6
2.3 Ethernet Interface 2-7
2.4 I2C Interface 2-7
2.4.1 I/O Expanders 2-8
2.4.2 MSP430 2-9
2.5 SPDIF Analog, and Optical Interfaces 2-9
2.6 Daughter Card Interface 2-10
2.7 DM644x Core CPU Clock 2-10
2.8 USB Clock 2-10
2.9 Battery 2-11

Spectrum Digital, Inc
2-2 DM644x EVM Technical Reference
2.1 EMIF Interfaces
A separate 16 bit EMIF with four chip enables divide up the address space and allow
for asynchronous accesses on the EVM. CE4 and CE5 are reserved for VLYNQ use
allowing the EVM two dedicated chip enables. CE2 is used for Flash, NAND Flash,
SRAM, and xD and SM Media cards. Both CE2 and/or CE3 can be routed to the
daughter card interface connectors.
2.1.1 DDR2 Memory Interface
The DM644x device incorporates a dedicated 32 bit wide DDR2 memory bus. The EVM
uses two gigabit 16 bit wide memories on this bus, for a total of 256 megabytes of
memory for program, data, and video storage. The internal DDR controller uses a
PLL to control the DDR memory timing. The interface supports rates up to 166 Mhz.,
and is clocked on differential edges for optimal performance. Memory refresh for DDR2
is handled automatically by the DM644x internal DDR controller.
2.1.2 Flash, NAND Flash, SRAM Memory Interface
The DM644x has 16 megabytes of NOR Flash, or 64 megabytes of NAND Flash, or
4 megabytes of SRAM memory mapped into the CE2 space. This NOR Flash memory,
and NAND Flash memory are used primarily for boot loading. SRAM is used for
debugging application code. The CE2 space is configured as 16 bits wide on the
DM644x EVM for NOR Flash and SRAM usage, and 8 bit wide for NAND flash usage.
2.1.3 ATA Interface
The DM644x integrates a standard ATA interface on chip. This interface is multiplexed
with the EMIF interface at +1.8 volt levels. The EVM incorporates a standard Lap drive
Hard Disk Drive connector, JP1. Level translators are used to translate the data to
+3.3 volt interface levels and a CPLD is used to translate the control interface to
+3.3V levels. Buffer control is implemented via the CPLD. The drive is selected via I2C
I/O expander U35 bit P6. When the hard drive is in use other peripherals such as the
compact Flash interface and the xD/SM media cards on the EM bus are not accessible
without reconfiguring the EMIF or I2C select lines.
Table 1: EMIF Interfaces
Chip Select Function
CE2 NOR Flash, NAND Flash, SRAM
(see JP4 definition)
CE2 Daughter Card Interface
(see JP4 definition)
CE3 Daughter Card Interface