Texas Instruments APA100 User manual

APA100
100−W Analog Input Class-D Amplifier
TPA2001D1/TAS5111
August 2004 Audio Power Amplifiers
User’s Guide
SLOU170

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Information About Cautions and Warnings
iii
Preface
Read This First
About This Manual
This user’s guide describes the characteristics, operation, and the use of the
APA100 reference design board. It covers all pertinent areas involved to
properly use this reference design board along with the devices that it
supports. The physical PCB layout, schematic diagram, and circuit
descriptions are included.
This reference design demonstrates how to make the TPA2001D1 and
TAS5111 into a 100-W class-D amplifier. The user’s guide discusses how the
TPA2001D1 is used as an analog input class-D modulator. The analog
modulator is input to the TAS5111, which is an H−bridge that effectively
extends the supply range from the TPA2001D1’s 3-V rails to 29.5 V with the
TAS5111. The user’s guide also goes into detail on the external feedback using
the TLV2464A quad operational amplifier to add power supply rejection. The
user’s guide shows the measured audio results including: total harmonic
distortion plus noise (THD+N) versus frequency, THD+N versus output power,
signal-to-noise ratio (SNR), output power versus supply voltage, output power
versus load, and supply rejection ratio versus frequency.
How to Use This Manual
-Chapter 1 — EVM Overview
-Chapter 2 — PCB Design
-Chapter 3 — EVM Operation
-Chapter 4 — Technical Information
-Chapter 5 — Measured Results
Information About Cautions and Warnings
This book may contain cautions and warnings.
This is an example of a caution statement.
A caution statement describes a situation that could potentially
damage your software or equipment.

Related Documentation From Texas Instruments
iv
This is an example of a warning statement.
A warning statement describes a situation that could potentially
cause harm to you.
The information in a caution or a warning is provided for your protection. Read
each caution and warning carefully.
Related Documentation From Texas Instruments
To obtain a copy of any of the following TI documents, call the Texas
Instruments Literature Response Center at (800) 47–8924 or the Product
Information Center (PIC) at (972) 644–5580. When ordering, identify this
manual by its title and literature number. Updated documents can also be
obtained through the TI Web site at www.ti.com.
Data Sheets: Literature Number:
TPA2001D1 SLOS338
TAS5111 SLES049
TLV2464A SLOS220
FCC Warning
This equipment is intended for use in a laboratory test environment only. It
generates, uses, and can radiate radio frequency energy and has not been
tested for compliance with the limits of computing devices pursuant to subpart
J of part 15 of FCC rules, which are designed to provide reasonable protection
against radio frequency interference. Operation of this equipment in other
environments may cause interference with radio communications, in which
case the user at his own expense will be required to take whatever measures
may be required to correct this interference.

Contents
v
Contents
1 EVM Overview 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1 Features 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Power Requirements 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2.1 Supply Voltage 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2.2 TPA2001D1 and TLV2464A Supply Voltage (3-V Reference) 1-3. . . . . . . . . . . . . .
1.3 EVM Basic Function/Block Diagram 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 PCB Design 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1 PCB Layout 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.1 Split Ground Plane 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.2 H-Bridge Layout 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.3 Analog Section Layout 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.4 PCB Layers 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Bill of Materials 2-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 Schematic 2-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 EVM Operation 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1 Quick Start 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Power−Up/Down Sequence 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3 Reset Button/Mute 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.4 Error Signals 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.5 Changing the Gain 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4 Technical Information 4-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1 Feedback System Design 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2 TPA2001D1 (Class-D Modulator) 4-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3 TAS5111 (H-Bridge) 4-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.4 TLV2464A (Gain Setting and Feedback) 4-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.5 LC Filter 4-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.6 Thermal 4-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5 Measured Results 5-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.1 Total Harmonic Distortion + Noise 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.2 Output Power 5-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3 Efficiency 5-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.4 Gain and Phase Response 5-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.5 Signal-to-Noise Ratio (SNR) 5-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.6 Supply Ripple Rejection 5-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Contents
vi
Figures
1−1 THD+N vs Output Power (a), THD+N vs Frequency (b) 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . .
1−2 APA100 EVM Block Diagram 1-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−1 APA100 Split Plane Top Layout 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−2 APA100 Split Plane Bottom Layout 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−3 Top Copper and Silkscreen 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−4 Bottom Copper and Silkscreen 2-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−5 Drill Drawing 2-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−1 Quick Start Module Map 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−1 APA100 Block Diagram 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−2 Open- and Closed-Loop Frequency Response 4-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−3 Open- and Closed-Loop Frequency Response With TPA2001D1 Pole and
Canceling Zero 4-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−4 APA100 Integrator Design 4-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−5 PSPICE Circuit for Simulating the Feedback 4-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−6 PSPICE Simulation of Open−Loop Response 4-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−7 TPA2001D1 Block Diagram 4-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−8 TPA2001D1 Inputs and Outputs With 20-kHz Sine Wave 4-8. . . . . . . . . . . . . . . . . . . . . . . . . . .
4−9 APA100 Output Filter 4-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5−1 APA100 THD+N vs Frequency With 4-W Load 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5−2 APA100 THD+N vs Frequency With 8-W Load 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5−3 APA100 THD+N vs Output Power With 4-W Load 5-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5−4 APA100 THD+N vs Output Power With 8-W Load 5-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5−5 APA100 Output Power vs Supply Voltage With 4-W Load 5-4. . . . . . . . . . . . . . . . . . . . . . . . . .
5−6 APA100 Output Power vs Supply Voltage With 8-W Load 5-4. . . . . . . . . . . . . . . . . . . . . . . . . .
5−7 APA100 Efficiency vs Output Power With 4-W Load 5-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5−8 APA100 Gain vs Frequency With 4-W and 8-W Load 5-6. . . . . . . . . . . . . . . . . . . . . . . . . . . .
5−9 APA100 Supply Ripple Rejection Ratio vs Frequency With 8-W Load 5-7. . . . . . . . . . . . . . .
Tables
2−1 Parts List 2-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−1 TAS5111 Error Decoding 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−1 TAS5111 Thermal Table 4-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1-1
EVM Overview
EVM Overview
This reference design demonstrates how to make the TPA2001D1 and the
TAS5111 into a 100-W class-D amplifier. The user’s guide discusses how the
TPA2001D1 is used as an analog input class-D modulator. The analog
modulator is input to the TAS5111, which is an H-bridge that effectively extends
the supply range from the TPA2001D1’s 3-V rails to 29.5 V with the TAS5111.
The 18-V to 29.5-V power supply is applied across the power supply banana
plugs J3 and J4. Apply 18 V to 29.5 V to J3 and 0 V (ground) to J4. A simple
zener diode and NPN transistor circuit is used to create the 3-V supply for the
TPA2001D1 and TLV2464A; therefore, the user only needs to apply the
single-supply voltage.
The analog single-ended input is received through the phono jack, J5. The
user should connect the load across the differential output banana jacks, J1
and J2.
Topic Page
1.1 Features 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Power Requirements 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 EVM Basic Function/Block Diagram 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 1

Features
1-2
1.1 Features
This reference design or evaluation module (EVM) features the TPA2001D1,
TAS5111, and TLV2464A. For simplicity, this EVM is referred to as the APA100
EVM to cover all parts that are supported in this user’s guide. The APA100
EVM is an evaluation module designed for a quick and easy way to evaluate
the functionality and performance of the 100−W analog input class−D
amplifier.
The features of this amplifier follow.
-Wide supply range of 18 V to 29.5 V
->85% efficiency into 4 Ω and 8 Ω
-100 W at 4% THD+N with 29.5-V supply and 4-Ωload
-100 W at 10% THD+N with 28-V supply and 4-Ωload
-63 W at 10% THD+N with 29.5-V supply and 8-Ωload
-THD+N = 0.04% at 1 W with 29.5-V supply and 4-Ωload
-THD+N = 0.03% at 1 W with 29.5-V supply and 8-Ωload
-SNR = 95 dB
-Supply rejection = 63 dB at 1 kHz
-Internal short circuit and thermal protection
-Onboard 3−V supply for TPA2001D1 and TLV2464A
-Module gain set to 31.4 dB typical and easily adjusted.
Figure 1−1 shows the amplifier’s (a) THD+N vs output power and (b) THD+N
vs frequency with a 4-Ωload, respectively. More graphs are shown in Chapter
5, Measured Results.
Figure 1−1.THD+N vs Output Power (a), THD+N vs Frequency (b)
f = 1 kHz,
PVDD = 15 V, 18 V,
20 V, 28 V, 29.5 V
20
10
2
5
1
0.2
0.5
0.1
0.02
0.05
0.01
100 m 500 m 1 5 10 20 50 100 200
THD+N − Total Harmonic Distortion + Noise − %
PO− Output Power − W
100
20
50
10
2
5
1
0.2
0.5
0.1
0.02
0.05
0.0120 50 100 200 1 k 2 k 10 k 20 k
70 W
40 W
10 W
1 W
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
(a) (b)
1.2 Power Requirements
The following sections describe the power requirements of this EVM.
1.2.1 Supply Voltage
The 18-V to 29.5-V supply (A+) is applied across the power supply banana
plugs J3 and J4. Apply 18 V to 29.5 V to J3 and ground to J4. A zener diode

EVM Basic Function/Block Diagram
1-3
EVM Overview
and NPN transistor circuit is used to create the 3-V supply for the TPA2001D1
and TLV2464A; therefore, the user only needs to apply the single-supply
voltage. A+ supply is used for powering the TAS5111 and is input for the zener
diode/NPN transistor circuit used to generate the 3-V supply for the
TPA2001D1 and TLV2464A.
To avoid potential damage to the EVM board, make sure that the
correct cables are connected to their respective terminals as
labeled on the EVM board.
Stresses above 29.5-V maximum voltage rating may cause
permanent damage to the TAS5111.
1.2.2 TPA2001D1 and TLV2464A Supply Voltage (3-V Reference)
The 3-V supply is generated by a 3.9-V zener diode, an NPN transistor, and
a few resistors to supply VDD for the TPA2001D1 and TLV2464A. The 3-V
supply voltage goes through a 20-Ωresistor to filter any noise. Test point 3V
is placed after the 20-Ωresistor to allow the user to remove the 20-Ωresistor
and insert an external 3-V supply. If an external supply is inserted, the voltage
needs to be greater than 2.75 V to enable proper operation of the TPA2001D1
and less than 3.6 V to allow proper voltage levels to the inputs of the TAS5111.
When applying an external voltage reference through test point 3V,
ensure that it does not exceed +3.6 V. Otherwise, this can
permanently damage the installed device under test (DUT).
1.3 EVM Basic Function/Block Diagram
The APA100 EVM uses the TPA2001D1 as the analog modulator. The
TAS5111 level shifts the 3-V, peak-to-peak output to the 18-V to 29.5-V,
peak-to-peak output level of the TAS5111 enabling high−power output. The
TLV2464A is used for the input gain stage, to provide a buffered midsupply
voltage (1.5 V) and as feedback. The feedback improves total harmonic
distortion (THD) and gives the amplifier power supply rejection, which allows
the amplifier to have excellent audio performance even with a noisy power
supply. Chapter 4, Technical Information provides more details about the
component selection and feedback. A block diagram of the reference design
is shown in Figure 1−2.

EVM Basic Function/Block Diagram
1-4
Figure 1−2.APA100 EVM Block Diagram
Audio Input Gain
(TLV2464)
Feedback
and
Integrator
(TLV2464)
Audio
Output
Analog Input
Class-D
Modulator
TPA2001D1
H-Bridge
(TAS5111)

2-1
PCB Design
PCB Design
This chapter gives layout guidelines for the APA100 reference design.
Topic Page
2.1 PCB Layout 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Bill of Materials 2-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 Schematic 2-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 2

PCB Layout
2-2
2.1 PCB Layout
The critical part of the design lies particularly in the layout process. The EVM
layout should be followed exactly for optimal performance. The main concern
is the placement of components and the proper routing of signals. Place the
bypass/decoupling capacitors as close as possible to the pins; properly
separate the linear and switching signals from each other. Because of its
importance, carefully consider the ground plane in the layout process. A split
ground plane is ideally preferred.
2.1.1 Split Ground Plane
The split plane used in the EVM separates the ground plane for the H−bridge
and a separate plane for everything else. The ground plane plays an important
role in controlling the noise and other effects that contribute to distortion and
noise on the output. To ensure that the return currents are handled properly,
route the appropriate signals only in their respective sections; this means that
the analog traces should only lay directly above or below the analog ground
section and the H-bridge traces in the H-bridge ground section. Minimize the
length of the traces. Figure 2−1 shows the top layer labeled with Analog
Section and H-Bridge Section to demonstrate how the board is split. The
bottom layer is split along the same line, as shown in Figure 2−2.
Figure 2−1.APA100 Split Plane Top Layout

PCB Layout
2-3
PCB Design
Figure 2−2.APA100 Split Plane Bottom Layout
2.1.2 H-Bridge Layout
The H-bridge is laid out based on recommendations from the TAS5111 data
sheet and follows the same pattern as the DAVREF100 EVM board.
1) Keep local decoupling and bootstrap capacitors and resistors close to
pins.
JMinimize trace length to C29, and use wide traces.
JLocal PVDD decoupling R35, C35, R36, and C36 traces should be as
short and as wide as possible.
2) Use a ground plane.
3) Use trace impedance from bulk decoupling to PVDD pin, making the trace
50 mm long and 1 mm wide, with separate traces for PVDDA and PVDDB
To ensure proper H-bridge layout, measure the TAS5111 output waveforms at
the pins with a short ground lead on the scope probe to PGND. See application
report Voltage Spike Measurement Technique and Specification (SLEA025).
2.1.3 Analog Section Layout
The analog section is carefully laid out to keep the switching currents from the
TAS5111 away from it. The EVM layout followed these general rules.
1) Keep the operational amplifier away from TAS5111 output and power
traces.
2) Minimize nodes connected to IN− pin of the TLV2464A. This is the most
sensitive node of the reference design.

PCB Layout
2-4
3) Use a split ground plane to keep high switching ground currents from the
operational amplifier circuitry.
4) Place decoupling capacitors close to the TLV2464A and TPA2001D1
5) Place RC filter capacitors (C20, C23, and C24) close to the operational
amplifier, with capacitor grounds connecting with a low−impedance path
to the operational amplifier ground pin.
6) Place RC filters (R8, R10, C8, and C11) close to the TPA2001D1, with
capacitor grounds connecting with a low−impedance path to the
TPA2001D1 AGND pin.
7) Place resistor R13 and capacitor C18 close to the TPA2001D1 inputs.
8) Connect the ground side of the TPA2001D1 ROSC, COSC, VDD, and
BYPASS components to TPA2001D1 AGND before connecting to the rest
of the ground plane.
2.1.4 PCB Layers
The APA100 EVM board is constructed on a two-layer printed−circuit board
using a copper-clad FR-4 laminate material. The printed−circuit board has a
dimension of 3.4 inch (86,36 mm) X 2.5 inch (63,5 mm), and the board
thickness is 0.062 inch (1,57 mm). Figure 2−3 through NO TAG show the
individual artwork layers.
Figure 2−3.Top Copper and Silkscreen

PCB Layout
2-5
PCB Design
Figure 2−4.Bottom Copper and Silkscreen
Figure 2−5.Drill Drawing
SIZE QTY STM PLTD
18 4 PLTD
28 40 PLTD
42 21 PLTD
89 3 PLTD
116 6 PLTD
140 4 PLTD
3.4 INCH
2.5 INCH

Bill of Materials
2-6
2.2 Bill of Materials
Table 2−1.Parts List
Reference Qty Value Manufacturer Part Number Description
C23,24 2 22 pF TDK C1608C0G1H220J 50 V, size 603, COG, 5%
C13,19,20,R25 4 56 pF TDK C1608C0G1H560J 50 V, size 603, COG, 5%
C6,9,11,12,14,17,18,
21,49,50 10 220 pF TDK C1608X7R1H221K 50 V, size 603, X7R, 10%
C4,25 2 3300 pF TDK C1608C0G1H332J 50 V, size 603, COG, 5%
C1,30,32,33, 35−37,
40, 42−46,48 16 0.1 µF TDK C1608X7R1H104K/10 50 V, size 603, X7R
C29, 31, 38, 39 21 µF TDK 25 V, Size 805, X5R
C2,7,8,10,22,26,27 7 1 µF TDK C1608X5R0J105K 6.3 V, size 603, X5R
C3,5,34 3 10 µF Murata GRM21BR61A106KE19L 10 V, size 805, X5R, 10%
C41 1 1000 µF Panasonic EEUFC1V102 35 V, electrolytic, 20%
C15,C16,R11,R12,
R30 50 Ωjumper 0 Ωresistor, size 603
C28, C47 2 DNP
R2,26,27,34 4 20R Yageo 9C06031A20R0JLHFT 1/10W, size 603
R9,28 2 100R Yageo 9C06031A1000JLHFT 1/10W, size 603
R8,10 2 499R Yageo 9C06031A990FKHFT 1/10W, 1%, size 603
R6,14,17,20,24 5 1K Yageo 9C06031A1001JLHFT 1/10W, size 603
R18 1 2K Yageo 9C06031A2001JLHFT 1/10W, size 603
R5,22,23,41,42 6 4.7K Yageo 9C06031A4701FKHFT 1/10W, 1%, size 603
R1,3,4,13,31 5 10K Yageo 9C06031A1002JLHFT 1/10W, size 603
R15,16 2 40.2K Yageo 9C06031A4022FKHFT 1/10W, 1%, size 603
R7,19,29,38 4 120K Yageo 9C06031A1203FKHFT 1/10W, 1%, size 603
R32,33,35,36,43,44 6 1R5 Yageo 9C12063A1R50FKHFT 1/4W, size 1206
R37,39,45,46 4 20R Yageo 9C12063A20R0JLHFT 1/4W, size 1206
R47,48 2 10K Yageo 9C12063A1002FKHFT 1/4W, size 1206
R21 1 DNP
L1, L2 222 µHDB Tech DB1320 Inductor, D = 13 mm
D1 1 3.9 V Onsemi MMSZ4686T1 3.9 V zener
D2,3 2 33 V Diodes Inc. SMAJ33A 33 V TVS
S1 1 IPC SM-782 STD PB-SUR-4P Push-button switch
U3 1 Texas Instruments TAS5111 H-bridge, TSSOP32 (DAD)
HS1 1 Heavy MEtal #230 Heatsink #230
2 Screws 4/40 screws (tightened to
1.5 in ×lbs)
Wakefield Wakefield 126 Thermal grease 0.001 inch
thick
U1 1 Texas Instruments TLV2464A SSOP14W
U2 1 Texas Instruments TPA2001D1 SSOP16W
Q1 1 Infineon SMBT3904E6327 NPN, SOT23
J1 1 Phono jack with switch
J2−5 4 Banana + wire

Schematic
2-7
PCB Design
2.3 Schematic

2-8

3-1
EVM Operation
EVM Operation
This chapter covers in detail the operation of the APA100 EVM to guide the
user in evaluating the audio power amplifier and in interfacing the APA100
EVM to an audio input and power supply.
Topic Page
3.1 Quick Start 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Power−Up/Down Sequence 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3 Reset Button/Mute 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.4 Error Signals 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.5 Changing the Gain 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 3

Quick Start
3-2
3.1 Quick Start
Follow these steps to use the APA100 EVM.
APA100 audio input connection can be made via a phono jack (J1), or by sol-
dering to its pins. The power supply and outputs can be connected with banana
connectors or wires via screw terminals. Figure 3−1 shows numbered callouts
for selected steps.
Figure 3−1.Quick Start Module Map
62
5
4
Power Supply
1) Ensure that all external power sources are set to off.
2) Connect an external regulated power supply, set from 18 V to 29.5 V, to
the module A+ (J3) and GND (J4) banana plugs, taking care to observe
marked polarity.
Inputs and Outputs
3) Ensure that the signal source level is set to minimum.
4) Connect the audio source to the input phono connector, J1. The inside of
the phono connector is the audio input, and the outside of the phono con-
nector is ground. Ensure that a single−ended input signal is inserted (NOT
differential or balanced), because the outside of the phono connector is
tied to ground.
5) Connect a 4−Ωor higher impedance speaker to the module OUT+ (J2)
and OUT− (J1) connectors.