Texas Instruments bq24261M User manual

User's Guide
SLUUBB5A–April 2015–Revised October 2015
User's Guide for WCSP-Packaged bq24261M 3-A Battery
Charger Evaluation Module
The bq24261M evaluation module is a complete charger module for evaluating compact, flexible, high-
efficiency, USB-friendly, switch-mode charge management solutions for single-cell, Li-ion and Li-polymer
batteries used in a wide range of portable applications.
Contents
1 Introduction ................................................................................................................... 2
1.1 bq24261M IC Features............................................................................................. 2
1.2 bq24261M EVM Features ......................................................................................... 2
1.3 Schematic............................................................................................................ 3
1.4 I/O Description ...................................................................................................... 4
1.5 Test Points........................................................................................................... 4
1.6 Control and Key Parameters Setting............................................................................. 5
1.7 Recommended Operating Conditions............................................................................ 5
2 Test Summary................................................................................................................ 6
2.1 Definitions............................................................................................................ 6
2.2 Recommended Test Equipment .................................................................................. 6
2.3 Recommended Test Equipment Setup .......................................................................... 8
2.4 Recommended Test Procedure ................................................................................. 10
3 Printed-Circuit Board Layout Guideline.................................................................................. 12
4 Bill of Materials and Board Layout ...................................................................................... 13
4.1 Bill of Materials .................................................................................................... 13
4.2 Board Layout....................................................................................................... 14
List of Figures
1 bq24261MEVM Schematic ................................................................................................. 3
2 BAT_Load (PR1010) Schematic........................................................................................... 7
3 Connections of HPA172 Kit ................................................................................................ 8
4 Original Test Setup for bq24261MEVM-691 ............................................................................. 9
5 Main Window of bq24261MSW Evaluation Software.................................................................. 10
6 Top Assembly Layer....................................................................................................... 14
7 Top Layer ................................................................................................................... 15
8 First Internal Layer ......................................................................................................... 16
9 Second Internal Layer ..................................................................................................... 17
10 Bottom Layer................................................................................................................ 18
11 Bottom Assembly Drawing................................................................................................ 19
List of Tables
1 Bill of Materials - bq24261MEVM-691 .................................................................................. 13
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Introduction www.ti.com
1 Introduction
1.1 bq24261M IC Features
The bq24261M device integrates a synchronous PWM controller, power MOSFETs, input-current sensing,
high-accuracy current and voltage regulation, charge termination and power path management into a
small WCSP package. The charge parameters can be programmed through an I2C interface. Key IC
features include:
• High-efficiency, fully-integrated, NMOS-NMOS, synchronous buck charger with 1.5-MHz frequency
• Charge time optimizer
• Integrated power FETs for up to 3-A charge rate
• 5-V, 1-A OTG VBUS supply
• Power path management between battery and system voltages
For details, see the bq24261M data sheet (SLUSC09).
1.2 bq24261M EVM Features
The bq24261M evaluation module (EVM) on PCB PWR691 provide a complete charger module for
evaluating compact, flexible, high-efficiency, USB-friendly, switch-mode battery charge and power path
management solution for single-cell, Li-ion and Li-polymer battery-powered systems used in a wide range
of portable applications. Key EVM features include:
• Terminal blocks and standard headers for IN, SYS, BAT, TS
• Programmable battery voltage, charge current, input current, and status via I2C interface
• IN operating up to 10.5 V for bq24261M
• LED indication for status signals
• Test points for key signals available for testing purposes. Easy probe hook-up
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J13
BAT
up to 4.44V, 3A
BAT
10µF
C6
DNP
GND
BAT
PGND A1
PGND A2
PGND A3
PGND A4
PGND A5
PGND A6
PMID
B1
SW B2
SW B3
SW B4
SW B5
SW B6
IN
C1
IN
C2
IN
C3
IN
C4
CD
C5 BOOT C6
SDA
D1
SCL
D2
NC
D3
TS D5
DRV D6
STAT
E1
INT
E2
SYS E3
SYS E4
SYS E5
SYS E6
AGND F1
BGATE
F2
BAT F3
BAT F4
BAT F5
BAT F6 PSEL
D4
U1
bq24261M
1µF
C4
GND
GND
GND
GND
1µF
C7
GND
22µF
C5
up to 6V, 3A
GND
INT
IN
STAT
DRV
TS
IN
PSEL
GND
GND
GND
DM
SCL
GND
SDA
GND
GND
DRV
SW
L1
SPM4012T-1R5M
DRV
1
2
3
JP5
HIGH
CD
DRV
LOW
DRV
DRV
GND
GND
GND
EXT
5.62k
R5
TP9
TS
GND
TS
DRV
GND
EXT
Red
D2
Green
D1
TS
SCL
SIM
4
1
2
3
J15
22-05-3041
12.4k
R6
STAT
GND
INT
TP1TP2 TP4 TP5 TP7
GND
SW
GND
200
R2
BAT
SDA
GND
SYS
100k
R7
GND
1.50k
R3
1.50k
R4
TP6 TP8
IN
INTSTAT
200
R1
SYS
IN
GND
J14
ED555/2DS
J7
ED555/2DS
J1
ED555/2DS
J9
ED555/2DS
1µF
C2
1µF
C1
10µF
C8DNP
J5
J6
J3
JP3JP2
J8
J4
1
2
3
JP6
TP3
SYS
SYS
GND
GND
J11
ED555/2DS
J10
GND
TP10
TP11
1
2
3
JP4
Q1
CSD25402Q3A
1.00M
R8
BGATE
BGATE
SYS (OFF)
BGATE
GATE
0.033µF
C3
www.ti.com Introduction
1.3 Schematic
Figure 1 illustrates the bq24261M schematic.
Figure 1. bq24261MEVM Schematic
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1.4 I/O Description
Header/Terminal Block Description
J1– IN/GND Input power positive and negative terminal
J2 – Do not use Do not use
J3 - GND DRV linear regulator negative header
J4 - IN Input power positive header
J5 - GND Battery negative header
J6 - DRV DRV linear regulator positive output
J7 - DRV/GND DRV linear regulator positive and negative terminals
J8 - GND Input power negative header
J9 - EXT TS/GND External thermistor terminal
J10 - GND SYS output negative header
J11 - SYS/GND SYS output positive and negative terminal
J12 - SYS SYS output positive header
J13 - BAT Battery positive header
J14 - BAT/GND Battery positive and negative header
J15 - USB-to-GPIO USB-to-GPIO box keyed connector
1.5 Test Points
Test Point Description
TP1 BAT
TP2 SW
TP3 GND
TP4 SYS
TP5 IN
TP6 STAT
TP7 GND
TP8 INT
TP9 TS
TP10 SCL
TP11 SDA
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1.6 Control and Key Parameters Setting
Jumper Description Default Factory Setting
JP1 Leave jumper open OPEN
JP2 Shorting jumper to connect DRV to anode of D1 STAT LED SHORTED
JP3 Shorting jumper to connect DRV to anode of D1 INT LED SHORTED
GATE = SYS: External PFET's gate tied to SYS and therefore disabled.
JP4 GATE = BGATE: External PFET's gate tied to BGATE pin and therefore controlled by GATE=BGATE
IC.
CD = LO: Charge disable low for normal operation
JP5 CD = LO
CD = HI: Charge disable high to disable the buck converter and enter Hi-Z mode
TS = SIM: Connects a potentiometer to the TS pin so that the potentiometer can
simulator a thermistor. The potentiometer has been preset per R5 and R6 so that the
TS voltage is 0.5 x V (DRV).
JP6 TS=SIM
TS = EXT: Connects the TS pin to an external thermistor through J9. The resistor
divider formed by R5 and R6 has been sized to accommodate a 10-kΩthermistor. If a
different thermistor is used, R5 and R6 must be resized.
PSEL = LO: Input current limit is set to 1.5 A until changed by I2C.
JP7 PSEL = HI
PSEL = HI: Input current limit is set to USB100 until changed by I2C.
1.7 Recommended Operating Conditions
Min Typ Max Unit
Supply voltage, VIN Input voltage from ac adapter 4.2 10.0 V
System voltage, VSYS Voltage output at SYS terminal ; depends on VBAT voltage 3.4 VBATR V
and status of VINDPM) EG+3%
Battery voltage, VBAT Voltage output at VBAT terminal (registers set via I2C 1.9 4.2 4.44 V
communication)
Supply current, IIN(MAX) Maximum input current from ac adapter input (registers set 0.1 2.5 A
via I2C communication)
Fast charge current, Battery charge current (registers set via I2C communication) 0.500 3.0 A
ICHRG(MAX)
Operating junction temperature range, TJ-40 125 °C
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Test Summary www.ti.com
2 Test Summary
This procedure describes one test configuration of the bq24261MEVM-691 evaluation board for bench
evaluation.
2.1 Definitions
The following naming conventions are followed.
VXXX : External voltage supply name (VADP, VBT, VSBT)
LOADW: External load name (LOAD1, LOAD2)
V(TPyyy): Voltage at internal test point TPyyy. For example, V(TP12) means the voltage at
TP12.
V(Jxx): Voltage at header Jxx
V(TP(XXX)): Voltage at test point XXX. For example, V(ACDET) means the voltage at the test
point which is marked as ACDET.
V(XXX, YYY): Voltage across point XXX and YYY.
I(JXX(YYY)): Current going out from the YYY terminal of header XX.
Jxx(BBB): Terminal or pin BBB of header xx.
JPx ON : Internal jumper Jxx terminals are shorted.
JPx OFF: Internal jumper Jxx terminals are open.
JPx (-YY-) ON: Internal jumper Jxx adjacent terminals marked as YY are shorted.
Measure: →A,B Check specified parameters A, B. If measured values are not within specified limits,
the unit under test has failed.
Observe →A,B Observe if A, B occur. If they do not occur, the unit under test has failed.
Assembly drawings have location for jumpers, test points, and individual components.
2.2 Recommended Test Equipment
2.2.1 Power Supplies
1. Power Supply #1 (PS #1) capable of supplying 6 V at 2 A is required.
2. If not using a battery as the load, then power supply #2 (PS #2) capable of supplying up to 5 V at 5 A
is required to power the circuit shown in Figure 2.
2.2.2 Load #1 Between BAT and GND
Testing with an actual battery is the best way to verify operation in the system. If a battery is not available,
then a circuit similar to the one shown in Figure 2 can simulate a battery when connected to a power
supply.
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Figure 2. BAT_Load (PR1010) Schematic
2.2.3 Load #2 Between SYS and GND
Although not required, a resistive load capable of sinking up to 3 A can be used.
2.2.4 Meters
Four equivalent voltage meters (VM #) and two equivalent current meters (CM #) are required. The current
meters must be able to measure 2-A current.
2.2.5 Computer
A computer with at least one USB port and a USB cable is required. The bq24261M evaluation software
must be properly installed.
2.2.6 HPA172 Communication Kit (USB TO GPIO)
An HPA172 USB-to-I2C communication kit is required.
2.2.7 Software
Download Battery Management Studio.zip from the charger's product folder, unzip the file, and double-
click on the SETUP.EXE file. Follow the installation steps.
Because the bq24261M has the watchdog timers enabled, it is recommended that you set the software's
Reset Watchdog Timer to reset every 5 seconds. Otherwise, after 30 seconds of operation, the IC enters
Default mode. Note that the 27-minute safety timer is not reset by this function and eventually times out if
charging does not complete, unless the Safety Timer Time Limit is expanded or disabled via the GUI.
One way to reset the safety timer is to allow the 30-second watchdog timer to expire. See Figure 3 in the
data sheet for more information about the timers.
Also, it is generally helpful to activate the Write On Change functions, in the upper left of the GUI window,
to ON. The Write On Change function writes any changes to the GUI's check boxes, drop-down boxes,
and registers to the IC. Otherwise, the user must click the WRITE button to write changes to the software.
It is recommended that the user periodically click the READ button to find the IC's instantaneous status.
Alternatively, the AutoRead function can be activated to periodically update the GUI with the IC's status.
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2.3 Recommended Test Equipment Setup
1. For all power connections, use short, twisted-pair wires of appropriate gauge wire for the amount of the
current.
2. Set power supply #1 (PS #1) for 6-V, 2-A current limit and then turn off supply.
3. If BAT_Load as shown in Figure 1 is used, connect Power Supply #2 (PS #2) set to approximately 3.6
V to the input side (PS #2+/-) of BAT_Load, then turn off PS #2.
4. Connect the output side of the battery or BAT_Load in series with current meter (multimeter) #2 (CM
#2) to J2 and J6 or J3 (BAT, GND). Ensure that a voltage meter is connected across J2 or TP3 and J6
or TP9 (BAT, GND).
5. Connect VM #3 across J10 or TP7 and J14 or TP9 (SYS, GND).
6. Connect VM #4 across J15 or TP5 and J14 or TP9 (DRV, GND).
7. Connect J17 to EV2400 kit by the 4-pin ribbon cable. Connect the USB port of the EV2400 kit to the
USB port of the computer. The connections are shown in Figure 3.
Figure 3. Connections of HPA172 Kit
8. Ensure jumpers are at the default factory settings per Section 1.6.
9. After the preceding steps have been performed, the test setup for bq24261MEVM-691 is configured as
is shown in Figure 4.
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Figure 4. Original Test Setup for bq24261MEVM-691
10. Turn on the computer. Open the bq24261M evaluation software. The main window of the software is
shown in Figure 5.
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Figure 5. Main Window of bq24261MSW Evaluation Software
2.4 Recommended Test Procedure
The following test procedure may be useful for evaluating the charger IC outside of a real system, if no
battery is available to connect to the output and a simulated battery if needed.
2.4.1 Charge Voltage and Current Regulation of IN in HOST mode
1. Ensure that the Section 2.3 steps are followed.
2. Ensure that the shunts are installed as highlighted in yellow in Figure 4.
3. Connect the output of Power Supply #1 (PS #1), with at least a 4-A current limit setting, in series with
current meter (multimeter) #1 (CM #1) to J1 as shown in Figure 4.
4. Connect voltage meter 1 (VM #1) across J4 and J3 or TP5 and or TP7 (IN, GND).
5. Connect either a real single cell lithium ion battery or battery simulator across J14 or J13/J5 (BAT,
GND) with current meter #2 in series as shown in Figure 4. If using a battery simulator like the one
shown in Figure 2and referred to as BAT_LOAD in Figure 4, configure power supply #2 (PS#2) with at
least 4-A current limit for 3.4 V.
6. Install voltage meter #1 (VM #1) across J4 and J3 or TP5 and TP7 (IN and GND).
7. Install voltage meter #2 (VM #2) across J13 and J5 or TP1 and TP7 (BAT and GND).
8. Install voltage meter #3 (VM #3) across J12 and J10 or TP4 and TP7 (SYS and GND).
9. Voltage meter #4 is optional.
10. Turn on PS #1 and PS #2 if used.
11. Software setup:
• Press the READ button to obtain the current settings.
• Set Write On Change to ON if not already set.
• Set Reset Watchdog Timer to reset every 5 seconds.
• Uncheck Disable Charging if checked.
• Check Enable STAT/INT Outputs.
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• Set Battery Regulation Voltage to 4.20 V.
• Set Input Current Limit to 2.5 A.
• Set Charge Current to 2000 mA.
• Click the READ button at the top of the window and confirm that the previous settings remain.
12. To test charge current regulation, adjust the PS #1 power supply so that VM #1 still reads 5 V and
PS#2 so that the voltage measured by VM#2 is 3.6 V.
Measure on CM#2 →ICHRG = 2000 mA ±100 mA
Measure on CM#1 →IIN < 1600 mA.
13. To test input current limit, lower the software's Input Current Limit setting to 900 mA then readjust PS
#1 so that VM #1 reads 5 V and PS#2 reads 3.6 V.
Measure on CM#2 →ICHRG < 2000 mA.
Measure on CM#1 →IIN = 800 mA – 900 mA .
14. To test minimum system voltage and DPPM, return the software's Input Current Limit setting to 2500
mA then lower PS #2 until VM#2 reads 3.3 V. Add an external resistive or constant current load across
J13 and J5 that does not draw more than 2.5 A from SYS.
Measure on VM#3 →3.44 V – 3.55 V.
Measure on CM#2 →ICHRG = 2000 mA ±100 mA minus the load current on SYS.
15. To test VINDPM function, remove the load on SYS, adjust PS#1 so that VM#1 reads 5 V, adjust PS# 2
so that VM#2 reads 3.6 V and then lower the current limit setting on PS#1 to below the software's
Charge Current setting.
Measure on VM#1 →VIN = software's V INDPM level (default of 4.2 V).
Measure on CM#2 →ICHRG < 2000 mA.
16. To test battery regulation and charge termination, return the PS#1 current limit to 4-A and confirm that
the software's Enable Termination box is checked then slowly increase PS#2 until VM#2 reaches 4.2
V.
Measure on CM#2 →ICHRG slowly tapers to the software's ITERM setting (default of 150 mA) and then
drops to zero.
Observe →LEDs turn off.
17. To test battery supplement mode, lower PS #2 until VM#2 reads 3.6 V. Add an external resistive or
constant current load across J13 and J5 that draws more than 2 A from SYS.
Measure on VM#4 →3.6 V - IBATSUP × RDSON(BATFET).
Measure on #2 →ICHRG =-IBATSUP
18. Turn off PS #1 and PS #2.
2.4.2 Helpful Hints
1. The leads/cables to the various power supplies have resistance. The current meters also have series
resistance. Therefore, you must use voltmeters to measure the voltage as close to the IC pins as
possible instead of relying on the supplies digital readouts.
2. When using a sourcemeter that can source and sink current as your battery simulator, it is highly
recommended to add a large (1000 µF+) capacitor at the EVM BAT and GND connectors in order to
prevent oscillations at the BAT pin due to mismatched impedances of the charger output and
sourcemeter input within their respective regulation loop bandwidths. Configuring the sourcemeter for
4-wire sensing eliminates the need for a separate voltmeter to measure the voltage at the BAT pin.
When using 4-wire sensing, always ensure that the sensing leads are connected first in order to
prevent accidental overvoltage by the power leads.
3. For precise measurements of charge current and battery regulation near termination, the current meter
in series with the battery or battery simulator must be removed. An alternate method for measuring
charge current is to either use an oscilloscope with hall effect current probe or place a 1% or better,
thermally capable (for example, 0.010 Ωin 1206 or larger footprint) resistor in series between the BAT
pin and battery and measure the voltage across that resistor.
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Printed-Circuit Board Layout Guideline www.ti.com
3 Printed-Circuit Board Layout Guideline
1. To obtain optimal performance, the power input capacitors, connected from the PMID input to PGND,
must be placed as close as possible to the IC.
2. Place 4.7-µF input capacitor as close to PMID pin and PGND pin as possible to make the high-
frequency current loop area as small as possible. Place 1-µF input capacitor GNDs as close to the
respective PMID capacitor GND and PGND pins as possible to minimize the ground difference
between the input and PMID.
3. The local bypass capacitor from SYS to GND must be connected between the SYS pin and PGND of
the IC. The intent is to minimize the current path loop area from the SW pin through the LC filter and
back to the PGND pin.
4. Place all decoupling capacitors close to their respective IC pins and as close as to PGND (do not place
components such that routing interrupts power stage currents). All small control signals must be routed
away from the high-current paths.
5. The PCB must have a ground plane (return) connected directly to the return of all components through
vias (two vias per capacitor for power-stage capacitors, one via per capacitor for small-signal
components). It is also recommended to put vias inside the PGND pads for the IC, if possible. A star
ground design approach is typically used to keep circuit block currents isolated (high-power/low-power
small-signal) which reduces noise-coupling and ground-bounce issues. A single ground plane for this
design gives good results. With this small layout and a single ground plane, no ground-bounce issue
exists, and having the components segregated minimizes coupling between signals.
6. The high-current charge paths into IN, USB, BAT, SYS, and from the SW pins must be sized
appropriately for the maximum charge current in order to avoid voltage drops in these traces. The
PGND pins must be connected to the ground plane to return current through the internal low-side FET.
7. For high-current applications, the balls for the power paths must be connected to as much copper in
the board as possible. This allows better thermal performance because the board conducts heat away
from the IC.
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www.ti.com Bill of Materials and Board Layout
4 Bill of Materials and Board Layout
4.1 Bill of Materials
Table 1 lists the bill of materials for this EVM.
Table 1. Bill of Materials - bq24261MEVM-691
Designator Description Manufacturer PartNumber Qty
!PCB Printed Circuit Board Any PWR691 1
C1 CAP, CERM, 4.7 µF, 25 V, +/- 20%, X5R, 0402 MuRata GRM155R61E475ME15 1
C2 CAP, CERM, 1 µF, 10 V, +/- 10%, X7S, 0402 TDK C1005X7S1A105K050BC 1
C3 CAP, CERM, 0.033 µF, 25 V, +/- 10%, X7R, 0402 MuRata GRM155R71E333KA88D 1
C4 CAP, CERM, 1 µF, 10 V, +/- 10%, X5R, 0402 MuRata GRM155R61A105KE15D 1
C5 CAP, CERM, 22 µF, 10 V, +/- 20%, X5R, SMD, 2-Leads, Body 1.6x0.8mm TDK C1608X5R1A226M080AC 1
C9 CAP, CERM, 1 µF, 25 V, +/- 10%, X5R, 0402 TDK C1005X5R1E105K050BC 1
D1 LED, Green, SMD Lite-On LTST-C190GKT 1
D2 LED, Red, SMD Lite-On LTST-C190CKT 1
J1, J7, J9, J11, J14 Terminal Block, 6A, 3.5mm Pitch, 2-Pos, TH On-Shore Technology ED555/2DS 5
J2 Connector, Receptacle, Micro-USB Type AB, R/A, Bottom Mount SMT Molex 0475890001 1
J3, J4, J5, J6, J8, J10, J12, J13, JP1, JP2, JP3 Header, 100mil, 2x1, TH Mill-Max 800-10-002-10-001000 11
J15 Header (friction lock), 100mil, 4x1, R/A, TH Molex 22-05-3041 1
JP4, JP5 Header, 100mil, 3x1, TH Mill-Max 800-10-003-10-001000 2
L1 Inductor, Wirewound, Metal Composite, 1.5 µH, 3.5 A, 0.07 ohm, SMD TDK SPM4012T-1R5M 1
LBL1 Thermal Transfer Printable Labels, 0.650" W x 0.200" H - 10,000 per roll Brady THT-14-423-10 1
Q1 MOSFET, P-CH, -20 V, -60 A, SON 3.3x3.3mm Texas Instruments CSD25401Q3 1
R1, R2 RES, 200 ohm, 1%, 0.1W, 0603 Vishay-Dale CRCW0603200RFKEA 2
R3, R4 RES, 1.50k ohm, 1%, 0.1W, 0603 Yageo America RC0603FR-071K5L 2
R5 RES, 5.62k ohm, 1%, 0.063W, 0402 Vishay-Dale CRCW04025K62FKED 1
R6 RES, 12.4k ohm, 1%, 0.063W, 0402 Vishay-Dale CRCW040212K4FKED 1
R7 Trimmer, 100k ohm, 0.25W, TH Bourns 3266W-1-104LF 1
R8 RES, 1.00 M, 1%, 0.1 W, 0603 Vishay-Dale CRCW06031M00FKEA 1
R9 RES, 0 ohm, 5%, 0.063W, 0402 Vishay-Dale CRCW04020000Z0ED 1
SH-JP1, SH-JP2, SH-JP3, SH-JP4, SH-JP5 Shunt, 100mil, Gold plated, Black 3M 969102-0000-DA 5
TP1, TP5 Test Point, Miniature, Red, TH Keystone 5000 2
TP2, TP4, TP6, TP8, TP9, TP10, TP11 Test Point, Miniature, White, TH Keystone 5002 7
TP3, TP7 Test Point, Miniature, Black, TH Keystone 5001 2
U1 3A, 30V, Host-Controlled Single-Input, Single Cell Switchmode Li-Ion Battery Charger Texas Instruments bq24261MYFF 1
with Power Path Management and USB-OTG Support, YFF0036ADAD
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4.2 Board Layout
Figure 6 through Figure 11 illustrate the PCB layouts for this EVM.
Figure 6. Top Assembly Layer
14 User's Guide for WCSP-Packaged bq24261M 3-A Battery Charger SLUUBB5A–April 2015–Revised October 2015
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Figure 7. Top Layer
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Figure 8. First Internal Layer
16 User's Guide for WCSP-Packaged bq24261M 3-A Battery Charger SLUUBB5A–April 2015–Revised October 2015
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Figure 9. Second Internal Layer
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Figure 10. Bottom Layer
18 User's Guide for WCSP-Packaged bq24261M 3-A Battery Charger SLUUBB5A–April 2015–Revised October 2015
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Figure 11. Bottom Assembly Drawing
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Revision History
Changes from Original (April 2015) to A Revision .......................................................................................................... Page
• Deleted text "USB connector for IN" from bq24261M EVM Features.............................................................. 2
• Deleted the USB miniconnector from the schematic in Figure 1.................................................................... 3
• Changed J2 – USB To: J2 – Do not use in Section 1.4.............................................................................. 4
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
20 Revision History SLUUBB5A–April 2015–Revised October 2015
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