Texas Instruments DAC7811EVM User manual

1 EVM Overview
1.1 Features
1.2 Introduction
User's GuideSLAU163 – September 2005
DAC7811EVM
This user’s guide describes the characteristics, operation, and use of theDAC7811EVM – a 12-bit, synchronous-serial-interface, digital-to-analog converterevaluation module (EVM). A complete circuit description, a schematic diagram, and billof materials are included.
Contents1 EVM Overview ...................................................................................... 12 Analog Interface .................................................................................... 23 Digital Interface ..................................................................................... 34 Power Supplies ..................................................................................... 35 EVM Operation ...................................................................................... 46 EVM Bill of Materials and Schematic ............................................................ 5
List of Tables
1 Pinout of J1 .......................................................................................... 22 Pinout of J2T ........................................................................................ 33 Pinout of J2B ........................................................................................ 34 Pinout of J3 .......................................................................................... 45 List of Jumpers and Switches ..................................................................... 56 Bill of Materials ...................................................................................... 5
•Evaluation board for the 12-bit current output DAC7811•Onboard reference and buffer circuits•High-speed serial interface•Modular design for use with a variety of DSP and microcontroller interface boards
The DAC7811 is a single, 12-bit, serial-input, current-output, digital-to-analog (DAC) converter operatingfrom a single 3-V to 5-V power supply. This converter provides excellent 4-quadrant multiplicationcharacteristics, with a large signal multiplying bandwidth of 10 MHz. An integrated feedback resistorprovides temperature tracking and full-scale voltage output when combined with an external cur-rent-to-voltage (I-to-V) precision amplifier. The EVM provides the external I-to-V amplifier and DPDTswitch to allow unipolar and bipolar output operation.
The modular EVM form factor allows direct evaluation of the DAC’s performance and operating
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2 Analog Interface
2.1 EVM Output Voltage
Analog Interface
characteristics. This EVM is compatible with the Texas Instruments 5-6K Interface Board (SLAU104 ), theHPA-MCU Interface Board (SLAU106 ) and additional 3
rd
party boards such as the HPA449 DemonstrationBoard from SoftBaugh, Inc. (www.softbaugh.com ). Field programmable gate array (FPGA) users may alsouse the DAC7811EVM with a variety of Xilinx FPGAs by obtaining the Texas Instruments Analog AdapterKit (part number ADS-TI-AD-DAU ) from Avnet Electronics Marketing.
For maximum flexibility, the DAC7811 EVM is designed for easy interfacing to multiple analog sources.Table 1 provides the pinout of connector J1. Samtec part numbers SSW-110-22-F-D-VS-K andTSM-110-01-T-DV-P provide a convenient 10-pin, dual-row header/socket combination at J1. Thisheader/socket provides access to the analog output pins of the DAC through the onboard buffer amplifier.Consult Samtec at www.samtec.com , or call 1-800-SAMTEC-9 for a variety of mating connector options.
Table 1. Pinout of J1
Pin Number Signal Description
J1.2 Iout DAC current output – remove W1 and install R12 using a 0- ΩresistorJ1.4 Vout Option Pins 4-18 (even) are used with W2. W2 is a dual-row, 7-pin header with a shunt jumper usedto apply the output voltage from U2 on various pins of J1. This combination is provided toJ1.6 Vout Option
allow the EVM user the option of daisy-chaining up to a maximum of seven EVMs.J1.8 Vout OptionJ1.10 Vout OptionJ1.12 Vout OptionJ1.14 Vout OptionJ1.16 Vout OptionJ1.18 REF(-) UnusedJ1.20 REF(+) UnusedJ1.15 Vcom UnusedJ1.1–J1.19 (odd) AGND Analog ground connections (except J1.15)
Switch SW1 provides a means to allow unipolar or bipolar output operation of the DAC7811EVM. Whenthe slide switch is to the right, the output voltage on J1.4 and TP2 is ±VREF. If the onboard reference isused, this means that the output voltage is –10 Vdc to +10 Vdc. When the switch is to the left, the outputvoltage from the buffer is dependent on the position of W3. With a negative reference applied (defaultcondition, W3 pins 1-2 shorted), the voltage output from the buffer is 0 V to +10 Vdc. If W3 is located onpins 2-3, a positive 10-V reference is applied to the DAC7811, and the voltage output from the buffer is 0V to –10 Vdc.
For a wider dynamic output range, the EVM can be configured to use an external reference by removingthe shunt at W3 and applying an external source to W3 pin 2 (center pin). In this case, an externalreference of ±15 V may be applied to the DAC7811. For best performance, the external reference must besupplied by a clean ac or dc source.
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3 Digital Interface
4 Power Supplies
Digital Interface
The DAC7811EVM is designed for easy interfacing to multiple control platforms. Table 2 provides thepinout of connector J2T located on the top side of the EVM; Table 3 provides the pinout of connector J2Blocated on the bottom side of the EVM. This header/socket combination allows the EVM user to stack upto seven DAC7811EVMs together to demonstrate daisy-chain operation of the converter.
CAUTIONFor daisy-chain operation, the shunt jumper at W2 should be moved foreach board in the stack so that the output voltages appear on differentpins of J1. Output voltages from multiple EVMs applied to the same pin ofJ1 may cause permanent damage to the output amplifiers found at U2.
Table 2. Pinout of J2T
Pin Number Signal Description
J2.1 UnusedJ2.3 SCLK Serial Clock - Signal is common to J2BJ2.5 UnusedJ2.7 SYNC Synchronization input to the DAC. Tied to the Frame Sync for DSP host systems – STE for SPIHost systems - Signal is common to J2BJ2.9 UnusedJ2.11 SDO Serial Data Output - provides delayed serial data to additional EVMs (user may "stack" up toseven boards together) - the applied signal may be monitored at the SDO test point locatedbeside J2.J2.13 UnusedJ2.15 UnusedJ2.17 UnusedJ2.19 SPARE
Table 3. Pinout of J2B
Pin Number Signal Description
J2.1 UnusedJ2.3 SCLK Serial Clock - Signal is common to J2TJ2.5 UnusedJ2.7 SYNC Synchronization input to the DAC. Tied to the Frame Sync for DSP host systems – STE for SPIHost systems - Signal is common to J2TJ2.9 UnusedJ2.11 SDI Serial Data Input - the applied signal may be monitored at the SDI test point located beside J2.J2.13 UnusedJ2.15 UnusedJ2.17 UnusedJ2.19 SPARE
The DAC7811EVM board requires ±15 Vdc (max) for the analog section. This includes the 10-V reference(U1) and its buffer (U3), an INA105 used to derive the –10-V reference voltage (U4), and the outputbuffers (U2). All applied voltages should be from clean dc sources that are current limited to preventdamage caused by accidental short circuits. Before changing the reference configuration or the outputvoltage selection, it is recommended that the power first be removed from the EVM.
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4.1 Stand-Alone Operation
4.2 Reference Voltage
5 EVM Operation
5.1 Analog Output
EVM Operation
Supply voltages of +2.7 Vdc to +5.5 Vdc for the V
DD
supply to the DAC7811 are also required. When usedwith one of the previously mentioned interface boards, J3 provides connection to the common power busdescribed in the 5-6K Interface Board EVM User's Guide (SLAU104 ).
Table 4 shows the pinout of connector J3.
Table 4. Pinout of J3
Signal Pin Number Signal
Unused 1 2 Unused+5VA 3 4 –5VADGND 5 6 AGNDUnused 7 8 UnusedUnused 9 10 +5VD
When used as a stand-alone EVM, the analog power can be applied to J3 pins 3 and 4, referenced to J3pin 6. Digital power can be applied to J3 pin 10, referenced to J3 pin 5. Optimal performance of the EVMrequires a clean, well-regulated power source.
CAUTIONThe DAC7811 has a V
DD
power source requirement of +2.7 Vdc to +5.5 Vdc.If using an external reference source, keep the reference voltage to a levelless than or equal to the maximum limits described in the ElectricalCharacteristics table of the DAC7811 data sheet.
The DAC7811 can be configured to use the onboard reference/buffer circuits (U1, U3, and U4) or anexternal reference applied to W3, pin 2 (completely remove shunt jumper). Jumper W3 controls thereference source. In the factory default position (shunt on W3 pins 1-2), a –10-V reference is applied tothe DAC7811 (U5). Moving the shunt at W3 to pins 2-3 applies a positive 10-V reference to the DAC7811.
The DAC7811, as a 2-quadrant multiplying DAC, can be used to generate a unipolar output. The polarityof the full-scale output IOUT is the inverse of the input reference voltage at VREF. Some applicationsrequire full 4-quadrant multiplying capabilities or bipolar output swing. As shown in the schematic, thesecond half of U2 is added as a summing amplifier and has a gain of 2X that widens the output span to 20V. A 4-quadrant multiplying circuit is implemented by using a 10-V offset from the reference voltage to biasU4.
The analog output is applied to J1 pins 4 to 14 (even) by the application of a shunt jumper on W2. Thefactory default is to apply the voltage output from U2 to J1.4. The analog output range depends on theconfiguration of the EVM and the reference applied to the DAC7811. See Sections 3 and 4.2 of this user'sguide and the DAC7811 data sheet (SBAS337 ) to determine the maximum analog output range.
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5.2 Digital Control
5.3 Frame Synchronization ( SYNC)
5.4 Default Jumper Locations
6 EVM Bill of Materials and Schematic
EVM Bill of Materials and Schematic
The digital control signals SYNC and SCLK can be applied directly to J2 (top or bottom side). The serialdata input must be applied to J2B pin 11 or the test point labeled SDI found beside J2. The DAC7811EVM can also be connected directly to a DSP or microcontroller interface board such as the 5-6KInterface Board, the HPA-MCU Interface Board, or the HPA449. See the DAC7811 product folder on theTI Web site (www.ti.com ) for a current list of compatible interface and/or accessory boards.
Connector J2 pin 7 applies the frame synchronization control to the DAC7811’s SYNC pin. When using a5-6K Interface or HPA-MCU Interface Board, J2 pin 7 ties the SYNC pin to the Frame Sync pin of the DSPor STE pin of the microcontroller. A 16-bit command+data word is then applied to the SDI input of theDAC7811. Releasing the active low SYNC pin updates the DAC output.
The DAC7811 powers up in the daisy-chain mode which must be used when two or more devices areconnected in tandem. The SCLK and SYNC signals are shared across all devices while the SDO output ofthe first device connects to the SDIN input of the following device, and so forth. In this configuration, 16SCLK cycles for each DAC7811 in the chain are required. For n devices in a daisy-chain configuration,16n SCLK cycles are required to shift in the entire input data stream. After 16n active SCLK edges arereceived following a falling SYNC, the data stream becomes complete, and SYNC can brought high toupdate the DAC outputs. Up to seven DAC7811EVMs can be used in this mode simultaneously.
Table 5 provides a list of jumpers and switches found on the EVM and their factory default conditions.
Table 5. List of Jumpers and Switches
Jumper Shunt Position Jumper Description
W1 closed Applies the DAC7811 current output to U2. W1 is fixed with a 0- Ωresistor.W2 Pins 1-2 Controls which pin on J1 the output voltage from U2 is applied to. Default is pin 4. Output voltage fromthe EVM can also be monitored on TP2, which is useful for daisy-chain operating mode.SW1 RIGHT Controls analog output voltage (default is ±Vref)R12 OPEN R12 can be replaced by removing the 0- Ωresistor found at W1 to provide the current output directlyfrom the DAC7811 to J1 pin 2.
Table 6 contains a complete bill of materials for the modular DAC7811 EVM. The schematic diagram isalso provided for reference.
Table 6. Bill of Materials
Designators Description Manufacturer Mfg. Part Number
C1 2.2 µF, 0805, Ceramic TDK C2012X5R1A225KC2 C3 C6 C7 C8 C10 0.1 µF, 0603, Ceramic, X7R, 50V TDK C1608X7R1H104KC4 18 pF, 0603, Ceramic, COG TDK C1608COG1H180JC9 10 µF, 1206, Ceramic, Y5V TDK C3216Y5V1C106ZJ1 J2 (top side) 10 Pin, Dual Row, SMT Header (20 Pos.) Samtec TSM-110-01-T-DV-PJ1B J2B(bottom side) 10 Pin, Dual Row, SMT Socket (20 Pos.) Samtec SSW-110-22-F-D-VS-KJ3 (top side) 5 Pin, Dual Row, SMT Header (10 Pos.) Samtec TSM-105-01-T-DV-PJ3B (bottom side) 5 Pin, Dual Row, SMT socket (10 Pos.) Samtec SSW-105-22-F-D-VS-KR1 R13 20K Ω, 0603, 5%, 0.1 W resistor Yageo America 9C06031A2002JLHFTR3 R4 20K Ω, 4mm POT Bourns 3214W-1-203E
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EVM Bill of Materials and Schematic
Table 6. Bill of Materials (continued)
Designators Description Manufacturer Mfg. Part Number
R5 R7 20 Ω, 0603, 5%, 0.1 W resistor Yageo America 9C06031A20R0JLHFTR2 R6 R8 10K Ω, 0603, 5%, 0.1 W resistor Yageo America 9C06031A1002JLHFTR9 R11 W1 0 Ω, 0603, 5%, 0.1 W resistor Yageo America 9C06031A0R00JLHFTSW1 DPDT Slide Switch E Switch EG2209TP1 TP2 Turret Type Test Point MillMax 2348-2-00-01-00-00-07U1 REF102 TI REF102AUU2 OPA2277 TI OPA2277UU3 OPA277 TI OPA277UU4 INA105 TI INA105KUU5 DAC7811 TI DAC7811IDGSTW2 7 Pin, Dual Row, 2mm Header Samtec TMM-107-03-T-DW3 3 Pin, Single Row, 2mm Header Samtec TMM-103-03-T-S
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Ati
12500 TI Boulevard. Dallas, Texas 75243
Title:
SHEET: OF:
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Revision History
REV ECN Number Approved
DAC78x1_RevA.Sch
DOCUMENTCONTROL #
C2
0.1µF
C8
0.1µF
VDD
VCC
1 2
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910
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DAC7811 EVM
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VCC
VSS
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+5VA -5VA VDD+3.3VD VD2 VD1
C5
0.01µF
REF
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V+ 7
NC 8
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OUT 6
TRIM 5
TEMP
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C7
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C10
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VSS
VCC
VOUT
RFB
W1
DAC_IOUT
6473313
R9
0 ohm
VDD 8
SYNC# 6
SDIN 5
IOUT2
2
SCLK 4
GND 3
IOUT1
1SDO 7
Vref
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Rfb
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DAC7811
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A Initial Release TH

FCC Warnings
This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequencyenergy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules,which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in otherenvironments may cause interference with radio communications, in which case the user at his own expense will be required totake whatever measures may be required to correct this interference.
EVM IMPORTANT NOTICE
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OREVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use. Assuch, the goods being provided may not be complete in terms of required design-, marketing-,and/or manufacturing-related protective considerations, including product safety measures typi-cally found in the end product incorporating the goods. As a prototype, this product does not fallwithin the scope of the European Union directive on electromagnetic compatibility and thereforemay not meet the technical requirements of the directive.Should this evaluation kit not meet the specifications indicated in the EVM User's Guide, the kitmay be returned within 30 days from the date of delivery for a full refund. THE FOREGOINGWARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEUOF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANYWARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.The user assumes all responsibility and liability for proper and safe handling of the goods. Further,the user indemnifies TI from all claims arising from the handling or use of the goods. Please beaware that the products received may not be regulatory compliant or agency certified (FCC, UL,CE, etc.). Due to the open construction of the product, it is the user's responsibility to take anyand all appropriate precautions with regard to electrostatic discharge.EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTYSHALL BE Liable to the other FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUEN-TIAL DAMAGES.
TI currently deals with a variety of customers for products, and therefore our arrangement with theuser is not exclusive.TI assumes no liability for applications assistance, customer product design, softwareperformance, or infringement of patents or services described herein.Please read the EVM User's Guide and, specifically, the EVM Warnings and Restrictions notice inthe EVM User's Guide prior to handling the product. This notice contains important safetyinformation about temperatures and voltages. For further safety concerns, please contact the TIapplication engineer.Persons handling the product must have electronics training and observe good laboratory practicestandards.
No license is granted under any patent right or other intellectual property right of TI covering orrelating to any machine, process, or combination in which such TI products or services might beor are used.

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EVM Bill of Materials and Schematic
EVM WARNINGS AND RESTRICTIONS
It is important to operate this EVM within the input voltage range of 0 Vdc to 15 Vdc and theoutput voltage range of -10 Vdc to 10 Vdc.Exceeding the specified input range may cause unexpected operation and/or irreversible damageto the EVM. If there are questions concerning the input range, please contact a TI fieldrepresentative prior to connecting the input power.Applying loads outside of the specified output range may result in unintended operation and/orpossible permanent damage to the EVM. Please consult the EVM User's Guide prior toconnecting any load to the EVM output. If there is uncertainty as to the load specification, pleasecontact a TI field representative.During normal operation, some circuit components may have case temperatures greater than30 °C. The EVM is designed to operate properly with certain components above 30 °C as long asthe input and output ranges are maintained. These components include but are not limited tolinear regulators, switching transistors, pass transistors, and current sense resistors. These typesof devices can be identified using the EVM schematic located in the EVM User's Guide. Whenplacing measurement probes near these devices during operation, please be aware that thesedevices may be very warm to the touch.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2005, Texas Instruments Incorporated
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