Texas Instruments INAEVM-ALT-SO8 User manual

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Universal Instrumentation Amplifier Evaluation Module: Alternate Pinout
User's Guide
SBOU226–February 2020
Universal Instrumentation Amplifier Evaluation Module:
Alternate Pinout
This user's guide describes the characteristics, operation, and use of the INAEVM-ALT-SO8, a universal
evaluation module (EVM) that is compatible with a variety of instrumentation amplifiers (INAs), specifically
those with the resistor gain pins at pins 2 and 3. This EVM is compatible with the SOIC-8 (D) package,
and is designed to evaluate the performance of the devices in both single-supply and dual-supply
configurations. This document includes the schematic, printed circuit board (PCB) layout, and BOM.
Throughout this document the terms evaluation board, evaluation module, and EVM are synonymous with
the universal INAEVM-ALT-SO8.

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Contents
1 Overview ..................................................................................................................... 3
1.1 Features ............................................................................................................. 3
1.2 INA Pinout ........................................................................................................... 3
2 Quick Start.................................................................................................................... 4
2.1 Dual-Supply Configuration......................................................................................... 4
2.2 Single-Supply Configuration....................................................................................... 5
3 EVM Components ........................................................................................................... 8
3.1 Power................................................................................................................. 8
3.2 Inputs................................................................................................................. 8
3.3 Output ................................................................................................................ 8
3.4 Reference............................................................................................................ 8
3.5 Miscellaneous ....................................................................................................... 8
4 Schematic, PCB Layout, and Bill of Materials ........................................................................... 9
4.1 Schematic............................................................................................................ 9
4.2 PCB Layout ........................................................................................................ 11
4.3 Bill of Materials .................................................................................................... 12
List of Figures
1 Universal INAEVM-ALT-SO8 Pinout ...................................................................................... 3
2 Dual-Supply Configuration.................................................................................................. 4
3 Single-Supply Configuration, Direct Reference Connection ........................................................... 5
4 Single-Supply Configuration, Buffered Reference Connection ........................................................ 6
5 Universal INAEVM-ALT-SO8 Schematic (1) ............................................................................. 9
6 Universal INAEVM-ALT-SO8 Schematic (2)............................................................................ 10
7 Universal INAEVM-ALT-SO8 PCB ...................................................................................... 11
List of Tables
1 Universal INAEVM-ALT-SO8 Bill of Materials ......................................................................... 12
Trademarks
All trademarks are the property of their respective owners.

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1 Overview
1.1 Features
This EVM is intended to provide basic functional evaluation of the instrumentation amplifiers with the
pinout shown in Figure 1. The EVM provide the following features:
• Intuitive evaluation with the silkscreen schematic
• Easy access to nodes with surface-mount test points
• Reference voltage source flexibility
• Convenient input and output filtering
1.2 INA Pinout
The INAEVM-ALT-SO8 is evaluates INAs that have the pinout shown in Figure 1, specifically those with
the gain resistor pins at positions 2 and 3.
Figure 1. Universal INAEVM-ALT-SO8 Pinout

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2 Quick Start
2.1 Dual-Supply Configuration
Figure 2 shows an example of how to set up the EVM for dual-supply operation.
Figure 2. Dual-Supply Configuration
1. +VS to test point TP1
2. –VS to test point TP8
3. Install jumper shunt to position 1 and 2 on J1
4. Differential input signal connect to test points TP10 and TP12
5. Observe output at test point TP11
NOTE: C9 and C15 are prepopulated with 0.1-µF power-supply decoupling capacitors. See the
respective device data sheet for additional power-supply decoupling information.

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2.2 Single-Supply Configuration
2.2.1 Direct Reference Connection
Figure 3 shows an example of how to set up the EVM for single-supply operation with a direct voltage
connection to the reference pin.
Figure 3. Single-Supply Configuration, Direct Reference Connection
1. +VS to test point TP1
2. GND to test point TP8
3. Install jumper shunt to positions 2 and 3 on J1
4. Remove resistor R13
5. Reference voltage to test point TP13
6. Differential input signal to test points TP10 and TP12
7. Observe output at test point TP11
NOTE: C9 and C15 are prepopulated with 0.1-µF power-supply decoupling capacitors. It is not
required to remove C15 for proper single-supply operation. See the respective device data
sheet for additional power-supply decoupling information.

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2.2.2 Buffered-Reference Voltage Connection
A buffered-reference configuration is useful when the source impedance is high (for example, a voltage
divider). Buffering a high-impedance source with an operational amplifier provides a low-impedance
source and preserves common-mode rejection. Figure 4 shows an example of how to set up the EVM for
single-supply operation with a buffered-reference voltage connection.
Figure 4. Single-Supply Configuration, Buffered Reference Connection

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1. +VS to test point TP1
2. +OAV to test point TP2
3. GND to test points TP8 and TP9
4. Install jumper shunt on positions 2 and 3 on J1 and J2
5. VREF to test point TP14
6. Make sure that resistor R13 is not populated
7. Populate C13 with a 0-Ωresistor. The capacitor and resistor have the same footprint
8. Differential input signal to test points TP10 and TP12
9. Observe output at test points TP11
NOTE: C9 and C15 are prepopulated with 0.1-µF power-supply decoupling capacitors. It is not
required to remove C15 for proper single-supply operation. See the respective device data
sheet for additional power-supply decoupling information.

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3 EVM Components
3.1 Power
Power is applied to the device with test points TP1 and TP8. For the unpopulated device (U2), power is
applied using test points TP2 and TP9.
3.2 Inputs
Inputs are applied to the device using test points TP12 and TP10. The inputs for U2 are applied through
test points TP14 and TP11.
3.2.1 Input Filtering
R4, R9, and C10, C11, C14 provide the ability to apply common-mode and differential-mode filtering to the
inputs. The cutoff frequencies for the filters are shown in Equation 1 and Equation 2.Make C11
approximately ten times larger than C10 and C14. These calculations presume R4 = R9 and C10 = C14.
Common-mode cutoff frequency:
(1)
Differential-mode cutoff frequency:
(2)
3.3 Output
Access the output of the device with test point TP11.
3.3.1 Output Filtering
R5 and C12 provide the ability to apply a single-pole RC output filter. The cutoff frequency of the output
filter can be calculated as shown in Equation 3.
(3)
3.4 Reference
There are multiple methods of applying a reference voltage to the device. A straightforward approach is to
apply a voltage to test point TP13 with U2 and R13 not populated. If a buffered voltage is desired, U2 can
be populated with an operational amplifier in an appropriate SO-8 package and pinout. If the reference
voltage is GND, R5 is populated with a 0-Ωresistor.
3.5 Miscellaneous
C1, C2, C5, and C6 are the populated bypass capacitors for the device, U1. Similarly, C3, C4, C7 and C8
are populated to provide supply bypassing for U2.

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4 Schematic, PCB Layout, and Bill of Materials
4.1 Schematic
The schematic for the PCB for the SOIC-8 EVM is shown in Figure 5 and Figure 6.
Figure 5. Universal INAEVM-ALT-SO8 Schematic (1)

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Figure 6. Universal INAEVM-ALT-SO8 Schematic (2)