Texas Instruments LMX2492EVM User manual

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LMX2492EVM Evaluation Module
User's Guide
SNAU160E–March 2014–Revised October 2017
LMX2492EVM Evaluation Module
The LMX2492EVM is design to evaluate the performance of LMX2492. This board consists of a LMX2492
device, a LP5900-3.3V LDO, a 9.4 - 10.8 GHz VCO and a 100 MHz crystal oscillator.
The LMX2492 is a low noise 14 GHz wideband delta-sigma fractional N PLL with ramp and chirp
generation. It consists of a phase frequency detector, programmable charge pump, and high frequency
input for the external VCO. The LMX2492 supports a broad and flexible class of ramping capabilities,
including FSK and configurable piecewise linear FM modulation profiles of up to 8 segments.
Contents
1 LMX2492EVM Evaluation Module......................................................................................... 3
2 Setup .......................................................................................................................... 4

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3 Typical Measurement ....................................................................................................... 6
4 Schematic ................................................................................................................... 12
5 PCB Layout and Layer Stack-up......................................................................................... 14
6 Bill of Materials ............................................................................................................. 17
7 Troubleshooting Guide .................................................................................................... 18
Appendix A USB2ANY Firmware Upgrade................................................................................... 19
Appendix B Using Different Reference Clock................................................................................ 22
List of Figures
1 EVM Connection Diagram.................................................................................................. 4
2 Select Device in TICS Pro.................................................................................................. 5
3 Default Mode................................................................................................................. 5
4 IO Port......................................................................................................................... 5
5 Loop Filter .................................................................................................................... 6
6 Default Output................................................................................................................ 7
7 TICS Pro FSK Configuration ............................................................................................... 7
8 FSK Example................................................................................................................. 8
9 Continuous Sawtooth Ramp Configuration............................................................................... 8
10 Continuous Sawtooth Ramp Example .................................................................................... 9
11 Continuous Trapezoid Ramp Configuration.............................................................................. 9
12 Flag Out Pins Configuration .............................................................................................. 10
13 Flags Out Timing........................................................................................................... 10
14 Continuous Trapezoid Ramp Example.................................................................................. 10
15 Readback Setting .......................................................................................................... 11
16 Register Readback......................................................................................................... 11
17 LMX2492EVM Schematic (Page 1)...................................................................................... 12
18 LMX2492EVM Schematic (Page 2)...................................................................................... 13
19 PCB Layer Stack-up ....................................................................................................... 14
20 Top Layer ................................................................................................................... 14
21 GND Layer .................................................................................................................. 15
22 Power Layer ................................................................................................................ 15
23 Bottom Layer................................................................................................................ 16
24 Troubleshooting Guide .................................................................................................... 18
25 Firmware Requirement .................................................................................................... 19
26 Firmware Loader ........................................................................................................... 19
27 BSL Button.................................................................................................................. 20
28 Update Firmware ......................................................................................................... 20
29 Firmware Update Completed............................................................................................. 21
30 USB Communications ..................................................................................................... 21
31 Reference Clock Input Configuration .................................................................................... 22
List of Tables
1 Loop Filter Configuration.................................................................................................... 6
2 Bill of Materials ............................................................................................................. 17
Trademarks
All trademarks are the property of their respective owners.

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LMX2492EVM Evaluation Module
1 LMX2492EVM Evaluation Module
1.1 Evaluation Module Contents
In the box, there are:
• One LMX2492EVM board (SV601040-002).
• One USB2ANY module (HPA665-001).
• One USB cable.
• One 10-pin ribbon cable.
1.2 Evaluation Setup Requirement
The evaluation will require the following hardware and software:
• A DC power supply
• A spectrum analyzer or a signal analyzer
• A PC running Windows 7 or more recent version
• An oscilloscope (optional)
• A high quality signal generator (optional)
• A function waveform generator (optional)
• Texas Instruments Clocks and Synthesizers TICS Pro software
• Texas Instruments PLLatinum Simulator Tool (optional)
1.3 Resources
Related evaluation and development resources are as follows:
•LMX2492 datasheet
•LMX2491 datasheet
•TICS Pro software
•PLLatinum Simulator Tool (PLL Sim)

HPA665
USB2ANY
Texas Instruments
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2 Setup
2.1 Connection Diagram
Figure 1. EVM Connection Diagram
2.2 Power Supply
Apply 5-V to Vcc_5V SMA connector. The on-board VCO and the optional op-amp require 5-V supply
while the on-board XO and LMX2492 need 3.3-V supply. The on-board LDO regulates 5-V down to 3.3-V.
Never apply more than 6-V to Vcc_5V SMA connector or otherwise the LDO will be damaged. The total
current consumption of the board is about 240 mA.
2.3 Reference Clock
By default, the board is operated with the on-board 100-MHz CMOS XO. If required, the board can be
modified to operate with an external clock source. In this case, apply a single-ended clock to the OSCin
SMA connector or apply a differential clock to both OSCin and OSCin* SMA connectors. See Appendix B
for details.
2.4 RF Output
Connect RFout/2 SMA connector to a spectrum analyzer or a signal analyzer. By default, the output signal
frequency is 4.8 GHz and the amplitude is about –3 dBm. Because the frequency accuracy of the on-
board XO is 25 ppm, RF output frequency may also be off by 25 ppm. The phase noise of the XO is not
bad but not excellent, as a result, RF output phase noise may not look very good.
2.5 Programming
Connect the uWire header to a PC using the USB2ANY module. The firmware of the USB2ANY may not
be up-to-date. In this case, follow the procedures outlined in Appendix A to get it updated.
2.6 Evaluation Software
Download and install TICS Pro to a PC. Run the software and follow the following steps to get started.
1. Go to "Select Device" →"PLL" →LMX2492

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Figure 2. Select Device in TICS Pro
2. Go to "Default configuration" →"Default Mode xxxx-xx-xx"
Figure 3. Default Mode
2.7 EVM Strap Options
The MUXout pin is not connected to the uWire header but is used as the lock detect indicator. Other IO
pins, such as TRIG1, TRIG2 and MOD are connected to the uWire header. They could be used as the
input trigger sources or output flag indicators during frequency ramping.
Figure 4. IO Port

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3 Typical Measurement
3.1 Default Configuration
3.1.1 Loop Filter
The parameters for the loop filter are:
Table 1. Loop Filter Configuration
PARAMETER VALUE
VCO frequency 9.4 - 10.8 GHz
VCO gain 240 MHz/V
Effective charge pump gain 3.1 mA
Phase detector frequency 100 MHz
Loop bandwidth 435 kHz
Phase margin 60.8 degrees
C1_LF 68 pF
C2_LF 3.9 nF
C3_LF 150 pF
C4_LF Open
R2_LF 390 Ω
R3_LF 150 Ω
R4_LF 0 Ω
Figure 5. Loop Filter
3.1.2 Typical Output
1. Follow Section 2 to setup the evaluation.
2. Go to "USB communications" →"Write All Registers" to write all the registers to LMX2492.
Default output is 4.8 GHz at RFout/2 SMA connector.

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Figure 6. Default Output
3.2 Additional Tests
3.2.1 Frequency Shift Keying (FSK) Example
FSK operation requires an external input trigger signal at either MOD, TRIG1 or TRIG2 pin. In this
example, MOD pin is selected as the Trigger A source. A 20 kHz square-wave clock will be applied to
MOD pin to toggle the RF output to switch between 9600 MHz and 9604 MHz. That is, FSK deviation is 4
MHz.
Figure 7. TICS Pro FSK Configuration

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Figure 8. FSK Example
3.2.2 Continuous Sawtooth Ramp Example
This example shows how to generate a continuous sawtooth ramp. Only one ramp segment is necessary
as it will loop back to itself.
Figure 9. Continuous Sawtooth Ramp Configuration

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Figure 10. Continuous Sawtooth Ramp Example
3.2.3 Continuous Trapezoid Ramp Example
This is a long-ramp example, the ramp duration is 1 ms. RAMPx_DLY is enabled so that the ramp
generator will ramp every 2 phase detector cycles. Output flags are turned on to indicate the start of a
ramp.
Figure 11. Continuous Trapezoid Ramp Configuration

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Figure 12. Flag Out Pins Configuration
Figure 13. Flags Out Timing
Figure 14. Continuous Trapezoid Ramp Example