Texas Instruments HSS-MOTHERBOARDEVM User manual

User’s Guide
High Side Switch Motherboard Evaluation Module
ABSTRACT
The HSS-MOTHERBOARDEVM evaluation module is designed to evaluate the < 50-mΩ Ron devices in TI's
high side switch portfolio. These devices include TPS27SA08, TPS1HA08-Q1, TPS2HB08-Q1, TPS2HB16-Q1,
TPS2HB35-Q1, and TPS2HB50-Q1. This board does not come with the devices populated but allows any of the
devices to be soldered down on the sample daughter card and used in the main motherboard. This user's guide
provides the connectors and test point description, schematic, bill of materials (BOM), and board layout of the
EVM.
Note
This EVM does NOT come with devices populated on the board. The user MUST order samples
separately.
Table of Contents
1 Introduction.............................................................................................................................................................................2
1.1 Descriptions....................................................................................................................................................................... 2
1.2 Applications........................................................................................................................................................................2
1.3 Features............................................................................................................................................................................. 3
2 HSS-MOTHERBOARDEVM Schematic..................................................................................................................................4
3 Connections Descriptions..................................................................................................................................................... 7
3.1 Connectors and Test Points............................................................................................................................................... 7
3.2 Jumpers..............................................................................................................................................................................8
4 HSS-MOTHERBOARDEVM EVM Assembly Drawings and Layout.....................................................................................9
5 Current Limit..........................................................................................................................................................................11
6 Current Sense........................................................................................................................................................................11
7 Transient Protection............................................................................................................................................................. 11
8 Soldering Down U2............................................................................................................................................................... 11
9 Bill of Materials......................................................................................................................................................................11
Revision History.......................................................................................................................................................................13
List of Figures
Figure 2-1. HSS-MOTHERBOARDEVM Motherboard Schematic.............................................................................................. 5
Figure 2-2. HSS-MOTHERBOARDEVM Sample Daughter Card Schematic.............................................................................. 6
Figure 4-1. HSS-MOTHERBOARDEVM Layout and Routing (Top View)....................................................................................9
Figure 4-2. HSS-MOTHERBOARDEVM Layout and Routing (Bottom View)............................................................................10
List of Tables
Table 3-1. Connector and Test Point Descriptions.......................................................................................................................7
Table 3-2. Jumper Descriptions................................................................................................................................................... 8
Trademarks
All trademarks are the property of their respective owners.
www.ti.com Table of Contents
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1 Introduction
Texas Instruments' HSS-MOTHERBOARDEVM evaluation module has a central socket for the supporting
daughtercard with the high side switch device to be populated. The EVM supports the entire single-channel and
dual channel low Ron (≤ 50-mΩ) high-side driver applications. The purpose of this EVM is to facilitate evaluation
of the low Ron high side switches for the diagnostic features and drive resistive, capacitive, and inductive loads.
The EVM is a combination of a central motherboard and a row of daughterboards. The mother board has all
connectors, jumpers, and test points. The daughter board has different footprints to support the low Ron family of
TI's high side switch portfolio. The daughter board also has limiting resistors for the channel devices
(TPS2HBxx-Q1) and since the 1 channel device (TPS1HA08-Q1) has a NC pin in that location the
daughtercards will work for all of the devices.
The daughterboards have 2 different footprints: 24-pin PWP and 16-pin PWP. For installation, a single board
from the panel has to broken, a device soldered down onto the main footprint, and connected to the
motherboard.
Note
Caution must be taken when soldering down the device as the main power pad on the back needs to
be soldered correctly as to not affect performance. Please see PowerPAD Thermally Enhanced
Package app note for more details about the solder profile and techniques.
The current-limiting resistors are on the bottom side of the daughterboard. They are all 10-kΩ, 0805 package.
For the desired current limit value, the resistor can be replaced with different value. Also for the single channel
devices the second resistor should be depopulated.
The jumpers are not installed. Refer to Table 3-1 and Table 3-2 for installation.
1.1 Descriptions
The Texas Instruments HSS-MOTHERBOARDEVM helps designers evaluate the operation and performance of
the TPS27SA08, TPS1HA08-Q1, TPS2HB08-Q1, TPS2HB16-Q1, TPS2HB35-Q1 and TPS2HB50-Q1 devices.
These devices are fully-protected high-side switches, with an integrated NMOS power FET, and charge pump.
Full diagnostics and high-accuracy current sense features enable intelligent control of the load.
The device diagnostic reporting supports load current status and device temperature on an analog sense output
pin SNS. The SNS pin sources a current proportional to the selected parameter. By adding a pulldown resistor
on the SNS pin, the developed voltage is proportional to the selected parameter as well. The diagnostics can be
disabled for multiplexing the sense pin between different devices.
1.2 Applications
The EVM is used in the following applications:
• High-side relay drivers
• High-side power switch for submodule power supply
• Bulb driver
• General resistive, inductive, and capacitive loads
• Replace electromechanical relays and fuses
Introduction www.ti.com
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1.3 Features
The EVM supports the following features:
• Single or Dual-channel high-side power switches, tested according to AECQ100-12
• Operating voltage 3 V to 18V
• Operating temperature: –40°C to 125°C
• Microcontroller input control: 3.3-V and 5-V logic compatible
• High-accuracy current sense
– Analog current sense as a ratio of the load current or device temperature
• Protection:
– Reverse battery protection with external ground network
– Short-circuit protection
– Overvoltage protection
– Thermal shutdown and thermal swing with self-recovery
– ESD protection
• Diagnostic:
– On and off state output open or short to battery detection
– Overload and short-to-ground detection and power limiting
– Thermal shutdown and thermal swing diagnostic
– Immediate shutdown or continuous clamping during fault current condition
– Diagnostic enable function for multiplexing of MCU analog or digital port
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2 HSS-MOTHERBOARDEVM Schematic
Figure 2-1 and Figure 2-2 illustrate the HSS-MOTHERBOARDEVM motherboard and daughterboard schematics, respectively.
HSS-MOTHERBOARDEVM Schematic www.ti.com
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Vbb
GND
LDO_5V
Vbb
Exte rn_5V or 3.3V LDO_5V
5V
Vbb
GND_PIN
SNS_IC
LATCH
EN1
Vout1
DIA_EN
SEL2
SEL1
GND GND
SNS
5V GND
LATCH
LATCH 5V
EN1
GND EN1 5V
DIA_EN
GND DIA_EN 5V
SEL2
GND S EL25V
SEL1
GND S EL1
GND
Vbb
Vout2
Vbb
Vout1 Single_Channel
Vout1 Single_Channel
Vout1 Single_Channel
Vout2 Single_Channel
Vout2 Single_Channel
Vout2 Single_Channel
Vout1_Sense Vout2_S e nse
Vout2_S e nse Vout1_S e nse
Vout1 Vout2
1 2 3
J16
5
4
1
2
3
6
7
8
9
10
11
12
J1
Loca l 5V Ge ne ra tion
Motherca rd
Single/Dua l Cha nne l S e le ct
Exte rna l/Loca l 5V S e le ct
Tes t P oints & Jumpe rs
GND GND
13
D1
GND_PIN
GND
GND GND
SNS _IC
Vout1
Vout2
Single_Cha nne l
GND
GND
5V GND
EN2
EN2
EN2
GND
GND
5V 5V
GND
39V
D3
GND
30V
D4
30V
D5
30V
D6 GND
GND
TPS 2HB08BQP WP RQ1
GND 1
SNS
2
LATCH
3
EN1
4
ILIM1
5
VOUT1 6
VOUT1 7
VOUT1 8
VOUT1 9
VOUT1 10
VOUT1 11
VOUT1 12
VOUT2 13
VOUT2 14
VOUT2 15
VOUT2 16
VOUT2 17
VOUT2 18
VOUT2 19
ILIM2
20
EN2
21
SEL1
22
SEL2
23
DIA_EN
24
VBB
25
U2
Vout2
Vout1
Vbb
DIA_EN
SEL2
SEL1
EN1
EN2
SNS _IC
LATCH
GND_PIN
GND
Vbb
ILIM1
ILIM1
Vbb
ILIM2
ILIM2
10k
R16
10k
R17
Vout2_S e ns e
Vout1_S e ns e
GND
50V
47uF
C11
1
GND
OUT 3 IN
2
NC
4NC 5
TLV70450DBVRU1
10k
R3
10k
R4
10k
R11
10k
R12
10k
R13
10k
R14
10k
R15
10k
R2
10k
R7
4.7k
R6
1.00k
R1
1 2 3
J8
1 2 3
J9
1 2 3
J10
1 2 3
J11
1 2 3
J12
1 2
3
J13
1 2 3
J6
J5 J 17
J18
J19
J20
J21
J22
50V
0.1uF
C7
50V
22uF
C9
50V
22uF
C10
50V
2.2uF
C4
25V
0.022uF
C6
25V
0.022uF
C5
25V
0.022uF
C3
16V
1uF
C2
10V
100pF
C8
16V
0.1uF
C1
J24
J4
TP13 TP 14 TP 15 TP 16
TP10
TP11
TP12
TP17
TP1
TP2 TP 3 TP4 TP5 TP 6 TP7
J25
TP8
J23
J26
J27
J28
0
R8
ILIM1
1 3
D2
Vin = 6V-18V
Iin=12A ma x
Vout = 6V-18V
Iout=12A ma x
5
4
1
2
3
6
7
8
9
10
11
12
J2
TP18
0
R9
ILIM2
Figure 2-1. HSS-MOTHERBOARDEVM Motherboard Schematic
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Vout1_2_A
EN1_2_A
LATCH_2_A
SNS _2_A
GND_2_A
Vbb_2_A
Vout2_2_A
SEL1_2_A
SEL2_2_A
DIA_EN_2_A
Vbb_2_A
Vout1_2_A
Vbb_2_A
Vout2_2_A
5
4
1
2
3
6
7
8
9
10
11
12
J6_S
1 2 3
J12_S
5
4
1
2
3
6
7
8
9
10
11
12
J5_S
Vout1_3_B
EN1_3_B
LATCH_3_B
SNS _3_B
GND_3_B
Vbb_3_B
Vout2_3_B
SEL1_3_B
SEL2_3_B
DIA_EN_3_B
Vbb_3_B
Vout1_3_B
Vbb_3_B
Vout2_3_B
5
4
1
2
3
6
7
8
9
10
11
12
J8_S
1 2 3
J9_S
5
4
1
2
3
6
7
8
9
10
11
12
J7_S
Vbb_3_B
Vbb_2_A
Vout1_1_A Vout2_1_A
DIA_EN_1_A
Vbb_1_A
5
4
1
2
3
6
7
8
9
10
11
12
J2_S
1 2 3
J10_S
5
4
1
2
3
6
7
8
9
10
11
12
J1_S
Vbb_1_A
SEL1_1_A
SEL2_1_ASNS _1_A
GND_1_A
LATCH_1_A
EN1_1_A
Vbb_1_A Vbb_1_A
Vout2_1_A
50V
0.1uF
C2_S
GND_1_A
50V
0.1uF
C4_S
GND_2_A
50V
0.1uF
C1_S
GND_3_B
10.0k
R3_S
10.0k
R7_S
10.0k
R1_S
ILIM1_2_A
ILIM1_3_B
Vbb_1_A
Vbb_2_A
Vbb_3_B
ILIM1_1_A
Vout1_1_A
Vbb_2_A
DIA_EN_2_A
SEL1_2_A
SEL2_2_A
EN1_2_A
LATCH_2_A
SNS _2_A GND_2_A
Vout1_2_A
Vout2_2_A
Vbb_3_B
DIA_EN_3_B
SEL1_3_B
SEL2_3_B
LATCH_3_B
SNS _3_B GND_3_B
Vout1_3_B
Vout2_3_B
Vbb_1_A
DIA_EN_1_A
SEL1_1_A
SEL2_1_A
EN1_1_A
LATCH_1_A
SNS _1_A
Vout1_1_A
Vout2_1_A
GND_1_A
Vout1_1_S S _A
Vout2_1_S S _A
Vout1_2_S S _A
Vout2_2_S S _A
Vout1_3_S S _B
Vout2_3_S S _B
GND 1
SNS
2
LATCH
3
EN1
4
ILIM1
5
VOUT1 6
VOUT1 7
VOUT1 8
VOUT1 9
VOUT1 10
VOUT1 11
VOUT1 12
VOUT2 13
VOUT2 14
VOUT2 15
VOUT2 16
VOUT2 17
VOUT2 18
VOUT2 19
ILIM2
20
EN2
21
SEL1
22
SEL2
23
DIA_EN
24
VBB
25
TPS 2HB08DQP WPRQ1
U1_S
EN2_1_A
ILIM1_1_A
ILIM2_1_A
GND 1 SNS
2
LATCH
3
EN1
4
ILIM1
5
VOUT1 6
VOUT1 7
VOUT1 8
VOUT2 9
VOUT2 10
VOUT2 11
ILIM2
12
EN2
13
SEL1
14
SEL2
15
DIA_EN
16
VBB
17
TPS 2HB16BQP WP RQ1
U4_S
ILIM1_2_A
ILIM2_2_A
EN2_2_A
ILIM1_3_B
ILIM2_3_B
EN1_3_B
EN2_3_B
Vbb_1_A
10.0k
R4_S
ILIM2_1_A
Vbb_2_A
10.0k
R8_S
ILIM2_2_A
EN2_1_A
EN2_2_A
EN2_3_B
Vbb_3_B
10.0k
R2_S
ILIM2_3_B
Vout1_3_S S _B Vout2_3_S S_B
Vout1_2_S S _A Vout2_2_S S_A
Vout1_1_S S _A Vout2_1_S S_A
Vout1_1_B Vout2_1_B
DIA_EN_1_B
Vbb_1_B
5
4
1
2
3
6
7
8
9
10
11
12
J4_S
1 2 3
J11_S
5
4
1
2
3
6
7
8
9
10
11
12
J3_S
Vbb_1_B
SEL1_1_B
SEL2_1_BS NS _1_B
GND_1_B
LATCH_1_B
EN1_1_B
Vbb_1_B Vbb_1_B
Vout2_1_B
50V
0.1uF
C3_S
GND_1_B
10.0k
R5_S
Vbb_1_B ILIM1 _1_B
Vout1_1_B
Vbb_1_B
DIA_EN_1_B
SEL1_1_B
SEL2_1_B
EN1_1_B
LATCH_1_B
SNS _1_B
Vout1_1_B
Vout2_1_B
GND_1_B
GND 1
SNS
2
LATCH
3
EN1
4
ILIM1
5
VOUT1 6
VOUT1 7
VOUT1 8
VOUT1 9
VOUT1 10
VOUT1 11
VOUT1 12
VOUT2 13
VOUT2 14
VOUT2 15
VOUT2 16
VOUT2 17
VOUT2 18
VOUT2 19
ILIM2
20
EN2
21
SEL1
22
SEL2
23
DIA_EN
24
VBB
25
TPS 2HB08BQP WP RQ1
U2_S
EN2_1_B
ILIM1_1_B
ILIM2_1_B
Vbb_1_B
10.0k
R6_S
ILIM2_1_B
EN2_1_B
Vout1_1_S S _B Vout2_1_S S_B
Vout1_1_S S _B
Vout2_1_S S _B
GND 1 SNS
2
LATCH
3
EN1
4
ILIM1
5
VOUT1 6
VOUT1 7
VOUT1 8
VOUT2 9
VOUT2 10
VOUT2 11
ILIM2
12
EN2
13
SEL1
14
SEL2
15
DIA_EN
16
VBB
17
TPS 2HB16BQP WP RQ1
U3_S
Vout1_3_C
EN1_3_C
LATCH_3_C
S NS _3 _C
GND_3_C
Vbb_3_C
Vout2_3_C
SEL1_3_C
SEL2_3_C
DIA_EN_3_C
Vbb_3_C
Vout1_3_C
Vbb_3_C
Vout2_3_C
5
4
1
2
3
6
7
8
9
10
11
12
J14_S
1 2 3
J15_S
5
4
1
2
3
6
7
8
9
10
11
12
J13_S
Vbb_3_C
50V
0.1uF
C5_S
GND_3_C
10.0k
R9_S
ILIM1_3_CVbb_3_C
Vbb_3_C
DIA_EN_3_C
SEL1_3_C
SEL2_3_C
LATCH_3_C
S NS _3 _C GND_ 3_ C
Vout1_3_C
Vout2_3_C
Vout1_3_S S _C
Vout2_3_S S _C
ILIM1_3_C
ILIM2_3_C
EN1_3_C
EN2_3_C
EN2_3_C
Vbb_3_C
10.0k
R10_S
ILIM2_3_C
Vout1_3_S S _C Vout2_3_S S _C
GND 1 SNS
2
LATCH
3
EN1
4
ILIM1
5
VOUT1 6
VOUT1 7
VOUT1 8
VOUT2 9
VOUT2 10
VOUT2 11
ILIM2
12
EN2
13
SEL1
14
SEL2
15
DIA_EN
16
VBB
17
TPS 2HB16BQP WP RQ1
U5_S
ILIM1_1_A ILIM2_1_A ILIM1_1_B ILIM2_1_B
ILIM1_3_B ILIM2_3_B
ILIM1_2_A ILIM2_2_A
ILIM1_3_C ILIM2_3_C
Figure 2-2. HSS-MOTHERBOARDEVM Sample Daughter Card Schematic
HSS-MOTHERBOARDEVM Schematic www.ti.com
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3 Connections Descriptions
3.1 Connectors and Test Points
Table 3-1 lists the EVM connector and test point descriptions.
Table 3-1. Connector and Test Point Descriptions
Connectors and Test Points Descriptions
J23 High-current input terminal for VBB.
J26 High-current output for VOUT1.
J27 High-current output for VOUT2.
J28 High-current output for paralleling 2 channels into single channel VOUT.
J25 High-current input terminal for GND.
Vbb_Sense (TP11) Test point used to measure VBB Votlage.
Vout1_Sense (TP10) Test point to measure VOUT1 Voltage.
Vout2_Sense (TP12) Test point to measure VOUT2 Voltage.
EN1 (TP3) Test point used to apply power to EN1, only use when J9 is not connected to 5 V or GND.
EN2 (TP7) Test point used to apply power to EN2, only use when J13 is not connected to 5 V or GND. Only
for 2 channel devices.
DIA_EN (TP4) Test point used to apply power to DIA_EN, only use when J10 is not connected to 5 V or GND.
SEL1 (TP5) Test point used to apply power to SEL1, only use when J12 is not connected to 5 V or GND.
SEL2 (TP6) Test point used to apply power to SEL2, only use when J11 is not connected to 5 V or GND.
LATCH (TP2) Test point used to apply power to LATCH, only use when J8 is not connected to 5 V or GND.
SNS (TP1) Test point used to measure SNS.
TP17 Connects to ISNS1 on the daughtercard.
TP18 Connects to ISNS2 on the daughtercard. Only for 2 channel devices.
TP8 5-V external input terminal for 5-V EVM.
TP13, TP14, TP15, TP16 This is a direct connection to the GND plane of the EVM.
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3.2 Jumpers
Table 3-2 lists the EVM jumper descriptions.
Table 3-2. Jumper Descriptions
Jumpers Description
J9 This jumper is used to connect the EN1 pin to 5 V (1-2) or GND (2-3).
J13 This jumper is used to connect the EN2 pin to 5V (1-2) or GND (2-3). Only for 2 channel devices.
J10 This jumper is used to connect the DIA_EN pin to 5 V (1-2) or GND (2-3)
J12 This jumper is used to connect the SEL1 pin to 5 V (1-2) or GND (2-3).
J11 This jumper is used to connect SEL2 pin to 5 V (1-2) or GND (2-3).
J4 This jumper connects the TLV70450DBVR ground pin 1 to EVM GND. This with J5 enables LDO.
J24 This jumper is used to bypass the ground network used for reverse polarity protection.
J3 This jumper is used to power the 5-V TLV70450DBVR LDO with the VBB input for the EVM.
J8 This jumper is used to connect the LATCH pin to 5 V (1-2) or GND (2-3).
J5 This jumper connects TLV70450DBVR output to LDO_5V. This with J4 enables LDO.
J6 This jumper connects LDO_5V to the 5-V supply net on the EVM (1-2) or Extern_5V (2-3).
J1, J2, J16 These jumpers connect the motherboard to the daughterboard.
J17, J18, J19 Connect Vout1 to single channel.
J20, J21, J22 Connect Vout2 to single channel.
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4 HSS-MOTHERBOARDEVM EVM Assembly Drawings and Layout
Figure 4-1 show the design of the HSS-MOTHERBOARDEVM and daughterboard PCB. The EVM was designed
using FR4 material on a two-layer board. All components are located in an active area on the top side and active
traces are provided in the top and bottom layers to allow the user to easily view, probe, and evaluate. Moving
components to both sides of the PCB can offer additional size reduction for space-constrained systems.
Figure 4-1. HSS-MOTHERBOARDEVM Layout and Routing (Top View)
www.ti.com HSS-MOTHERBOARDEVM EVM Assembly Drawings and Layout
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Figure 4-2. HSS-MOTHERBOARDEVM Layout and Routing (Bottom View)
HSS-MOTHERBOARDEVM EVM Assembly Drawings and Layout www.ti.com
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5 Current Limit
When IOUT reaches the current limit threshold, ICL= KCL / RILIM, the device can switch off immediately, or the
device can remain enabled and limit IOUT. The HSS-MOTHERBOARDEVM enables multiple variants use case
as any device can be populated in the snap-off daughtercards or on the footprint directly on the board. In the
case that the device remains enabled (and limits IOUT), the thermal shutdown or energy limit protection feature
may be triggered due to the high amount of power dissipation in the device. Check the data sheet for the device
being used to see what the range of current limit can be.
6 Current Sense
High-accuracy current sensing allows real-time monitoring and more diagnostics without further calibration. A
current mirror is used to source a 1/5000 of the load current on SNS pin. The 1-kΩ R1 resistor is connected to
the SNS pin to convert the current source into a voltage:
VSNS = 1000 × IOUT / 5000
For multiple channel devices see the data sheet for the SELx configuration to know which channel is being
monitored.
7 Transient Protection
The HSS-MOTHERBOARDEVM comes with large footprints for TVS diodes if they are needed for any transient
testing. D3 is an SMB footprint while D4, D5, and D6 are SMC footprints. In addition, there are also some
capacitor footprints that can be populated if need be such as C4 or C11.
8 Soldering Down U2
The HSS-MOTHERBOARDEVM allows the user to solder down a device directly to the board without going
through the daughtercard. As noted in the Section 1, care must be taken when soldering down the device.
9 Bill of Materials
Designator Quantity Value Description Package Reference Part Number Manufacturer
C1 1 0.1 uF CAP, CERM, 0.1 uF, 16 V, +/-
10%, X5R, 0402 0402 160R07X104KV4T Johanson Technology
C1_S, C2_S,
C3_S, C4_S,
C5_S, C7
6 0.1 uF
CAP, CERM, 0.1 uF, 50 V, +/-
10%, X7R, AEC-Q200 Grade
1, 0805
0805 GCM21BR71H104
KA37K MuRata
C2 1 1 uF CAP, CERM, 1 uF, 16 V, +/-
10%, X5R, 0805 0805 0805YD105KAT2A AVX
C5, C6 2 0.022 uF CAP, CERM, 0.022 uF, 25 V,
+/- 10%, X7R, 0603 0603 C0603C223K3RAC TU Kemet
C8 1 100 pF CAP, CERM, 100 pF, 10 V, +/-
10%, X7R, 0603 0603 0603ZC101KAT2A AVX
C9, C10 2 22 uF CAP, CERM, 22 uF, 50 V, +/-
20%, X5R, 6x5x5 mm 6x5x5 mm CKG57NX5R1H226 M500JH TDK
D1, D2 2 200 V Diode, Switching, 200 V, 0.2
A, SOT-23 SOT-23 BAS21-7-F Diodes Inc.
H1, H2, H3, H4 4
Machine Screw, Round,
#4-40 x 1/4, Nylon, Philips
panhead
Screw NY PMS 440 0025
PH B&F Fastener Supply
H5, H6, H7, H8 4 Standoff, Hex, 0.5"L #4-40
Nylon Standoff 1902C Keystone
J1, J2 2 Receptacle, 2.54 mm, 12x1,
Gold, TH
Receptacle, 2.54
mm, 12x1, TH
801-47-012-10-012
000 Mill-Max
J1_S, J2_S,
J3_S, J4_S,
J5_S, J6_S,
J7_S, J8_S,
J13_S, J14_S
10 Header, 100 mil, 12x1, TH Header, 12x1, 100
mil, TH
800-10-012-10-001
000 Mill-Max
J4, J5, J17, J18,
J19, J20, J21,
J22, J24
9Header, 2.54 mm, 2x1, Tin,
TH
Header, 2.54 mm,
2x1, TH 22284023 Molex
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J6, J8, J9, J10,
J11, J12, J13 7Header, 2.54 mm, 3x1, Gold, TH
Header, 2.54 mm,
3x1, TH 5-146280-3 TE Connectivity
J9_S, J10_S,
J11_S, J12_S,
J15_S
5 Header, 100 mil, 3x1, TH Header, 3x1, 100
mil, TH
800-10-003-10-001
000 Mill-Max
J16 1 Receptacle, 2.54 mm, 3x1,
Tin, TH
Receptacle, 2.54
mm, 3x1, TH
801-47-003-10-012
000 Mill-Max
J23, J26, J27,
J28 4BANANA JACK, SOLDER LUG, RED, TH
Red Insulated
Banana Jack SPC15363 Tenma
J25 1 BANANA JACK, SOLDER
LUG, BLACK, TH
Black Insulated
Banana Jack SPC15354 Tenma
R1 1 1.00 k RES, 1.00 k, 1%, 0.1 W,
AEC-Q200 Grade 0, 0603 0603 CRCW06031K00FK EA Vishay-Dale
R1_S, R2_S,
R3_S, R4_S,
R5_S, R6_S,
R7_S, R8_S,
R9_S, R10_S
10 10.0 k RES, 10.0 k, 0.5%, 0.125 W,
0805 0805 RT0805DRE0710K LYageo America
R2, R7, R11,
R12, R13, R14,
R15
7 10 k RES, 10 k, 5%, 0.1 W, 0603 0603 RC1608J103CS Samsung Electro-
Mechanics
R6 1 4.7 k RES, 4.7 k, 5%, 0.1 W, AEC-
Q200 Grade 0, 0603 0603 CRCW06034K70JN EA Vishay-Dale
R16, R17 2 10 k RES, 10 k, 5%, 0.1 W, AEC-
Q200 Grade 0, 0603 0603 CRCW060310K0JN EA Vishay-Dale
SH-J1, SH-J2,
SH-J3, SH-J4,
SH-J5, SH-J6,
SH-J7, SH-J8,
SH-J9, SH-J10
10 1x2 Shunt, 100 mil, Gold plated,
Black Shunt SNT-100-BK-G Samtec
TP1, TP2, TP3,
TP4, TP5, TP6,
TP7, TP17, TP18
9Test Point, Multipurpose,
Blue, TH
Blue Multipurpose
Testpoint 5127 Keystone
TP8, TP10,
TP11, TP12 4Test Point, Multipurpose, Red, TH
Red Multipurpose
Testpoint 5010 Keystone
TP13, TP14,
TP15, TP16 4Test Point, Multipurpose, Black, TH
Black Multipurpose
Testpoint 5011 Keystone
U1 1
Single Output LDO, 150 mA,
Fixed 5-V Output, 2.5 to 24-V
Input, with Ultra-Low IQ, 5-pin
SOT-23 (DBV), –40 to 125
degC, Green (RoHS & no
Sb/Br)
DBV0005A TLV70450DBVR Texas Instruments
C3 0 0.022 uF CAP, CERM, 0.022 uF, 25 V,
+/- 10%, X7R, 0603 0603 C0603C223K3RAC TU Kemet
C4 0 2.2 uF CAP, CERM, 2.2 uF, 50 V, +/-
10%, X6S, 0805 0805 C2012X6S1H225K 125AB TDK
C11 0 47 uF
CAP, AL, 47 uF, 50 V, +/-
20%, 0.68 ohm, AEC-Q200
Grade 2, SMD
SMT Radial E EEE-FK1H470P Panasonic
D3 0 39 V Diode, TVS, Bi, 39 V, SMB SMB SM6T39CA STMicroelectronics
D4, D5, D6 0 30 V Diode, TVS, Uni, 30 V, SMC SMC SMCJ30A Fairchild
Semiconductor
R3, R4 0 10 k RES, 10 k, 5%, 0.1 W, 0603 0603 RC1608J103CS Samsung Electro-
Mechanics
R8, R9 0 0 RES, 0, 5%, 0.063 W, AEC-
Q200 Grade 0, 0402 0402 CRCW04020000Z0 ED Vishay-Dale
U1_S 0
40-V, 8-mOhm Dual-Channel
Smart High-Side Switch,
PWP0024L (TSSOP-24)
PWP0024L TPS2HB08DQPWP
RQ1 Texas Instruments
Bill of Materials www.ti.com
12 High Side Switch Motherboard Evaluation Module SLVUBD4B – JANUARY 2018 – REVISED OCTOBER 2020
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U2, U2_S 0
40-V, 8-mOhm Dual-Channel
Smart High-Side Switch,
PWP0024L (TSSOP-24)
PWP0024L TPS2HB08BQPWP
RQ1 Texas Instruments
U3_S, U4_S,
U5_S 0
40-V, 16-mOhm Dual-
Channel Smart High-Side
Switch, TPS1HA08-Q1
(TSSOP-16)
TPS1HA08-Q1 TPS2HB16BQPWP
RQ1 Texas Instruments
Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (December 2018) to Revision B (October 2020) Page
• Updated the numbering format for tables, figures and cross-references throughout the document...................2
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