Texas Instruments TLV3802 User manual

EVM User's Guide: TLV3802 TLV3802EVM
TLV3802 Evaluation Module
Description
The TLV3802EVM is an evaluation board designed
to evaluate the high-speed dual channel TLV3802
comparator. The TLV3802EVM has layout options
intended to simply evaluate timing performance
with different measurement tools. The output of
the TLV3802 is designed for low-voltage differential
signals (LVDS), which provide high-speed signals to
interconnect devices such as FPGAs with minimal
power dissipation.
Features
• Low propagation delay
• Low overdrive dispersion
• High toggle frequency
• Narrow pulse width detection capability
• LVDS output
• Low input offset voltage
• WF-DFN Package 12-pin DSS
TLV3802EVM Board (Top View)
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1 Evaluation Module Overview
1.1 Introduction
This user's guide describes the functionality and set up procedure of the evaluation board TLV3802EVM, which
is designed to evaluate the performance of the high-speed dual channel TLV3802 comparator. Information such
as the contents of the kit, specifications of the device, and recommended equipment for the set up is also
included.
1.2 Kit Contents
The kit comes with the following:
• 1 x TLV3802EVM
1.3 Specification
+
–
C3
0.1uF
C4
0.1uF
OUT1+
OUT1-
TLV3802
+
–
R1
IN1+
IN1-
IN1+ SENSE
R5
(50

Termination
Option)
R3
R2
(Hysteresis
Option)
R4
(Hysteresis
Option)
R7
IN1- SENSE
CH.1
+
–
C3
0.1uF
C4
0.1uF
OUT2+
OUT2-
TLV3802
–
R8
IN2+
IN2-
IN2+ SENSE
R9
(50

Termination
Option)
R13
(Hysteresis
Option)
R10
(Hysteresis
Option)
IN2_SENSE
CH.2
(50

Termination
Option)
R6
(50

Termination
Option)
R14 R11
R12
Figure 1-1. TLV3802EVM Block Diagram
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• Supply range: +2.7 V to +5.25 V (single supply only)
• Input common mode voltage range: (VEE + 1.5 V) to (VCC + 0.1 V)
Table 1-1. TLV3802EVM SMA and Test Point to DUT
Pin Mapping
TLV3607EVM CONNECTIONS
Test point 1 GND (Pin 1)
SMA J2: IN1+
SMA J1: IN1+_SENSE
IN1+ (Pin 2)
SMA J5: IN1-
SMA J6: IN1-_SENSE
IN1- (Pin 3)
Test Point 2 VEE (Pin 4)
SMA J8: IN2+
SMA J7: IN2+_SENSE
IN2+ (Pin 5)
SMA J11: IN2-
SMA J12: IN2-_SENSE
IN2- (Pin 6)
Test point 3 VCC (Pin 7)
SMA J10: OUT2- OUT2- (Pin 8)
SMA J9: OUT2+ OUT2+ (Pin 9)
Test Point 3 VCC (Pin 10)
SMA J4: OUT1- OUT1- (Pin 11)
SMA J3: OUT1+ OUT1+(Pin 12)
1.4 Device Information
The following device is used in this evaluation module:
• TLV3802DSSR
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2 Hardware
2.1 Recommended Equipment Setup
• Power Supply
• High Speed Functional Generator with fast rise/fall time recommended
• High Speed Oscilloscope with 50-Ω terminations
• SMA Cables/adapters
– All sensed input signals and output signals must have matched cable lengths
• IN1+_ SENSE, IN1-_ SENSE, IN2+_ SENSE, IN2-_ SENSE, OUT1+, OUT1-, OUT2+, OUT2-
2.2 Board Setup
2.2.1 Power Supplies
The TLV3802EVM can operate in either single or split supply configuration. If using a single supply, then the
recommended supply voltage range for VCC - VEE is 2.7 V to 5.25V. If using a split supply configuration, then
VCC - VEE has a range of 2.7 V to 5.25 V and VCC - GND has a range of 2.4 V to 5.25 V. Connect GND, VEE,
and VCC using TP1, TP2, and TP3 respectively.
Figure 2-1. TLV3802EVM Power Supplies Connection
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2.2.2 Inputs
Resistors R1, R7, R8, and R14 are 0-Ω resistors. The input terminals (IN1+, IN1-, IN2+, and IN2-) have
corresponding sense lines so that the inputs to the device can be terminated on the lines with 50-Ω to an
oscilloscope. This allows the input signals to be observed with minimal loading and distortion. There are also
optional input resistors (R5, R6, R9, and R11) for direct 50-Ω termination if required by the input signal generator,
otherwise the input resistors can be left uninstalled.
+
– TLV3802
-
+
IN2- SENSE
R1
IN1+
IN1-
R5
(50

Termination
Option)
R3
R7 R8
IN2+
IN2-
R9
(50

Termination
Option)
(50

Termination
Option)
R6
(50

Termination
Option)
R14
R11
R12
IN1- SENSE
IN1+ SENSE
CH.1
IN2+_SENSE
TLV3802
CH.2
Figure 2-2. Input Side Block Diagram
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2.2.3 Outputs
C3, C4, C12, and C13 are installed with 0.1-uF capacitors. If a 100-Ω differential probe is unavailable to
measure the LVDS output, then these capacitors allow for the AC portion of the signal to be seen on a 50-Ω
terminated scope. Keep in mind that any duty cycle other than 50% results in a DC portion of the signal that is
not halfway between VOH and VOL due to the charging and discharging of the capacitors.
-
+
C12
0.1uF
C13
0.1uF
OUT2+
OUT2-
+
–
C3
0.1uF
C4
0.1uF
OUT1+
OUT1-
TLV3802
TLV3802
CH.1
CH.1
Figure 2-3. Output Side Block Diagram
2.2.4 Hysteresis
The TLV3802EVM is able to support external hysteresis on the non-inverting side for channel 1 and the inverting
side for channel 2. Input resistors R3 and R12 are 0-Ω resistors but can be replaced accordingly for desired
amount of hysteresis. For channel 1, the feedback resistor is the combination of R2 and R4. Likewise, for
channel 2, the feedback resistor is the combination of R10 and R13. All resistors must be populated. If external
hysteresis is not required, then these optional feedback resistors can be left uninstalled.
-
+
C12
0.1uF
C13
0.1uF
OUT2+
OUT2-
+
–
C3
0.1uF
C4
0.1uF
OUT1+
OUT1-
R4 R10
R13
R12
R2
R3
Optional Feedback
Resistors
RFeedback = R13 + R10
RFeedback = R2 + R4
Optional Feedback
Resistors
Input Resistor
Input Resistor
TLV3802
CH.1
TLV3802
CH.2
IN1+
IN1-
IN2+
IN2-
Figure 2-4. Hysteresis Block Diagram
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2.3 Quick-Start Procedure
Note
Do not turn on power supply until all connections to the device are made to the board.
The procedures listed below are the steps for a quick-start set-up using channel 1.
1. Set one channel of the DC power supply to output a -2.5 V voltage and set the current limit to 100 mA. After
making sure that this channel is disabled, connect VEE via TP2 to this supply.
2. Set one channel of the DC power supply to output a +2.5 V voltage and set the current limit to 100 mA. After
making sure that this channel is disabled, connect VCC via TP3 to this supply.
3. Connect common ground of the DC power supply to SYS_GND via TP1.
4. Ground the inverting input, IN1-, to ground to establish the threshold for the comparator at 0 V.
5. Verify that cables connecting to IN1+_SENSE, OUT1+, and OUT1- are matched length and impedance.
Perform any de-skewing if necessary. Set the function generator (50-Ω terminated) to produce a square
wave output with 400mVpp at 10 MHz, with a 0 V DC offset. Disable the signal generator output. Connect
the signal generator output to IN1+.
6. Connect IN1+ SENSE, to a 50-Ω terminated scope channel.
7. Connect OUT1+ and OUT1- to 50-Ω terminated channels on the oscilloscope.
8. Enable the DC power supply.
9. Verify the total supply current is < 60 mA.
10. Enable the signal generator.
11. Monitor and verify the input from IN1+_SENSE.
12. Monitor and verify the outputs for OUT1+ and OUT1-.
DC Power Supply
-2.5V GND +2.5V
Note: All SENSE input
cables should be matched
with output cables.
High Speed Oscilloscope
(50 Ohm Termina  ons)
CH. 1 CH. 2 CH. 3
SMA
SMA
SMA
SMA
High Speed Pulse Generator
(<500 ps Rise/Fall Time)
CH. 1
BANANA-GRABBER
BANANA-GRABBER
BANANA-GRABBER
GND
Figure 2-5. TLV3802EVM Quick Start Setup
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Next, is a scope shot capture of the inputs and outputs described in the propagation delay procedure. High to
Low propagation delay is defined as when the signal generator input (IN+) reaches 0 V to when OUT- reaches 0
V. The propagation delay was measured at approximately 220 ps with the setup described.
Figure 2-6. Quick-Start Example
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3 Hardware Design Files
3.1 Schematic
Figure 3-1. TLV3802EVM Schematic
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3.2 PCB Layouts
Figure 3-2. Top Layer Figure 3-3. GND-1
Figure 3-4. GND-2 Figure 3-5. Bottom Layer
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