Texas Instruments XIO2200 User manual

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Texas Instruments
XIO2200 EVM Guide

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Table of Contents
1 Overview................................................................................................................................................................3
2 EVM Features........................................................................................................................................................3
2.1 PCI Express Connector...................................................................................................................................3
2.2 1394a Connectors .............................................................................................................................................4
2.3 EEPROM interface..........................................................................................................................................4
2.4 External Power Connector ..............................................................................................................................4
2.5 LEDs................................................................................................................................................................5
3 Questions/Troubleshooting.................................................................................................................................5
3.1 BIOS fails to assign a memory window to the bridge......................................................................................5
3.2 Controller is Banged out in Windows Device Manager...................................................................................5
3.3 System does not boot when turned on with a peripheral attached to the XIO2200 EVM...............................6
3.4 What to do if EVM is not working ....................................................................................................................6
3.4.1 Check EVM Power...................................................................................................................................6
3.4.2 Check if Bridge is link training..................................................................................................................6
3.4.3 Check if XIO2200 has been configured...................................................................................................6
4 EVM Schematics...................................................................................................................................................8
5 EVM Bill of Materials ..........................................................................................................................................10

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1 Overview
The XIO2200 Evaluation Board (EVM) is a functional implementation of a PCI Express to Two-
Port 1394a OHCI controller using the Texas Instruments XIO2200 PCI Express to PCI Bus
Translation Bridge with 1394a OHCI and Two-Port PHY. Designed as a x1 add-in card, it is
routed on FR4 as a standard 4-layer (2 signal, 1 power, 1 ground) board with a 100-Ω
differential impedance (for PCI-Express pairs), 110-Ωdifferential impedance (for 1394a pairs),
and 50-Ωsingle-ended impedance using routing guidelines and requirements specified in the
PCI Express Card Electromechanical Specification rev 1.0a, PCI Local Bus Specification rev
2.3, and IEEE 1394-1995 Specification. All board power for the XIO2200 EVM and any bus
power provided to the 1394 connectors are provided or derived from the standard voltages
provided on the PCI-Express connector. However due to the limited availability of 12-V
current (for 1394 bus power) an option has been provided to power 12-V rail from an external
4-pin floppy drive connector if testing bus-powered 1394a devices which require more than the
500 mA that can be drawn (by specification) from the PCI Express x1 Connector.
Upon request gerber files for the EVM may be provided to illustrate techniques used to
achieve fan out (of the u*BGA), use of split power planes, placement of filters and other critical
components, and methods used to achieve length matching on PCI and PCI Express signals
on a standard 4-layer board.
Schematics and a Bill of Materials are provided below to illustrate the design of this particular
EVM.
2 EVM Features
2.1 PCI Express Connector
The EVM is designed as a PCI Express add-in card. The card will fit into any standard x1, x2,
x4, x8, or x16 add-in connector that is compliant to the PCI Express Card Electromechanical
Specification revision 1.0a. In addition to the standard transmit and receive pairs the
connector must supply 3.3 V, 12 V, PERST#, a 100-MHz differential clock, and Vaux. The
WAKE# signal is also supported by the EVM although as an optional pin the system is not
required to support this signal.
The card may be placed within a case that permits insertion of standard PCI Express Add-In
cards; however the lack of a mounting bracket may lead to instability when 1394a cables are
plugged/unplugged from the card.

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2.2 1394a Connectors
The XIO2200 EVM provides 2 standard 1394a connectors. 12 V is provided to the connectors
so that bus powered peripherals may be used although fuses limit the amount of current that
may be drawn to 1 A per each port. Also see section 2.4 on the external power connector for
further information of power limitations.
2.3 EEPROM interface
Each XIO2200 EVM provides an on board EEPROM. As shipped each EEPROM is
programmed with values that will allow the EVM to function in most systems. The EEPROM
interface is left as programmable (not write protected) so that EEPROM contents may be
modified for testing other optional settings. Unless required it is recommended that the values
contained in the EEPROM remain unchanged. If a change is desired in EEPROM contents,
values may be changed using EEPROM access registers as detailed in the XIO2200 data
manual or upon request TI may provide an EEPROM access tool.
2.4 External Power Connector
As previously mentioned the PCI Express Card Electromechanical Specification revision 1.0a
limits the amount of current an x1 card can draw from the 12-V rail to 500 mA. Since the 12-V
rail on the EVM is used solely for providing bus power to attached 1394 devices it is possible
that 2 attached devices may exceed this requirement. If testing is desired with devices that
exceed this limit the board may be altered to provide power through a standard 4-pin floppy
connector which will be able to provide a much higher amount of current from the 12-V rail.
The modifications are as follows:
Remove D7 and populate D4 with the removed part being careful that the part is properly
oriented. The notched edge (cathode) should be oriented away from J3 (notched part on left)
if in D4, if in D7 the notched edge should be placed up (away from P1).
Populate J3 with a 4 pin header. The part used for design was an AMP 171826-4.
Note: if these modifications are made the PCI Express Connector will no longer provide power
to the 1394 connectors. If power is then not provided from the floppy connector, bus powered
1394 devices will no longer function. If desired, it is possible to place another diode
(MBRS340T3) in D4 without removing D7 then power could be provided safely from either
source as the Diodes would isolate the 2 power sources preventing any conflict.

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2.5 LEDs
The XIO2200 EVM has LEDs on board to indicate availability of power and status of certain
control signals. The onboard LEDs are as follows
D1 – 1.5V (note: this LED will generally not light due to absence of LED with Vf <= 1.5V)
D2 – 12V power indicator
D3 – 3.3V power indicator
D4 – PCI Express WAKE# indicator (power on, WAKE# asserted)
D5 – PCI Express PERST# indicator (power on, reset asserted)
3 FAQ/Troubleshooting
Use of the EVM is fairly straightforward, place the EVM into a PCI express add-in slot and turn
the system on. At any time 1394a peripherals may be attached to the EVM. From the
operating system perspective the XI22000 appears to be a standard PCI to PCI Bridge (PCI
header type 1) with a 1394a OHCI controller behind it, and the OS will be able to configure the
XIO2200 accordingly using legacy PCI configuration transactions. Below are some issues that
may impair use of the bridge in a system.
3.1 BIOS fail to assign a memory window to the bridge.
Microsoft operating systems generally attempt to respect the resource allocations
made by system BIOS. The XIO2200 requires a memory window in order to access
some registers used by the device. If Microsoft determines that the BIOS failed to
assign a memory window to the XIO2200 it will assume that one can not be
assigned and that the device is non-functional. In this situation the OS will not
enumerate devices behind the bus and they will never be configured or assigned
resources. This failure can be determined by examining device manager, if this has
occurred the bridge will appear “banged out” and if the bridge properties are
examined the OS will explain that insufficient resources were available to configure
the device. The only solution for this issue is to use the EVM in a system which
assigns appropriate resources.
3.2 1394 Controller is banged out in Windows Device Manager. .
In Windows device manager the XIO2200 will appear as a Texas Instruments OHCI
Controller. Since 1394 requires that all devices have a GUID (Global Unique
Identification) number for routing purposes, if the OS reads that the appropriate
register is all 0s. The OS will show that there is an error as this is an invalid GUID.
The XIO2200 EVM programs the GUID of the controller from the onboard EEPROM,
so a bang next to the device will most likely indicate that the EEPROM was not

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properly programmed. However if this is the case the EVM will still function despite
the indication of a problem in Windows device manager.
3.3 Windows takes a long time to boot when peripherals are attached.
Occasionally when the system is booted with a peripheral attached, it will take a
long time for the OS to load and when it does come up the peripheral will not be
present. Detaching and re-attaching the cable will result in the peripheral appearing.
This is a known issue with Windows enumeration of all 1394 controllers. It appears
infrequently but can be avoided by not booting with 1394 peripherals attached or by
waiting then unplugging and re-plugging the peripherals.
3.4 What to do if EVM is not working
3.4.1 Check 1.5-V Power.
The XIO2200 requires 1.5 V for proper operation. As this voltage is not provided
from the PCI Express connector it is regulated from 3.3 V from the connector.
1.5 V may be probed at pin 4 of the regulator (U3), at the anode of D1, or one
end of C44.
3.4.2 Check if Bridge is link training
If the system does not boot, detach all 1394 peripherals from EVM and try again.
If system is hanging before OS loads then it is likely that the system and the
EVM are having difficulty completing link training which is most likely an issue
with signal integrity on the differential pairs. If a PCI Express analyzer is
unavailable then try a different express slot or a different system if possible. Re-
check the 1.5-V rail and examine the differential clock on an oscilloscope to
ensure it is clean.
If link training successfully completes the system will boot and the XIO2200 will
appear in the device manager. If the bridge does not appear in the device
manager then the system may not have detected the presence of the bridge,
again perform the previous checks.
Also, if PCI add-in cards have enough weight and there is no mechanical
support, the EVM may flex and some components may crack or become
disconnected. Check the coupling caps on the EVM transmit lines (C51 and
C52), these .1-µF 0402 components have a tendency to crack if enough stress is
put on the board; they will need to be replaced if they are damaged.
3.4.3 Check if the XIO2200 has been configured

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Once the bridge is communicating with the system, BIOS and/or the OS are
expected to configure the bridge in order for proper operation. As the XIO2200
appears to software to be a standard PCI to PCI Bridge with a PCI based 1394
controller behind it, most existing BIOS and OS should be capable of configuring
the bridge and controller with no special considerations for PCI Express. PCI
Bridge registers to be configured. Setup for the 1394 device is also standard
and should be configured by standard drivers.

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4 EVM Schematics

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Pull Ups/Pull Downs
Bridge Power
Filtering/Decoupling
NOTE: C40 should go
directly under the
pin H14 on U1
<D oc> <R evC ode>
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Date: Sheet of
RXp
RXn
TXn
COMB_IO _33
C O M B _33
C O M B _15
TXp
CNA
GPIO4
GPIO5
GPIO0
GPIO1
GPIO7
GPIO2
GPIO3
GPIO6
VCCA_1.5V
VCCA_3.3V
V C C A_3.3VV C C A_1.5V
GRST#
WP
GRST#
GPIO4
GPIO5
WP
GPIO5
GPIO0
GPIO3
GPIO2
GPIO1 GPIO4 GPIO6
GPIO7
1394_TPBIAS0
1394_TPBIAS1
1394_TPB1p
1394_TPB1n
1394_TPA1p
1394_TPA1n
1394_TPB0p
1394_TPB0n
1394_TPA0p
1394_TPA0n
W AKE#
RXn
TXp
TXn
RXp
Clk-
Clk+
PERST#
D V cc_3.3V
D V C C _1.5V
D V cc_3.3V
D V C C _3.3V
D V cc_1.5V
D V cc_3.3V
DVCC_1.5VDVCC_3.3V V aux
DVCC_3.3V
Vaux
DVCC_3.3V
D V cc_3.3V
Vaux
D V C C _12V
Vaux
C28
.1uF
RESERVED
1394
Power
1.5V3.3V 1.5V 3.3V
Vaux
GROUND
Digital Analog
GPIO EXPRESS
XIO2200
Misc
Digital Analog
U1 Galadriel
H16
H17
E16
E17
C17
C16
B4
D1
H1
L2
P3
G1
G2
A7
B7
C7
D7
A6
B6
A5
B5
C4
A3
B3
A2
B1
C2
C1
D2
H3
H2
J3
J2
K1
K2
K3
L1
L3
L4
M1
M2
N1
N2
P1
P2
G3
F1
F2
E2
F3
E1
U3
R2
T1
U2
T3
B8
C9
C10
B11
B12
B13
A8
A9
A10
C11
C12
A14
C8
B9
B10
A11
A12
A13
B14
T12
U12
U15
T15
U11
T11
U14
T14
U13
U16
U9
T10
T17
R16
J4 P7
D16
D9 E3 H4 M3 R5 P9 C13 D10 C6 J15 H14 P10 P11 T13 R14 J1 A4 G15 K14
R10 R11 R12 R13
P15
D3 G4 K4 N3 R4 R6 P8 K17 C14 D11 D8 C5 L15 H15 F15
T8
F16 G14 R17
R1
T5
U5
T6
U6
R7
T7
U7
U8
N16
U10
T9
R9
N15
L16
L17
M16
A16
J17
N17
B15 A15
R8
D15
P17
P16
M15
J14 K15 M17 K16 L14
G16 G17
F17
J16 E15 B17 T4
U4
D17
TXn
TXp
RXn
RXp
CLK+
CLK-
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
TPA0p
TPA0n
TPA1n
TPA1p
TPB0n
TPB0p
TPB1n
TPB1p
TPBIAS0
TPBIAS1
CNA
CPS
R0
R1
V D D _15 V D D _15
RSVD
V D D _15 V D D _33 V D D _33 V D D _33 V D D _33 V D D _33 V D D _33 V D D _33 V D D _33
VDDA_15
V D D _15
VDDA_33 VDDA_33 VDDA_33 VDDA_33
V D D _33 V D D _33
VDDA_15
V D D _33_AU X
VSSA VSSA VSSA VSSA
VDDA_15
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSA VSSA VSSA
RSVD
VSSA VSSA VSSA
RSVD
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
RSVD
PC0
PC1
PC2
RSVD
REF0
REF1
W AKE#
R E FC LK _SE L
PERST#
GRST#
RSVD RSVD
RSVD
VDDA_33
XI
XO
RSVD
VDDA_15 VDDA_33
V D D _15_C O M B V D D _33_C O M B
V D D _33_C O M BIO
VSSA VSS
VDDA_15
VSSA VSSA VSSA RSVD
RSVD
RSVD
C29
.1uF
C26
.1uF
C31
.1uF
C41
.1uF
C8
.01uF
C27
.1uF
C30
.1uF
C9
1000pF
C32
.1uF
C12
.1uF
L2
8.2 nH 0.12ohm 0805
1 2
C38
.1uF
C39
.1uF
C37
.1uF
C13
.1uF
C18
1000pF
C21
.1uF
C20
.1uF
X1
24.576M H z
C22
.1uF
C10
.1uF C11
1000pF
C19
.1uF
C34
.1uF
C23
.1uF
C3
1000pF
C17
.1uF
R 8 14.3K
C1
1uF
R 9 232
L1
8.2 nH 0.12ohm 0805
1 2
C4
1uF
C33
.1uF
R 4 43K
R7
CTS 10Kx8 BusRes-746 series
1
2
3
46 7
8
9
5
10
R1
R2
R3
R4 R5 R6
R7
R8
COM1
COM2
C24
.1uF
C7
1uF
C2
.01uF
R3
10K
C 36 12pF
C 35 12pF
R1
10K
R 5 390K
R2
10K
C6
1000pF
U2
24LC 08B -I/ST
1
2
3
4 5
6
7
8
A0
A1
A2
VSS SDA
SCL
WP
VCC
C40
1000pF
C42
.1uF
C15
.1uF
C16
.1uF
C5
.01uF
C14
.1uF
C25
.1uF
R6 6.34K

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LEDs
Power
PCI Express1394
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PRESENT# TXpCTXp
CTXn
RXp
RXn
PERST#
TXn
JTAG_LOOP
PRESENT#
PCI_12V
Floppy_12V
RXp
Clk+
TXn
RXn
TXp
Clk-
PERST#
W AKE#
W AKE#
1394_TPA0p
1394_TPB0n
1394_TPA1n
1394_TPBIAS0
1394_TPB0p
1394_TPB1n
1394_TPBIAS1
1394_TPA0n
1394_TPB1p
1394_TPA1p
Vaux
DVCC_1.5V
DVCC_3.3V
DVCC_3.3V
D V C C _12v
DVCC_3.3VDVCC_1.5V
DVCC_3.3V
D V C C _12V
Vaux DVCC_3.3V
D V C C _12V
D V C C _12v
D V C C _12V
C53
270pF
C47
1uF
R23
1M
C54
270pF
D7
M B R S340T3
2 1
D1
LE D R ed 0805
1 2
C52 .1uF
C51 .1uF
D3
LE D R ed 0805
1 2
C43
10uF
R22 1K
R18
56.2
C44
10uF
R19
56.2
C55
1000pF
R13
56.2
R14
56.2
R 26 330
C57
1000pF
R16
56.2
FB1
1000 @ 10M H Z
1 2
R 24 330
R17
56.2
R11
56.2
R12
56.2
R 25 330
R21
5.1K
R20
5.1K
D4
M BR S 340T3
2 1
5V GND GND 12V
J3
1
2
3
4
F1 S M D 100
D5
LED Yellow 0805
1 2
F2 S M D 100
J1 1394_SO C KET
7
1
6
5
4
3
2
8
CHASSIS_GND
BUSPOW ER
TPA+
TPA-
TPB+
TPB-
GND
CHASSIS_GND1
J2 1394_SO C KET
7
1
6
5
4
3
2
8
CHASSIS_GND
BUSPOW ER
TPA+
TPA-
TPB+
TPB-
GND
CHASSIS_GND1
D6
LED Green 0805
1 2
Side B
Component Side Side A
Solder
Side
Key
P1
PCIExpress x1 Card Edge
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
12V
12V
RSVD
GND
SMCLK
SMDAT
GND
3.3V
J_T R S T #
3.3 V aux
W AKE#
RSVD
GND
RXp0
RXn0
GND
PRSNT2#
GND
PRSNT1#
12V
12V
GND
J_T C K
J_T D I
J_T D O
J_T M S
3.3V
3.3V
PW RGD
GND
REFCLK+
REFCLK-
GND
TXp0
TXn0
RSVD
C50
100uF
R 15 49.9
D2
LE D R ed 0805
1 2
FB2
1000 @ 10M H Z
1 2
R 10 10K
C56
.01uF
C49
100uF
C58
.01uF
C48
270pF
C45
1uF
C46
270pF
U3
TP S 72615D C Q
1
2
3
4
5
6
ENABLE
IN
GND
OUT
RESET
GND