TQ-Systems TQMLS1028A User manual

TQMLS1028A
Preliminary User's Manual
TQMLS1028A UM 0001
06.05.2019

Preliminary User's Manual l TQMLS1028A UM 0001 l © 2019, TQ-Systems GmbH Page i
TABLE OF CONTENTS
1. ABOUT THIS MANUAL ........................................................................................................................................................................1
1.1 Copyright and license expenses .....................................................................................................................................................1
1.2 Registered trademarks.......................................................................................................................................................................1
1.3 Disclaimer...............................................................................................................................................................................................1
1.4 Imprint.....................................................................................................................................................................................................1
1.5 Tips on safety ........................................................................................................................................................................................2
1.6 Symbols and typographic conventions........................................................................................................................................2
1.7 Handling and ESD tips........................................................................................................................................................................2
1.8 Naming of signals ................................................................................................................................................................................3
1.9 Further applicable documents / presumed knowledge..........................................................................................................3
2. BRIEF DESCRIPTION.............................................................................................................................................................................3
3. OVERVIEW ..............................................................................................................................................................................................4
3.1 Block diagram .......................................................................................................................................................................................4
3.2 System components...........................................................................................................................................................................4
4. ELECTRONICS ........................................................................................................................................................................................5
4.1 LS1028A CPU.........................................................................................................................................................................................5
4.1.1 LS1028A variants, block diagrams..................................................................................................................................................5
4.1.2 LS1028A variants, details...................................................................................................................................................................7
4.2 Reset Logic and Supervisor...............................................................................................................................................................7
4.2.1 Supervisor ..............................................................................................................................................................................................7
4.2.2 Self-Reset................................................................................................................................................................................................8
4.2.3 JTAG-Reset TRST# ................................................................................................................................................................................8
4.3 CPU Configuration...............................................................................................................................................................................9
4.3.1 RCW Source ...........................................................................................................................................................................................9
4.3.2 Configuration signals..........................................................................................................................................................................9
4.3.3 Reset Configuration Word.............................................................................................................................................................. 10
4.3.4 Settings via Pre-Boot-Loader PBL ................................................................................................................................................ 10
4.3.5 Error handling during RCW loading............................................................................................................................................ 10
4.4 System Controller ............................................................................................................................................................................. 10
4.5 System Clock ...................................................................................................................................................................................... 11
4.6 Flash...................................................................................................................................................................................................... 11
4.6.1 QSPI NOR Flash.................................................................................................................................................................................. 11
4.6.2 eMMC / SD card................................................................................................................................................................................. 11
4.7 SDRAM.................................................................................................................................................................................................. 11
4.8 EEPROM ............................................................................................................................................................................................... 12
4.8.1 Data EEPROM 24LC256T ................................................................................................................................................................. 12
4.8.2 Configuration EEPROM SE97B ...................................................................................................................................................... 12
4.9 RTC......................................................................................................................................................................................................... 13
4.10 Temperature monitoring................................................................................................................................................................ 13
4.11 Supply................................................................................................................................................................................................... 13
4.12 Power consumption......................................................................................................................................................................... 14
4.12.1 Power consumption CPU ............................................................................................................................................................... 14
4.12.2 Power consumption TQMLS1028A ............................................................................................................................................. 14
4.13 Voltage monitoring.......................................................................................................................................................................... 14
4.14 Interfaces to other systems and devices.................................................................................................................................... 15
4.14.1 UART ..................................................................................................................................................................................................... 15
4.14.2 I2C bus................................................................................................................................................................................................... 15
4.14.3 JTAG ...................................................................................................................................................................................................... 15
4.15 TQMLS1028A interfaces.................................................................................................................................................................. 15
4.15.1 Pin multiplexing................................................................................................................................................................................ 15
4.15.2 Pinout TQMLS1028A........................................................................................................................................................................ 16

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TABLE OF CONTENTS (continued)
5. MECHANICS........................................................................................................................................................................................ 18
5.1 Assembly ............................................................................................................................................................................................. 18
5.2 Dimensions......................................................................................................................................................................................... 19
5.3 Images.................................................................................................................................................................................................. 20
5.4 Connectors.......................................................................................................................................................................................... 21
5.5 Adaptation to the environment................................................................................................................................................... 22
5.6 Protection against external effects.............................................................................................................................................. 22
5.7 Thermal management..................................................................................................................................................................... 22
5.8 Structural requirements.................................................................................................................................................................. 22
5.9 Notes of treatment........................................................................................................................................................................... 22
6. SOFTWARE .......................................................................................................................................................................................... 22
7. SAFETY REQUIREMENTS AND PROTECTIVE REGULATIONS.................................................................................................. 23
7.1 EMC ....................................................................................................................................................................................................... 23
7.2 ESD ........................................................................................................................................................................................................ 23
7.3 Operational safety and personal security.................................................................................................................................. 23
7.4 Climatic and operational conditions .......................................................................................................................................... 23
7.5 Reliability and service life............................................................................................................................................................... 23
8. ENVIRONMENT PROTECTION ........................................................................................................................................................ 24
8.1 RoHS...................................................................................................................................................................................................... 24
8.2 WEEE®................................................................................................................................................................................................... 24
8.3 REACH®................................................................................................................................................................................................ 24
8.4 EuP......................................................................................................................................................................................................... 24
8.5 Battery.................................................................................................................................................................................................. 24
8.6 Packaging............................................................................................................................................................................................ 24
8.7 Other entries ...................................................................................................................................................................................... 24
9. APPENDIX............................................................................................................................................................................................ 25
9.1 Acronyms and definitions.............................................................................................................................................................. 25
9.2 References........................................................................................................................................................................................... 27

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TABLE DIRECTORY
Table 1: Terms and Conventions .............................................................................................................................................................2
Table 2: LS1028A variants ..........................................................................................................................................................................7
Table 3: Reset- and Status signals on the TQMLS1028A...................................................................................................................7
Table 4: RCW_SRC_SEL ...............................................................................................................................................................................9
Table 5: Reset Configuration Signals......................................................................................................................................................9
Table 6: Reset Configuration Source ......................................................................................................................................................9
Table 7: Power estimation CPU ............................................................................................................................................................. 14
Table 8: Power consumption TQMLS1028A...................................................................................................................................... 14
Table 9: I2C1 device addresses.............................................................................................................................................................. 15
Table 10: Pinout connector X1................................................................................................................................................................. 16
Table 11: Pinout connector X2................................................................................................................................................................. 17
Table 12: Labels on TQMLS1028A........................................................................................................................................................... 18
Table 13: Connector assembled on TQMLS1028A............................................................................................................................. 21
Table 14: Carrier board mating connectors ......................................................................................................................................... 21
Table 15: Climate and operational conditions.................................................................................................................................... 23
Table 16: Acronyms..................................................................................................................................................................................... 25
Table 17: Further applicable documents.............................................................................................................................................. 27
ILLUSTRATION DIRECTORY
Illustration 1: Block diagram TQMLS1028A (simplified)..............................................................................................................................4
Illustration 2: Block diagram LS1028A..............................................................................................................................................................5
Illustration 3: Block diagram LS1018A..............................................................................................................................................................5
Illustration 4: Block diagram LS1027A..............................................................................................................................................................6
Illustration 5: Block diagram LS1017A..............................................................................................................................................................6
Illustration 6: Feedback HRESET_REQ# ............................................................................................................................................................8
Illustration 7: Wiring TRST#..................................................................................................................................................................................8
Illustration 8: Block diagram eMMC interface............................................................................................................................................. 11
Illustration 9: Memory Map SE97BTP EEPROM ........................................................................................................................................... 12
Illustration 10: Block diagram RTC buffering................................................................................................................................................. 13
Illustration 11: TQMLS1028A assembly, top .................................................................................................................................................. 18
Illustration 12: TQMLS1028A assembly, bottom .......................................................................................................................................... 18
Illustration 13: TQMLS1028A dimensions, side view................................................................................................................................... 19
Illustration 14: TQMLS1028A dimensions,
top view through TQMLS1028A
.................................................................................... 19
Illustration 15: TQMLS1028A, 3D, top view.................................................................................................................................................... 20
Illustration 16: TQMLS1028A, 3D, bottom view............................................................................................................................................ 20
REVISION HISTORY
Rev. Date Name Pos. Modification
0001 06.05.2019 Petz First issue

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1.
ABOUT THIS MANUAL
1.1 Copyright and license expenses
Copyright protected © 2019 by TQ-Systems GmbH.
This Preliminary User's Manual may not be copied, reproduced, translated, changed or distributed, completely or partially in
electronic, machine readable, or in any other form without the written consent of TQ-Systems GmbH.
The drivers and utilities for the components used as well as the BIOS are subject to the copyrights of the respective
manufacturers. The licence conditions of the respective manufacturer are to be adhered to.
Bootloader-licence expenses are paid by TQ-Systems GmbH and are included in the price.
Licence expenses for the operating system and applications are not taken into consideration and must be calculated / declared
separately.
1.2 Registered trademarks
TQ-Systems GmbH aims to adhere to copyrights of all graphics and texts used in all publications, and strives to use original
or license-free graphics and texts.
All brand names and trademarks mentioned in this Preliminary User's Manual, including those protected by a third party, unless
specified otherwise in writing, are subjected to the specifications of the current copyright laws and the proprietary laws of the
present registered proprietor without any limitation. One should conclude that brand and trademarks are rightly protected by a
third party.
1.3 Disclaimer
TQ-Systems GmbH does not guarantee that the information in this Preliminary User's Manual is up-to-date, correct, complete or
of good quality. Nor does TQ-Systems GmbH assume guarantee for further usage of the information. Liability claims against TQ-
Systems GmbH, referring to material or non-material related damages caused, due to usage or non-usage of the information
given in this Preliminary User's Manual, or due to usage of erroneous or incomplete information, are exempted, as long as there
is no proven intentional or negligent fault of TQ-Systems GmbH.
TQ-Systems GmbH explicitly reserves the rights to change or add to the contents of this Preliminary User's Manual or parts of it
without special notification.
Important Notice:
Before using the Starterkit MBLS1028A or parts of the schematics of the MBLS1028A, you must evaluate it and determine if it is
suitable for your intended application. You assume all risks and liability associated with such use. TQ-Systems GmbH makes no
other warranties including, but not limited to, any implied warranty of merchantability or fitness for a particular purpose. Except
where prohibited by law, TQ-Systems GmbH will not be liable for any indirect, special, incidental or consequential loss or damage
arising from the usage of the Starterkit MBLS1028A or schematics used, regardless of the legal theory asserted.
1.4 Imprint
TQ-Systems GmbH
Gut Delling, Mühlstraße 2
D-82229 Seefeld
Tel: [phone]
Fax: [phone]
E-Mail: Info@TQ-Group
Web: TQ-Group

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1.5 Tips on safety
Improper or incorrect handling of the product can substantially reduce its life span.
1.6 Symbols and typographic conventions
Table 1: Terms and Conventions
Symbol Meaning
This symbol represents the handling of electrostatic-sensitive modules and / or components. These
components are often damaged / destroyed by the transmission of a voltage higher than about 50 V.
A human body usually only experiences electrostatic discharges above approximately 3,000 V.
This symbol indicates the possible use of voltages higher than 24 V.
Please note the relevant statutory regulations in this regard.
Non-compliance with these regulations can lead to serious damage to your health and also cause
damage / destruction of the component.
This symbol indicates a possible source of danger. Acting against the procedure described can lead to
possible damage to your health and / or cause damage / destruction of the material used.
This symbol represents important details or aspects for working with TQ-products.
Command
A font with fixed-width is used to denote commands, contents, file names, or menu items.
1.7 Handling and ESD tips
General handling of your TQ-products
The TQ-product may only be used and serviced by certified personnel who have taken note of the
information, the safety regulations in this document and all related rules and regulations.
A general rule is: do not touch the TQ-product during operation. This is especially important when
switching on, changing jumper settings or connecting other devices without ensuring beforehand
that the power supply of the system has been switched off.
Violation of this guideline may result in damage / destruction of the TQMLS1028A and be dangerous
to your health.
Improper handling of your TQ-product would render the guarantee invalid.
Proper ESD handling
The electronic components of your TQ-product are sensitive to electrostatic discharge (ESD).
Always wear antistatic clothing, use ESD-safe tools, packing materials etc., and operate your TQ-
product in an ESD-safe environment. Especially when you switch modules on, change jumper settings,
or connect other devices.

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1.8 Naming of signals
A hash mark (#) at the end of the signal name indicates a low-active signal.
Example: RESET#
If a signal can switch between two functions and if this is noted in the name of the signal, the low-active function is marked with
a hash mark and shown at the end.
Example: C / D#
If a signal has multiple functions, the individual functions are separated by slashes when they are important for the wiring.
The identification of the individual functions follows the above conventions.
Example: WE2# / OE#
1.9 Further applicable documents / presumed knowledge
•
Specifications and manual of the modules used:
These documents describe the service, functionality and special characteristics of the module used (incl. BIOS).
•
Specifications of the components used:
The manufacturer's specifications of the components used, for example CompactFlash cards, are to be taken note of.
They contain, if applicable, additional information that must be taken note of for safe and reliable operation.
These documents are stored at TQ-Systems GmbH.
•
Chip errata:
It is the user's responsibility to make sure all errata published by the manufacturer of each component are taken note of.
The manufacturer’s advice should be followed.
•
Software behaviour:
No warranty can be given, nor responsibility taken for any unexpected software behaviour due to deficient components.
•
General expertise:
Expertise in electrical engineering / computer engineering is required for the installation and the use of the device.
The following documents are required to fully comprehend the following contents:
•MBLS1028A circuit diagram
•MBLS1028A Preliminary User's Manual
•LS1028A Data Sheet
•U-Boot documentation: www.denx.de/wiki/U-Boot/Documentation
•PTXdist documentation: www.ptxdist.de
•TQ-Support Wiki: support.tq-group.com/doku.php?id=en:arm:tqmls1028a
2.
BRIEF DESCRIPTION
This Preliminary User's Manual describes the TQMLS1028A, and refers to some software settings.
A certain TQMLS1028A derivative does not necessarily provide all features described in this Preliminary User's Manual.
This Preliminary User's Manual does also not replace the NXP CPU Reference Manuals.
The information provided in this Preliminary User's Manual is only valid in connection with the tailored boot loader,
which is preinstalled on the TQMLS1028A, and the BSP provided by TQ-Systems GmbH. See also chapter 6.
The TQMLS1028A is a universal Minimodule based on the NXP Layerscape CPUs LS1028A / LS1018A / LS1027A / LS1017A.
These Layerscape CPUs are Single, or Dual Cortex®A72 with QorIQ technology.
The TQMLS1028A extends the TQ-Systems GmbH product range and offers an outstanding computing performance.
A suitable CPU derivative (LS1028A / LS1018A / LS1027A / LS1017A) can be selected for each requirement.
All essential CPU pins are routed to the TQMLS1028A connectors.
There are therefore no restrictions for customers using the TQMLS1028A with respect to an integrated customised design.
Furthermore all components required for the CPU to function like DDR4 SDRAM, eMMC, power supply and power management
are integrated on the TQMLS1028A. The main TQMLS1028A characteristics are:
•CPU derivatives LS1028A / LS1018A / LS1027A / LS1017A
•DDR4 SDRAM, ECC as an assembly option
•eMMC NAND Flash
•QSPI NOR Flash
•Single supply voltage 5 V
•On-board RTC / EEPROM / temperature sensor
The MBLS1028A also serves as carrier board and reference platform for the TQMLS1028A.

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3.
OVERVIEW
3.1 Block diagram
Illustration 1: Block diagram TQMLS1028A (simplified)
3.2 System components
The TQMLS1028A provides the following key functions and characteristics:
•Layerscape CPUs LS1028A / LS1018A / LS1027A / LS1017A
•Oscillators
•Reset structure, Supervisor and Power Management
•System Controller for Reset-configuration and Power Management
•Power supply, and Power-Sequencing
•Voltage supervision
•Temperature sensors
•RTC
•EEPROM
•DDR4 SDRAM with ECC
•QSPI NOR Flash
•eMMC NAND Flash
•Two connectors (240 pins)
All essential CPU pins are routed to the TQMLS1028A connectors. There are therefore no restrictions for customers using the
TQMLS1028A with respect to an integrated customised design. All TQMLS1028A versions are fully pin-compatible and therefore
interchangeable. The functionality of the different TQMLS1028A is mainly determined by the features provided by the respective
CPU derivative.

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4.
ELECTRONICS
4.1 LS1028A CPU
4.1.1 LS1028A variants, block diagrams
Illustration 2: Block diagram LS1028A
(Source: NXP)
Illustration 3: Block diagram LS1018A
(Source: NXP)

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4.1.1 LS1028A variants, block diagrams (continued)
Illustration 4: Block diagram LS1027A
(Source: NXP)
Illustration 5: Block diagram LS1017A
(Source: NXP)

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4.1.2 LS1028A variants, details
The following table shows the features provided by the different variants.
Fields with a red background indicate differences; fields with a green background indicate compatibility.
Table 2: LS1028A variants
Feature LS1028A LS1027A LS1018A LS1017A
ARM®core 2 × Cortex®-A72 2 × Cortex®-A72 1 × Cortex®-A72 1 × Cortex®-A72
DDR 32-bit, DDR4 + ECC 32-bit, DDR4 + ECC 32-bit, DDR4 + ECC 32-bit, DDR4 + ECC
GPU 1 × GC7000UltraLite – 1 × GC7000UltraLite –
Ethernet
4 × 2.5 G/1 G switched Eth
(TSN enabled)
1 × 2.5 G/1 G Eth
(TSN enabled)
1 × 1 G Eth
4 × 2.5 G/1 G switched Eth
(TSN enabled)
1 × 2.5 G/1 G Eth
(TSN enabled)
1 × 1 G Eth
4 × 2.5 G/1 G switched Eth
(TSN enabled)
1 × 2.5 G/1 G Eth
(TSN enabled)
1 × 1 G Eth
4 × 2.5 G/1 G switched Eth
(TSN enabled)
1 × 2.5 G/1 G Eth
(TSN enabled)
1 × 1 G Eth
PCIe 2 × Gen 3.0 Controllers
(RC or RP)
2 × Gen 3.0 Controllers
(RC or RP)
2 × Gen 3.0 Controllers
(RC or RP)
2 × Gen 3.0 Controllers
(RC or RP)
USB 2 × USB 3.0 with PHY
(Host or Device)
2 × USB 3.0 with PHY
(Host or Device)
2 × USB 3.0 with PHY
(Host or Device)
2 × USB 3.0 with PHY
(Host or Device)
4.2 Reset Logic and Supervisor
The reset logic contains the following functions:
•Monitoring the voltages on the module
•External reset input
•PGOOD output for power-up of circuits on the carrier board
•Reset LED (Function: PORESET# low: LED lights up)
Table 3: Reset- and Status signals on the TQMLS1028A
Signal Source Target Remark
PORESET# Supervisor, Board, JTAG,
System Controller CPU Signal is available externally with 3.3 V level as RESET_OUT#.
HRESET# Supervisor, Board, JTAG,
System Controller CPU, LED 1.8 V
RESET_REQ# CPU Board Internal feedback to supervisor, signal is available
externally with 3.3 V level as RESET_REQ_OUT#.
TRST# JTAG CPU 1.8 V
PGOOD Supervisor System Controller, Board 3.3 V
4.2.1 Supervisor
•System controller + serial voltage reference + external comparators
•PORESET# is connected to LED (pulse duration given by system controller)

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4.2.2 Self-Reset
The LS1028A CPU can trigger or request a hardware reset via software.
The output HRESET_REQ# is driven internally by the CPU and can be set by software in register RSTCR (bit 30).
RESET_REQ# is returned to RESIN# within the TQMLS1028A (default). No additional feedback is necessary on the carrier board.
When RESET_REQ# is triggered a self-reset is executed.
Depending on how the feedback circuit is designed on the carrier board, the feedback circuit can "override" the internal
feedback and thus, if RESET_REQ# is active, it can either
•Trigger a reset
•Not trigger a reset
•Trigger further actions on the carrier board in addition to the reset
RESET_REQ# is routed to the connector for this purpose (see Illustration 6: Feedback ).
"Devices" that can trigger a RESET_REQ# see (3), chapter 4.8.3.
Illustration 6: Feedback HRESET_REQ#
4.2.3 JTAG-Reset TRST#
Coupling to PORESET#, optional pull-down to TRST#.
Illustration 7: Wiring TRST#

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4.3 CPU Configuration
4.3.1 RCW Source
The RCW source selection is managed by the system controller.
Table 4: RCW_SRC_SEL
Level Reset Configuration Source Required external pull-down (Module pull-up is 10 kΩ to 3.3 V)
80 – 100 % SD card None (open)
60 – 80 % eMMC 24 kΩ
40 – 60 % SPI NOR flash 10 kΩ
20 – 40 % Hard-coded 4.3 kΩ
0 – 20 % I2C EEPROM, Addr.
0x50 / 1010 000b
0 Ω (Pulled to Ground)
4.3.2 Configuration signals
The LS1028A CPU is configured via pins as well as via registers.
Table 5: Reset Configuration Signals
Reset cfg. name Functional Signal Name Default TQMLS1028A Variable 1
cfg_rcw_src[0:3] ASLEEP, CLK_OUT, UART1_SOUT, UART2_SOUT 1111 Several Yes
cfg_svr_src[0:1] XSPI1_A_CS0_B, XSPI1_A_CS1_B 11 ? ?
cfg_dram_type EMI1_MDC 1 1 = ? No
cfg_eng_use0 XSPI1_A_SCK 1 1 = ? ?
cfg_gpinput[0:3] SDHC1_DAT[0:3], I/O voltage EVDD (1.8 or 3.3 V!) 1111 Not driven, internal Pull-Ups –
cfg_gpinput[4:7] XSPI1_B_DATA[0:3] 1111 Not driven, internal Pull-Ups –
The following table shows the coding of the field cfg_rcw_src:
Table 6: Reset Configuration Source
cfg_rcw_src value (Binary) RCW source
0xxx
Hard-coded RCW (TBD)
1000
SDHC1 (SD card)
1001
SDHC2 (eMMC)
1010
I2C1 extended addressing 2
1011
Reserved
1100
XSPI1A NAND 2 KB pages
1101
XSPI1A NAND 4 KB pages
1110
Reserved
1111
XSPI1A NOR
Green Standard configuration
Yellow Configuration for development and debugging
1: Yes via shift register; No fixed value; 3-fold pad by assembly.
2: Device address 0x50 / 1010 000b = Configuration EEPROM.

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4.3.3 Reset Configuration Word
The RCW structure (Reset Configuration Word) can be found in the TQMLS1028A Reference Manual (3).
The Reset Configuration Word (RCW) is transferred to the CPU as memory structure.
It has the same format as the Pre-Boot Loader (PBL). It has a start identifier and a CRC.
The Reset Configuration Word has 1024 bits:
128 bytes user data (memory image) + 4 bytes preamble + 4 bytes address + 8 bytes end command incl. CRC = 144 bytes.
Note: Adaption of RCW
The RCW must be adapted to the actual application.
This applies, for example, to SerDes configuration and I/O multiplexing.
To create the RCW, NXP offers a tool with a graphical user interface (QorIQ Configuration and Validation Suite 4.2),
which is available free of charge for registered users.
4.3.4 Settings via Pre-Boot-Loader PBL
In addition to the Reset Configuration Word, the PBL offers a further possibility to configure the CPU without any additional
software. The PBL uses the same data structure as the RCW or extends it. For details see (3), Table 27-2.
4.3.5 Error handling during RCW loading.
If an error occurs while loading the RCW or in the PBL, the CPU proceeds as follows, see (3), Table 4.6:
Halt the Reset Sequence on RCW Error Detection.
If the Service Processor reports an error during its process of loading the RCW data, the following occurs:
•The device reset sequence is halted, remaining in this state.
•An error code is reported by the SP in RCW_COMPLETION[ERR_CODE].
•A request for a reset of the SoC is captured in RSTRQSR1[SP_RR], which generates a reset request if not masked by
RSTRQMR1[SP_MSK].
This state can only be exited with a PORESET_B or Hard Reset."
4.4 System Controller
The TQMLS1028A uses a system controller for housekeeping and initialization functions. This system controller also performs
power sequencing and voltage monitoring.
The functions are in detail:
•Correctly timed output of the reset configuration signal cfg_rcw_src[0:3]
•- Input for selection cfg_rcw_src, analog level to encode five states:
1. SD card
2. eMMC
3. NOR Flash
4. Hard-coded
5. I2C
•Power Sequencing: Control of power-up sequence of all module-internal supply voltages
•Voltage monitoring: Monitoring of all supply voltages (assembly option)

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4.5 System Clock
The system clock is fixed at 100 MHz. Spread spectrum clocking is not possible.
4.6 Flash
Assembled on TQMLS1028A:
•QSPI NOR Flash
•eMMC NAND Flash, Configuration as SLC is possible (higher reliability, half capacity)
External removable storage device:
•SD card (on MBLS1028A)
All above mentioned options, except NAND flash, are supported (external SD card on carrier board).
4.6.1 QSPI NOR Flash
•QSPI flash with 1.8 V I/O voltage, 4 or 8 bidirectional data lines, separate read strobe.
•Software support for STR and DTR.
•64 to 512 MByte
4.6.2 eMMC / SD card
The LS1028A CPU provides two SDHC interfaces. One is for SD cards (with switchable I/O voltage), the other for eMMC (with fixed
I/O voltage).
LS1028A
eMMC 5.x
SDHC2_CLK
SDHC2_CMD
CLK
CMD
SDHC2_DATA[7:0] DAT[7:0]
SDHC2_RESET_B RST#
SDHC2_STROBE DS
VCC
VCCQ
1.8 V 3.3 V
Illustration 8: Block diagram eMMC interface
The eMMC is connected to SDHC2. The maximum transfer rate corresponds to the HS400 mode (eMMC from 5.0).
4.7 SDRAM
DDR4 SDRAM is used on the TQMLS1028A. Expansion stages with 1, 2, 4 or 8 GB are possible.

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4.8 EEPROM
4.8.1 Data EEPROM 24LC256T
The EEPROM is empty on delivery.
•256 Kbit or not assembled
•3 decoded address lines
•Connected to I2C controller 1 of the CPU
•Device address is 0x57 / 1010 111b
4.8.2 Configuration EEPROM SE97B
The temperature sensor SE97BTP also contains a 2 Kbit (256 × 8 Bit) EEPROM. The EEPROM is divided into two parts.
The lower 128 bytes (00h to 7Fh) can be set to Permanent Write Protected (PWP) mode or Reversible Write Protected (RWP)
mode by software. The upper 128 bytes (80h to FFh) cannot be write-protected and can be used for general data storage.
Illustration 9: Memory Map SE97BTP EEPROM
The EEPROM can be accessed with the following two I2C addresses.
•EEPROM (Normal Mode): 0x50 / 1010 000b
•EEPROM (Protected Mode): 0x30 / 0110 000b
The configuration EEPROM contains a standard reset configuration at delivery. The configuration EEPROM is only one of several
options for storing the reset configuration.
By means of the standard reset configuration in the EEPROM, a correctly configured system can always be achieved by simply
changing the Reset Configuration Source.
If the Reset Configuration Source is selected accordingly, 4 + 4 + 64 + 8 bytes = 80 bytes are required for the reset configuration.
It can also be used for the Pre-Boot Loader PBL.

Preliminary User's Manual l TQMLS1028A UM 0001 l © 2019, TQ-Systems GmbH Page 13
4.9 RTC
The RTC PCF85063ATL is supported by U-Boot and Linux kernel.
The RTC is powered via VIN, battery buffering is possible (battery on carrier board, see Illustration 10).
The alarm output INTA# is routed to the module connectors. A wake-up is possible via the system controller.
The RTC is connected to the I2C controller 1, device address is 0x51 / 1010 001b.
The accuracy of the RTC is primarily determined by the characteristics of the quartz used. The type FC-135 used on the
TQMLS1028A has a standard frequency tolerance of ±20 ppm at +25 °C. (Parabolic coefficient: max. –0.04 × 10–6 / °C2)
This results in an accuracy of approximately 2.6 seconds / day = 16 minutes / year.
Illustration 10: Block diagram RTC buffering
4.10 Temperature monitoring
Due to the high power dissipation, temperature monitoring is absolutely necessary in order to comply with the specified
operating conditions and thus ensure reliable operation of the TQMLS1028A. The temperature critical components are:
•CPU
•DDR4 SDRAM
The following measuring points exist:
•CPU temperature:
Measurement via diode integrated in CPU, read out via external channel of SA56004
•DDR4 SDRAM:
Measurement by combined temperature sensor / EEPROM SE97B
•VDD switching regulator:
SA56004 (internal channel) for measuring the VDD switching regulator
The open-drain Alarm Outputs (open drain) are connected together and have a pull-up to signal TEMP_OS#.
Control via I2C controller 1 of the CPU, device addresses see Table 9.
Further details can be found in the SA56004EDP data sheet (5).
An additional temperature sensor is integrated in the configuration EEPROM, see 4.8.2.
4.11 Supply
The TQMLS1028A requires a 5 V supply with a maximum tolerance ±5 %.

Preliminary User's Manual l TQMLS1028A UM 0001 l © 2019, TQ-Systems GmbH Page 14
4.12 Power consumption
4.12.1 Power consumption CPU
Since no values are yet available for the TQMLS1028A, these must be estimated:
Table 7: Power estimation CPU
CPU VDD [V] Clock Core / Platform [MHz] Power consumption [W]
LS1026A (measured) 1.0 1400 / 600 11.8
LS1026A (measured) 0.9 1200 / 400 8.1
LS1028A (estimated) 1.0 1300 / 400 11.0
These maximum values (Worst Case) occur at 100 % load on all cores and DMA at 115% activity factor.
4.12.2 Power consumption TQMLS1028A
The given current consumptions have to be seen as typical values. The power consumption of the TQMLS1028A strongly
depends on the application, the mode of operation and the operating system.
The following table shows details of the TQMLS1028A supply and power consumption.
Table 8: Power consumption TQMLS1028A
Module Power dissipation max. Power dissipation typ. (Thermal Design Power)
TQMLS1028A 16 W 12.5 W
TQMLS1018A, TQMLS1027A, TQMLS1017A (lower) (lower)
4.13 Voltage monitoring
The permitted voltage ranges are given by the data sheets of the components and, if applicable, the tolerance range of the
voltage monitoring. Voltage monitoring is an assembly option.

Preliminary User's Manual l TQMLS1028A UM 0001 l © 2019, TQ-Systems GmbH Page 15
4.14 Interfaces to other systems and devices
4.14.1 UART
The UART interfaces are directly connected to the TQMLS1028A connectors.
4.14.2 I2C bus
Table 9: I2C1 device addresses
Function Device Address (7 bit) / (8 bit) Remark
Data EEPROM 24LC256
0x57 / 1010 111b
–
System Controller MKL04Z16
0x11 / 0010 001b
–
RTC PCF85063A
0x51 / 1010 001b
–
Temperature Sensor SA560004EDP 3
0x4C / 1001 101b
–
Temperature Sensor / EEPROM SE97BTP
0x18 / 0011 000b
Temperature
0x50 / 1010 000b
EEPROM, unprotected
0x30 / 0110 000b
EEPROM, protected
All six I2C buses of the LS1028A CPU (I2C1 to I2C6) are not terminated and routed to the TQMLS1028A connectors.
The I2C1 bus is level shifted to 3.3 V and terminated with 4.7 kΩpull-ups to 3.3 V on the TQMLS1028A.
The I2C devices on the TQMLS1028A are connected to the level-shifted I2C1 bus. More devices can be connected to the bus, but
additional external pull-ups may be necessary on account of the relatively high capacitive load.
4.14.3 JTAG
On the MBLS1082A is a 20-pin pin header with 100 mil pitch where various debuggers can be connected.
Alternatively the LS1028A CPU can be addressed via OpenSDA.
4.15 TQMLS1028A interfaces
4.15.1 Pin multiplexing
When using the processor signals the multiple pin configurations by different processor-internal function units must be taken
note of. The pins assignment listed in
Table 10, and
Table 11 refer to the corresponding standard BSP of TQ-Systems GmbH in combination with the Starterkit MBLS1028A.
Attention: Destruction or malfunction
Depending on the configuration many CPU pins can provide several different functions.
Please take note of the information concerning the configuration of these pins in (1), before
integration or start-up of your carrier board / Starterkit.
3: Address is compatible to ADT7461, LM86, MAX6657/8 und ADM1032.

Preliminary User's Manual l TQMLS1028A UM 0001 l © 2019, TQ-Systems GmbH Page 16
4.15.2 Pinout TQMLS1028A
Table 10: Pinout connector X1
Ball Level Group Signal Pin Signal Group Level Ball
5 V Power VIN 1 2 VIN Power 5 V
5 V
Power
VIN
3
4
VIN
Power
5 V
5 V
Power
VIN
5
6
VIN
Power
5 V
5 V
Power
VIN
7
8
VIN
Power
5 V
5 V
Power
VIN
9
10
VIN
Power
5 V
5 V
Power
VIN
11
12
VIN
Power
5 V
3.0 V
Power
VBAT
13
14
PGOOD
System
3.3 V
0 V
Power
DGND
15
16
DGND
Power
0 V
3.3 V
System
RESIN#
17
18
PROG_MTR
Factory Test
–
3.3 V
System
RCW_SRC_SEL
19
20
FA_VL
Factory Test
–
3.3 V
I2C
IIC1_SCL_3V3
21
22
TA_PROG_SFP
Factory Test
–
3.3 V
I2C
IIC1_SDA_3V3
23
24
TA_BB_VDD
Power
(VDD)
5 V (OC)
System
RTC_INT_OUT#
25
26
EVDD
Power
1.8 / 3.3 V
VBAT
System
RTC_CLKOUT
27
28
DGND
Power
0 V
0 V
Power
DGND
29
30
USB1_D_P
USB
–
0 V
Power
DGND
31
32
USB1_D_M
USB
–
–
USB
USB2_RX_P
33
34
DGND
Power
0 V
–
USB
USB2_RX_M
35
36
DGND
Power
0 V
0 V
Power
DGND
37
38
USB1_RX_P
USB
–
0 V
Power
DGND
39
40
USB1_RX_M
USB
–
–
USB
USB2_TX_P
41
42
DGND
Power
0 V
–
USB
USB2_TX_M
43
44
DGND
Power
0 V
0 V
Power
DGND
45
46
USB1_TX_P
USB
–
0 V
Power
DGND
47
48
USB1_TX_M
USB
–
–
USB
USB2_D_P
49
50
DGND
Power
0 V
–
USB
USB2_D_M
51
52
DGND
Power
0 V
0 V
Power
DGND
53
54
USB1_VBUS
USB
–
–
USB
USB2_VBUS
55
56
USB1_ID
USB
–
–
USB
USB2_ID
57
58
USB_PWRFAULT
USB
1.8 V
1.8 V
USB
USB_DRVVBUS
59
60
VCC1V8
Factory Test
1.8 V
2.5 V
Factory Test
VCC2V5
61
62
DGND
Power
0 V
0 V
Power
DGND
63
64
XSPI1_A_DATA1
XSPI
1.8 V
1.8 V
XSPI
XSPI1_A_DATA0
65
66
XSPI1_A_DATA3
XSPI
1.8 V
1.8 V
XSPI
XSPI1_A_DATA2
67
68
XSPI1_A_DATA5
XSPI
1.8 V
1.8 V
XSPI
XSPI1_A_DATA4
69
70
XSPI1_A_DATA7
XSPI
1.8 V
1.8 V
XSPI
XSPI1_A_DATA6
71
72
XSPI1_A_CS0#
XSPI
1.8 V
1.8 V
XSPI
XSPI1_A_CS1#
73
74
XSPI1_A_DQS
XSPI
1.8 V
1.8 V
XSPI
XSPI1_A_SCK
75
76
DGND
Power
0 V
0 V
Power
DGND
77
78
SDHC2_CLK
SDHC
1.8 V
1.8 V
SDHC
SDHC2_CMD
79
80
DGND
Power
0 V
1.8 V
SDHC
SDHC2_DS
81
82
SDHC2_DAT0
SDHC
1.8 V
1.8 V
SDHC
SDHC2_DAT4
83
84
SDHC2_DAT1
SDHC
1.8 V
0 V
Power
DGND
85
86
SDHC2_DAT2
SDHC
1.8 V
1.8 V
SDHC
SDHC2_DAT5
87
88
SDHC2_DAT3
SDHC
1.8 V
1.8 V
SDHC
SDHC2_DAT6
89
90
DGND
Power
0 V
1.8 V
SDHC
SDHC2_DAT7
91
92
VCC1V2
Factory Test
1.8 V
0 V
Power
DGND
93
94
DP_HPD
DP
1.8 V
(DP_SVDD)
DP
DP_REFCLK_P
95
96
DGND
Power
0 V
(DP_SVDD)
DP
DP_REFCLK_N
97
98
DGND
Power
0 V
0 V
Power
DGND
99
100
DP_LANE0_P
DP
(DP_SVDD)
0 V
Power
DGND
101
102
DP_LANE0_N
DP
(DP_SVDD)
(DP_SVDD)
DP
DP_LANE1_P
103
104
DGND
Power
0 V
(DP_SVDD)
DP
DP_LANE1_N
105
106
DGND
Power
0 V
0 V
Power
DGND
107
108
DP_LANE2_P
DP
(DP_SVDD)
0 V
Power
DGND
109
110
DP_LANE2_N
DP
(DP_SVDD)
(DP_SVDD)
DP
DP_LANE3_P
111
112
DGND
Power
0 V
(DP_SVDD)
DP
DP_LANE3_N
113
114
DGND
Power
0 V
0 V
Power
DGND
115
116
DP_AUX_P
DP
(DP_SVDD)
0 V
Power
DGND
117
118
DP_AUX_N
DP
(DP_SVDD)
0.6 V
Factory Test
VCC2V5
119
120
DGND
Power
0 V