Yamaha SPX50D User manual

DIGITAL SOUND PROCESSOR
SERVICE MANUAL
CONTENTS (S'A)
SPECIFICATIONS (|g-a-f±W 2
PANELLAYOUT TO I') •3
CIRCUIT BOARD LAYOUT (zl ~yhUTT't7> )4
BLOCKDIAGRAM (^ y^YTA) 6
DIMENSIONS (^>±[H) 6
LSI DATA TABLE (LSliffi^^#!*) 7
1C BLOCK DIAGRAM (1C yn y^m) 10
CIRCUIT BOARDS 12
DISASSEMBLY PROCEDURE 16
TEST PROGRAM (y^hynyyA) 19
CHECKS 22
ADJUSTMENTS (H^) 24
ERROR MESSAGES (:c7-y y-tz-y) 24
MIDI DATA FORMAT (MIDI y-y y^-vyh)25
MIDI IMPLEMENTATION CHART 27
PARTS LIST
006865 YAMAHA GORP
HAMAMATSU, JAPAN
2.64K-313 Printed in Japan ’88.6.

SPX50D
SPX50D
rIMPORTANT NOTICE
This manual has been provided for the use of authorized Yamaha Retailers and their service personnel. It
has been assumed that basic service procedures inherent to the industry, and more specifically Yamaha
Products, are already known and understood by the users, and have therefore not been restated.
WARNING: Failure to follow appropriate service and safety procedures when servicing this product
may result in personal injury, destruction of expensive components and failure of the
product to perform as specified. For these reasons, we advise all Yamaha product owners
that all service required should be performed by an authorized Yamaha Retailer or the
appointed service representative.
IMPORTANT: The presentation or sale of this manual to any individual or firm does not constitute
authorization, certification, recognition of any applicable technical capabilities, or
establish aprinciple-agent relationship of any form.
The data provided is believed to be accurate and applicable to the unit(s) indicated on the cover. The
research, engineering, and service departments of Yamaha are continually striving to improve Yamaha
products. Modifications are, therefore, inevitable and changes in specification are subject to change without
notice or obligation to retrofit. Should any discrepancy appear to exist, please contact the distributor’s
Service Division.
WARNING: Static discharges can destroy expensive components. Discharge any static electricity your
body may have accumulated by grounding yourself to the ground buss in the unit (heavy
gauge black wires connect to this buss).
IMPORTANT: Turn the unit OFF during disassembly and parts replacement. Recheck ^work before
you apply power to the unit.
This product uses alithium battery for memory back-up.
WARNING: Lithium batteries are dangerous because they can be exploded by improper handling.
Observe the following precautions when handling or replacing lithium batteries.
•Leave lithium battery replacement to qualified service personnel.
•Always replace with batteries of the same type.
•When installing on the PC board, solder using the connection terminals provided on the battery cells.
Never solder directly to the cells. Perform the soldering as quickly as possible.
•Never reverse the battery polarities when installing.
•Do not short the batteries.
•Do not attempt to recharge these batteries.
•Do not disassemble the batteries.
•Never heat batteries or throw them into fire.
V
ADVARSEL!
Lithiumbatteri. Eksplosionsfare.
Udskiftning mi kun foretages af en sagkyndig, og som beskrevet iservicemanuaien.

SPX50D
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Frequency Responce 20 Hz-1 2kHz
Dynamic Range Delay: More than 80 dB
Others: More than 74 dB
THD Less than 0.1% @DELAY,1kHz, max.
INPUT
Number of Channels Unbalanced x1(phone jack)
Nominal level -20 dBm
Impedance More than 500 k-ohms
A/D, D/A CONVERSION
Number of Channels 1
Sampling Frequency 31.25kHz
Quantization 16bits
OUTPUT
Number of Channels Unbalanced x2(phone jack)
Norminal level -20dBm
Impedance 1k-ohm
MEMORY
Presets (ROM) 1-50
User Memory (RAM) 51 -100
MIDI CONTROL Program Number
Note ON/OFF
20Hz'-' 12kHz
y-( -f- i. yU>iy
7"'-f L'-T KB# 80dB
74dB
<i^-T^) 0. I%UT(@ 1kHz)
INPUT
1
-20dB
A7)-T >f— 500kni->t_h
a7- ?y
OUTPUT
2
T7>.X
-20dB
tUTi Y>ika
a5-
T-'iA 9JPge
AD/PAa >y<—9 I6f yI-
31 .25kHz
>^u—
-yV-tr yI- 7'n A50fI(No. 1~50)
a.— +/ —xyp A50|M(No.5l~l00)
7PhyJP
7Yy^ POWER ON/OFF
7-7 5INPUTUr<.;pri >1- p—;p
T-'Y^yuY
ATlU^JP 7*Y-LED(-30~0)
y' "E ‘J —No. 7 -b >F24ftLED
yP7'7A«,/\’7> —
,
7-y t—-7 ley:*: 2ISLCD
FRONT PANNEL
Keys
Display
Input Level Monitor
Knob
Jack
(T), (i), MEMORY, -
PARAMETER, STORE, RECALL.
COMPARE, INSERT, UTILITY,
REV/DLY Group, MOD.OTHERS,
DIST.Group, TRIGGER. BYPASS
16 char, x2lines, LCD
2-digit 7-segment LED
7-segment LED
Input Level Volume
TUNER OUT, INPUT
REAR PANEL
Jack(Mono) INPUT, INSERT IN/OUT, OUTPUT
UR.FOOT SW(MEMORYyTRIGGER
,BYPASS)
MIDI Terminals IN, THRU
GENERAL
Dimensions(WxHxD)
Weight
Power Consumption
480 X45.2 X285 mm
3.6 kg
20 W
+—UP(A)+ —
DOWN(V) +—
MEMORY
PARAMETER
STORE
RECALL
COMPARE
INSERT
UTILITY
REV/DLY Group
MOD.OTHERS
DIST.Group
TRIGGER
BYPASS
TUNER OUT
INPUT
i) 7/tY'7P
aT- 7—OUTPUT L/R
MIDI IN/THRU
FOOT SW
(MEMORY/TRIGGER, BYPASS)
INSERT IN/OUT
INPUT
ACIOOV 50/60HZ
I3W
T|-;S(WXHXD) 480mm x45 .2mm x285mm
fiC 3.6kg
•0dB =0. 775Vr.m.s.
2

PANEL LAYOUT
•Front Panel (7 >
SPX50D
OPOWER Switch
@INPUT LEVEL Control
©INPUT LEVEL Meter
OLED MEMORY Number Display
0LCD (Liquid Crystal Display)
©Increment/Decrement Buttons
©MEMORY Button
©PARAMETER Button
©STORE Button
©RECALL Button
©COMPARE Button
©INSERT Button
©UTILITY Button
©Direct Recall Buttons (REV/DLY Group,
MOD&OTHERS, DIST Group)
©TRIGGER Button
©BYPASS Button
©TUNER OUT Jack
©INPUT Jack
OPOWERxT-y^^
©INPUT
h
a—Ji'
©INPUTU'<;u7-7-
O7^'j -No. 7=
©LCD
©MEMORY+-
©PARAMETERa^R+-
©STORE +-
©RECALL
©COMPARE+-
©INSERT+-
©UTILITY +-
©1^7 h'J 3+-(REV/DLY Groups-,
MOD.OTHERS +-, DIST. Group +-)
©TRIGGER +-
©BYPASS +-
©TUNER OUTST'
©INPUTST^
OMIDI THRU Connector
©MIDI IN Connector
©BYPASS FOOT SW Jack
OMEM./TRG. FOOT SW Jack
©R&L OUTPUT Jacks
©INSERT IN and OUT Jacks
©INPUT Jack
OMIDITHRUv^
©MIDI IN
©BYPASSffl7-y
OMEM0RY50'TRIGGERffl7 yhXT
©OUTPUT^T^
©INSERTS?
©INPUT^T^
3

SPX50D

SPX50D
SPX50D
LSI DATA TABLE
•YM3901 (XC28200DADA
FUNCTION PIN
NO. NAME I/O FUNCTION
1MCLK 1System clock 33 DAI 0Outputs Parallel data 1to DAC
2SYIN 1Input of system synch, signal 34 DA2 0Outputs Parallel data 2to DAC
3SYO 0Output of system synch, signal 35 DA3 0Outputs Parallel data 3to DAC
4REST 1System reset signal, except Ran. 36 DA4 0Outputs Parallel data 4to DAC
DRST gen. 37 DA5 0Outputs Parallel data 5to DAC 51Reset signal for Randam 38 DA6 0Outputs Parallel data 6to DAC
MDO generator 39 DA7 0Outputs Parallel data 7to DAC
6140 DA8 0Outputs Parallel data 8to DAC
7MD1 1}Selecting system mode 41 GND 1Ground (Earth) Terminal
8MD3 1)42 DA9 0Outputs Parallel data 9 to DAC
9DICO 1Mode selection for Diser 43 DA10 0Outputs Parallel data 10 to DAC
10 GND 1Ground (Earth) Terminal 44 DAI 10Outputs Parallel data 1 1 to DAC
1 1 DIC1 1Mode selection for Diser 45 DAI 20Outputs Parallel data 12 to DAC
12 DN 1Selection of ser. data format 46 DA13 0Outputs Parallel data 13 to DAC
13 (DSP/Normal) 47 DA14 0Outputs Parallel data 14 to DAC TD 1For test, external synch, control 48 DA15 0Outputs Parallel data 15 (MSB)
14 TNC 1Selection of ser. Input data mode to DAC
at MODE 0or 349 CPIN 1Inputs the output signal of
(Time sharing/NOT) comparator, at successive
15 DLYO 1\Selection of Phase lag value for approximation
16 DLY1 1/DIN 1,
2
50 ADCK 0Inner successive comparating
17
18 DIN1 DIN2 1
11Inputs serial data for DAC 51 SHI 0register CLOCK
Sample/hold signal 1, Outputs
19 DOUT 0Outputs serial data after AD SW sel. signal at MODE 1
.
20 DD01 converting 52 SH2 0 Sample/hold signal 2
0\Outputs serial data of phase delay (Mode 2:Switch sel. signal)
21 DD02 0/for DIN 1, 2Mode 4:De-glitch signal 3)
22 DAOVC
/PRIN 1Over flow control terminal for
DA. 53 54 ASW1
ASW2 0
01
\Outputs switch select signal
GND :OFF, 5V :ON
or PRCN :5V; Initialization of 55 REG2 0Eor test, enable signal of
randam number resister 2
23 PRCN 1For test, at 5V initialization of 56 MPX1 0For test, select data out
randam number 57 REG1 0For test, enable signal of
24 TM1 0Outputs timming signal
More delayed 32 bit in DIN 2register out
25 D32 058 VDD 1t5V DC voltage
are output 59 MPX3 0For test, select signal out
26 VDD 145V DC voltage 60 DEGL11 0De-glitch signal 11
27 OVFL 0Outputs over flow signal after 61 DEGL12 0De-glitch signal 12
AD converting (Active L) 62 REG3 0For test, enable signal for
28 PRDL 0Outputs the timming of input for register 3
output serial ran. data from PRDO 63 ADCX 0For test, outputs control signal
29 PRDO 0Outputs ser. randam data (Two of clock for successive
30
31 DEG1 DEG2
comp, data) for YM301 5, 3020 approximation
0
01Outputs De-glitch signal 64 ADST 0For test, outputs start signal for successive approximation
32 DAO 0Outputs Parallel data 0(LSB)
to DAC
•YM3807 (1T380700) Modulation Data Generator
Pin No. Function
^Outputs waveform data for
all channels inside MOD.
Power supply +5V
Pin No.
\Inputs data to add to the wave-
/form data inside MOD
tOutputs MOD internal wave-
Jform data with the same data
format as MDSIO.
Function
Power supply ground
0CD interface serial data output
1CD interface serial data intput
CD interface transmission clock
input
Selects 1/16 mode (asynchronous)
or 1/1 mode (synchronous) for the
CD interface
CD counter reset
3.2MHz
Initial clear
Sync signal input. One 64th of the
master clock.
channels inside MOD.

SPX50D
•HD6303Y (XE386A00) CPU
PIN
NO. NAME I/O FUNCTION PIN
NO. NAME I/O FUNCTION
1Vss 1Ground 33 Vcc DC Supply
2XTAL 11Clock 34 V15 o
3EXTAL 135 A14 0
4MPO 1.. .36 A13 0
5
6MP1
RES 1
1
jMoae program
Reset 37
38 A12
All 0 0rAddress bus
7STBY 1Stand-by mode signal 39 A10 o
8NMi 1Non-maskable interrupt 40 A9 o
9P20 I/O 'I 41 A8 0.
10 P21 I/O 42 Vss Ground
11 P22 I/O 43 A7 0
12 P23 I/O yPort 244 A6 0
13 P24 I/O 45 A5 0
14
15 P25 P26 I/O I/O 46 47 A4
A3 0
0Address bus
16 P27 I/O 48 A2 0
17 P50 I/O *49 A1 0
18 P51 I/O 50 AO 0>
19 P52 I/O 51 D7 I/O
20 P53 I/O Port 552 D6 I/O
21 P54 I/O 53 D5 I/O
22
23 P55
P56 I/O
I/O 54
55 D4
D5 I/O
I/O Data bus
24 P57 I/O J56 D2 I/O
25 P60 I/O 57 D1 I/O
26 P61 I/O 58 DO I/O
27 P62 I/O 59 BA 0Bus available
28
29 P63
P64 I/O I/O 'Port 660
61 LIR R/W o oLoad instruction resistor Read/Write control
30 P65 I/O 62 WR 0Write
31 P66 I/O 63 RD oRead
32 P67 I/O 64 E0Enable
•HD63B50P (IG1 47300) Asynchronous Communications Interface Adapter
PIN
NO. NAME I/O FUNCTION PIN
NO. NAME I/O FUNCTION
1Vss DC supply OV 13 R/W 1Read/Write
2Rx Data 1Receive data 14 E1Enable
3Rx CLK 1Receive clock 15 D7 I/O
4Tx CLS OTransmit clock 16 D6 I/O
5rTs I/O Request to send 17 D5 I/O
6Tx Data 0Transmit data 18 D4 I/O Data bus
7IRQ 1Interrupt request 19 D3 I/O
8CSO 1120 D2 I/O
9CS2 1>Chip select 21 D1 I/O
10 CS1 1J22 DO I/O
11 RS 1Resist select 23 DCD 1Data carrier detect
12 Vcc DC supply (+5.0VI 24 CTS 1Clear to send
•PCM54HP (XA566001 )Digital to Analog Converter
Pin
No. Name I/O Function Pin
No. Name I/O Function
1Vpot Not used 15 DA4 Bit 13
2DA16 Bit 1(MSB) 16 DA3 Bit 14
3DA15 Bit 217 DA2 Bit 15
4NC Not used 18 DAI Bit 16 (LSB)
5DA14 Bit 319 VOUT Voltage Output
6DA13 Bit 420 FBR Not used
7DA12 Bit 521 s/v Summing Junction
8DA11 Bit 622 COM Common
9DA10 Bit 723 1OUT Current Output
10 DA9 Bit 824 NC Not Used
11 DAS Bit 925 OFFS Not Used
12 DA7 Bit 10 26 +Vcc +15V
13 DA6 Bit 11 27 ADJ Not used
14 DAB Bit 12 28 —Vcc -15V
8

SPX50D
SPX50D
Pin No.
1
Name I/O
MDAT15 1.0
MDAT14 1.0
MDAT13 1.0
MDAT12 1.0
MDAT11 1.0
MDAT10 1.0
MDAT9 1.0
MDAT8 1.0
MDAT7 1.0
MDAT6 1.0
MDAT5 1.0
MDAT4 1.0
MDAT3
MDAT2
MDAT1
MDATO
SI1
•Data bus
Serial data input terminal
Serial data output terminal
Select internal ACIA synchroni-
zation mode
Time-out output terminal
Time-out output terminal
CD counter reset
CD data output terminal
CD data input terminal
Unconditionally outputs the 15th
bit of the Address Shift Register
Three-state. Memory which needs
refreshing.
Three-state. Connect to memory
OE.
Three-state. Memory read/write
signal.
Three-state. DRAM control
Three-state, signal
.Data bus
MOD data input terminal
Initial clear
Chip enable
Master clock input terminal
Nnput for generating SYNC signals
internally
Terminal for internal test. To
enter test mode, connect to GND.
When in use, VDD.
•Address bus
Power supply 5V

SPX50D
1C BLOCK DIAGRAM (ICT^^n 'y^m)
•SN74HC02N (IR000250)
Quad 2Input NOR •SN74HCU04N (IG1 42250) Hex Inverter
•SN74HC14N (IR001450)
Hex Inverter
•SN74HC32N (IR003250)
Quad 2Input OR
Vcc
46
4A
4Y
3B
3A
3Y
•SN74HC174IM (IR017450)
Hex D-Type Flip-Flop
•SN74HC74N (IR007450)
Dual D-Type Flip-Flop
•SN74HC139N (1R013950)
Dual 2to 4Demultiplexer
•SIM74HC245N (IR024550)
Octal 3-State Bus Transceiver
•SIM74LS266P (XA379001)
Quad 2Input O.C. Ex-NOR
10

SPX50D
SPX50D
•TC4053BP (IG055100)
Triple2-Ch.
Multiplexer/Demultiplexer
•M5238P (XA013001)
•NJM4558DV (IG001 390)
Dual Operational Amplifier
-do.- Z1
Commons OUT/IN
2
Switches IN/OUT
20
Control Inhibit
-DC Voltage Supply
-do. -
Output A
Inverting
Input A
Non-Inverting
Input A
-DC Voltage Supply
+DC Voltage
Supply
Output B
Inverting
Input B
Non-Invert if»g
input B
•IR9311 (IG1 34900)
Comparator
\y
GISJD (0 fVCC
VIN (+1® |Ss VOUT
VIN {-)(|) Ml
VEE ®©N2
r
11

SPX50D
DISASSEMBLY PROCEDURE (^^¥11)
1.Removal of Top cover
•Remove the 7 screws ®(3 x8bind head screw).
(Refer to Fig. 1
)
•Lift the Top cover while opening the bottom edges
of the both sides of it slightly.
•T- (3X8 i^) 7jl-
Ltt. (Fig.1#0S)
S-to
2. Removal of AD Circuit board
•Remove the Top cover. (Refer to 1.)
•Remove the 4screws ®(3 x8bind head screw)
.
(Refer to Fig. 2)
•After the 3screws© (3x8 bind head screw) have
been removed, the AD circuit board can be raised.
(Refer to Fig. 3)
2. AD'>-
•h•/ L^to (1
•t(3X8 '<4 >Ktt 4
Li to (Fig.2#0S)
•(3X8y) 3
Ltto (Fig.3#HB)
•AD
-FS-IXtbL^to
Fig. 2
16

SPX50D
SPX50D
3. Removal of PW circuit board (Refer to Fig. 3)
•Remove the Top cover. (Refer to 1.)
•Remove the 2screws ®(3 x8bind head screw)
.
and remove the shield plate.
Remove the 2screws ©(4x6 bind head screw)
.
•Disconnect ail connectors on the PW circuit board,
and take the Power transformer out of the unit.
•Remove the 4screws ©, (3x8 bind head screw)
and take the PW circuit board out of the unit.
4. Removal of FP circuit boards
•Remove the Top cover. (Refer to 1
)
•Remove the 4screws ©(3x8 bind head screw).
•Remove the 5screws 0(3 x8bind head screw),
which located on the bottom side of the unit, and
take the Front panel out of the unit.
(Refer to Fig. 4)
4-1 Removal of FP1/4 circuit board
•Disconnect 2connectors on the AD circuit board,
and take the FP1 /4 circuit board out of the unit.
4-2 Removal of FP2/4 circuit board
•Remove the 2hexagonal nuts© (^9) which locat-
ed on the right side of the sub chasis.
(Refer to Fig. 5)
•Disconnect aconnector on the AD circuit board,
and take the FP2/4 circuit board out of the unit.
3. PW'>- (Fig.3#,^J
•h’y L^-to (1 If#®)
•T' V© (3X8x) 24:^^
•7- X© (4X6'^) 2y(s
Lt-fo
•PW->— —f7
•(3X8 '<4 yy) 4
LPW->- F
4. FP'>-
•y© (3x8 '<4 yy) 4
Ltto (Fig.3#0(?)
•I) T' (3X8 '<4
(Fig.4#0B)
4-1 FP1/4'>-
•AD h±(^^ 4'^ y— 2(0^5i'L.FP
^/4y- hs- mm L^-to
4-2 FP2/4'>-
•->ty'y^’-y^^iz^i,6p}i--yh(I) (0
2'(|SI4‘^1'L^'t'o (Fig.5#BB)
•AD->- ^±(7)^ 4.:^ y-^^LfP2/4
y- V^mm L^-to
17

SPX50D
4-3 Removal of FP3/4 circuit board.
•Remove the 2screws (g) (3 x8bind head screw).
(Refer to Fig. 5)
•Disconnect 2connectors on the AD circuit board,
and take the FP3/4 circuit board out of the unit.
4-4 Removal of the FP4/4 circuit board
.
•Pull the knob out from ashaft of the variable re-
sistor.
•Remove ahexagonal nut© (07)
•Disconnect aconnector on the AD circuit board,
and take the FP4/4 circuit board out of the unit.
4-3 FP3/4'>-
•T- (3X8i^) 2
•AD->- FP3/4
hL(Fig.5#0S)
4-4 FP4/4'>-
•INPUT LEVELiO'y-^5
•eni-y F© (0 7)
(Fig. 5#,®)
•AD F±<7) 9- LFP4/4
FP3/4 Circuit Board (0)FP1/4 Circuit Board Q
OV r^fi lU !LI
1# ^
I1|JUU^^1 MIfTTfm'o
1 1
i:-nnn n_U iQ
FP4/4 CircuitBoard
LCD Circuit Board FP2/4 Circuit Board
Fig. 5
5. Removal of the LCD circuit board.
•Remove the Top cover and Front panel.
(Refer to 1., 4.)
•Remove the 2screws ®(2.6x5 pan head screw).
(Refer to Fig. 5)
•Disconnect the connectors on the AD circuit board,
and take the LCD circuit board out of the unit.
5. LCD'>-
•F7n>
Ltto (1. 4JI#0S)
(2.6X 52©$^L^
©= (Fig. 5#03)
•AD VLCD ->
-F
18

SPX50D
SPX50D
TEST PROGRAM
•Test Program Entry
(1) While pressing the "BYPASS" and "ME-
MORY "switches, turn the POWER sw-
itch on.
The Test Program will be activated.
The message will appear in the LCD as
shown below,
TEST ACIA
and the 7-segments LED will indicate "0"
.
The ROM, RAM, DEO and DSP checks
are performed automatically.
(2) On normal operation, when the power
switch is turned on, the ROM and RAM
checks will be performed automatically.
And the DEO, DSP check will be per-
formed too.
(3) The test-number will be indicated in the
7-segments LED.
Select atest-number with following
operation.
First, press the "MEMORY" switch.
Pressing the "t"switch will increase the
test-number and pressing the "i"sw-
itch will decrease it.
Press the "RECALL" switch to initiate the
test.
(4) When the test 6is activated after com-
pletion of the tests 1through 5, normal
operation will be restored .When the test
100 is activated, normal operation will
be restored regardless of the completion
of the tests.
1.TEST1 :LCD Check
(1) Select the test-number "1", and press
the "RECALL" switch to initiate the test.
(2) The entire LCD is turned "ON and OFF"
five times.
(3) Verify proper lighting of all dots in the
LCD.
2. TEST2-.LED Check
(1) Select the test-number "2" ,and press
the "RECALL" switch to initiate the test.
(2) The 7-segments LED will indicate figures
of "0" to "99" in sequence.
f-X V
•A. T-X h7°n
a) |BYPASS| ^-L |MEMORY
^'f'7-XT ON
jg rXh•ynXXALfz TILX)«
DIAGNOSTICS V* .*
TEST ACIA
7-fe X'Y >fLED i-(± I0|
(2) ROM, S-RAM iy•+fA, U-K•
xT h•tX f&yDEQ, DSP X)i|ijfp [!]?§• <7)
f-:n'yX(±, TXfX° DXXA^H®0f,tfzU^
T>•X°nXxA_h(ii?i?|jjfTfi#) •X
T'y f- ON
B.XXh•7° DyX
IMEMORY IL,
T, FJfgWrX hNo.S-31KL/-cf^, [RECALL]
^rXhNo.(i, yhLED
C. xx F•7”nyxA*'bii^i!ifF's(7)^!l§
(1) rXhe^jjfXL, |RECALL| jr-^ff1-o me,
rXF•7°n A1~54-, y-KT
-So
(2) rX H004jlt/^L-C, IRECALL]
tXF1~5 4, -MnLfzAK
I),
1.TEST1 LCD j:
'
y^
(1) TXFl4mKL, IRECALL]
(2) LCD KxFX) 5H]^ *9 lEyo
(3) LCD gtlC: J; Dmmt6o
2.TEST2 LED
(1) rXF2 4-91#^L, ]RECALL]
(2) 7-feXV> FLED ^®,(n) ,~(§)
^--XT'yyi^iLED^,
]MEMORY ],]PARAMETER ],]COMPARE] ,
1INSERT ],]UTILITY ],]TRIGGER] WUlT'^
yK'TI)o 7-feXV xF LED X)^-feXV
>F, Rn\ ^-XT -y ^P*9X>1--<TX) LED 4-
19

SPX50D
(3) The switch LED indicators will light one
after another in order of "MEMORY",
"COMPARE", "INSERT", "UTILITY",
"TRIGGER".
(4) All of the LED indicators and segments
will simultaneously light ON about three
seconds.
(5) Verify proper lighting of all LED indicators
and segments.
(3)
LED:*T
3. TESTS
(1) BYPASS MEM./TRG. Lx
T-y T" LT jo <o
(2) rX L3iRECALLi
(3) LCD mim oo
3. TESTS :Switch Check
(1) Connect foot switches to the BYPASS
and MEM./TRG. jacks.
(2) Select the test-number "3", and press
the "RECALL" switch to initiate the test.
(3) The switch number "00" will appear in
the LCD as shown below.
DIAGNOSTICS V* .*
TEST SWITCH
(4) g|3(cii01
(5) mz. g|3(Ci±, 02
TEST SWITCH 00
Press the switch of which the number
is indicated on the LCD.
Pressing the correct switch can advance
the program.
The order is as shown below;
(00) MEMORY
(01) PARAMETER
(02) STORE
(03) RECALL
(04) COMPARE
(05) REV./DLY
(06) INSERT
(07) MOD.
(09) UTILITY
(10) DIST.
(11) TRIGGER
(12) BYPASS
(FI) FOOTSW BYPASS
(F2) FOOTSW MEM./TRG.
(4) When these tests have been completed
successfully, an "OK" message will
appear on the LCD.
(5) If an incorrect switch is pressed, an error
message "NG" will appear on the LCD.
Press the "RECALL" switch to return the
routine to the procedure (2)
.
And press the switches again in correct
order.
4. TEST4 :AD OFFSET Adjustment
(1)Connect apower amplifier and amonitor
speaker to the Lor ROUTPUT connector
in order to obtain sound check.
(2) Select the test-number "4", and press
the "RECALL" switch to initiate the test.
TEST OFFSET
(6) JTT, IMEMORY I,|PARAMETER |,
ISTOREl ,iRECALLi ,|COMPARE] ,|REV/DLY |,
IINSERT) ,IMOD .I, |UTILITY] ,|DIST. |,
ITRIGGER I,IBYPASS I
Lktc, BYPASS, MEM./TRG. y))ii#(c-7 y
LXT’y f-
(7) Hi#®
IELv4iM#T-^-*^'ff§
§|3(CNG
[recall! LT,
(2)J; •})iltcS^^.y^1-|>i to
4. TEST4A/D ty-b'y \-
A/D 'y L
(1) OUTPUTLXliR^T-i 9,
(2) rX L4|RECALL|
OUTPUT ,iit)0.5|:l-'j3^tc,
y') •yym^tLXm
tST'§
DIAGNOSTICS V* .*
TEST OFFSET
20

SPX50D
SPX50D
If an OFFset voltage is present, the click
noise can be heard from the monitor
speaker.
(3) Adjust VR102 on the AD circuit board
to minimize the click noise level.
5. TEST5 :User's memory setting
(1) Select the test-number "5", and press
the "RECALL" switch to initiate the test.
The message will appear on the LCD as
shown below
;
PRESET USER PRG.
(2) Press the STORE switch .The data in Me-
mory locations 1through 50 will be du-
plicated to Memory locations 51through
100 .
(3) If you won't to perform this function, pr-
ess the "MEMORY" switch, and press
the "T"or "i"switch to select other
routine.
6. TEST 10-17 :DRAM CHECK
(1 )Selectthe test-number "1 0" through "17",
and press the "RECALL" switch to initiate
the test.
The LCD will indicate amessage as sho-
wn below.
(3)/
AD ^-AVR102
ij -y
5. TESTS ij-ro-fe'yxT V;?''
U) rx h5iRECALLi
DIAGNOSTICS V*.*
PRESTET USER PRG. 3
(2) STOREXT ^'J -No.51~100
^ij -i-. No.l ^Ij
*^'3 h°—
tlo
6. TEST 10—17 DRAM 5" X
a) rX H0~17^jlfj^L. [recall!
(2)
DIAGNOSTICS V*.*
TEST DRAM
TEST DRAM
test-no.
(r XFNo.) MSB DRAM IC-no. LSB
message at the
""section
(
10 IC202 IC201 IC206 IC205 THR
1
1
IC201 IC206 IC205 IC204 04B
12 IC206 IC205 IC204 IC203 08B
13 IC205 IC204 IC203 0000 12B
14 IC204 IC203 0000 0000 16B
15 IC203 0000 0000 0000 20B
16 1000 0000 0000 0000 -MX
17 01 1
1
1111 1111 1111 +MX
21

SPX50D
CHECKS
1.PREPARATIONS
1-1 Preparatory Settings
•Unless otherwise specified, the volume
on the front panel and switches on the
rear panel are to be set as follows:
INPUT VOL. MAX
SW 101, 102 "T"
•Each load of the OUTPUT Land Rconm-
ector is to be serially connected to aload
resistor (lOkohms)
•After inspection, set switches SW101
and 102 to "N".
1-2 Measuring Instruments
•For the distortion measurement, alow-
pass filter with cut-off frequency of 80
kHz and —6dB/0CT must be used. .
•For the noise level measurement, alow-
pass filter with the cut-off frequency of
12.7kHz and —6dB/0CT must be used.
•The output impedance of the AF signal
generator must be less than 600 ohms.
•The input impedance of the measuring
instruments must be over 1Mohms.
2. INSPECTIONS
2-1 Gain
When ainput signal of —16.0dBm at 1
kHz is applied to the INPUT connector,
output signals of —6.0 ±1 dBm will be
obtained at the OUTPUT Land Rconne-
ctors.
2-2 Frequency Characteristics
When an input signal of -30dBm is ap-
plied from the INPUT connector, the fre-
quency characteristics of the OUTPUT L
and Rconnectors are within the range
listed in the table below. The reference
frequency used is 1kHz.
1—1^fii
INPUT VOL. MAX
SW10 1,102 "T" (TEST)
oOUTPUT
OUTPUT L, RhtPHONE JACK 10k Q
SW101, 102 l± "N"
to
1-2
(1) 80KHz —6dB/0CT
(2) /'{ 12.7KHZ —6dB/OCT
7'{ —to
(3) >h°-r>xli 600Q 1UT60I. to
(4) IMQ a±c0Zt.
2—1#
INPUTiST-j: 9-16.0dBm/1 kHz
MOUTPUT LRl/ R^^-6.0
±1.OdBm tto
2-2
INPUTJST-il -30dBm WAfj'ft^^fPin L/iB#.
L, Rco^ OUTPUT 1±. 1kHz «
*lpt LTTaX)|EHl^<7)b to
20Hz~1 1kHz 0±2 dB
12kHz 0±|dB
2-3 m. $
2-20.08 %arcozto
2—4
INPUT 1kHz
L, ROUTPUT 6. OdBm
%aTTW‘^ti^ Zto
20Hz~1 1kHz 0±^ dB
12kHz 0+3dB

SPX50D
SPX50D
2-3 Distortion Factor
When an input signal of —30dBm is ap-
plied from the INPUT connector, the dis-
tortion factor should be less than 0.0 8
%.
2-4 Maximum Output
When a1kHz input signal is applied to
the INPUT connector according to the
conditions of section 1-1, the maximum
level of the output signal at the Land R
OUTPUT connectors should be -6.0 dBm
with adistortion factor of less than 0.1%.
2-5 Meter Seusitivity
When 1kHz input signals are applied to
the INPUT connector according to the
conditions of section 1-1 ,and adjust the
input level to obtain asignal of —13 +3
dBm at the OUTPUT connector L, the"0"
level of the level meter is illuminated.
At this point, all level except "0" are illu-
minated.
When the input is opened, all level LED
are turned out.
2-6 Muting Circuit
After the POWER switch is turned ON,
muting iseffectiveforthreeorfourseconds,
and no output signals are generaed. After
this time delay output signals can be obtain-
ed at each OUTPUT connector.
2-7 Noise Level
With the same conditions as stated in 1-1
,
the noise levels of the Land ROUTPUT
connectors are less than -86dBm.
2-5
1-1 INPUT 1kHz
fPSB LT L<7) OUTPUT 13 +3dBm com
J; ^lzAtjm-^cou'<;i^i:mi&L
fcHf, -9~(T) "0" §Cl to
"0" JCITW LED
2—6$j. —XT
2—7
1-1 OUTPUT!, Rco y4XU'<juli
-86dBm to
23

SPX50D
ADJUSTMENTS
1.PREPARATIONS
•Turn the INPUT LEVEL to maximum.
•Leave the slide switches SW101 and
SW102 on the AD circuit board set to
the TEST position.
•The load of the Land ROUTPUT con-
nectors are to each be srially connect-
ed to aload resistor (10k ohms)
.
•After the adjustments have been per-
formed, turn the switches to the NOR-
MAL position.
2. ADJUSTMENTS
2-1
Apply an input signal of -15.5dBm at
1kHz to the INPUT connector and adjust
VR1 01 so that the output signal is clipp-
ing slightly at the Land ROUTPUT con-
nectors.
Adjust VR102 so that the clipping signal
is vertically symmetrical.
Afterwards, adjust VR 101 until the dis-
tortion waveforms of the Land ROUTPUT
connectors for mininum distortion. And
adjust VR103 so that the output signals
of the Land ROUTPUT connectors be-
come -5.5±0.5dBm.
2-2
When the INPUT is opened, the noise le-
vels of the Land ROUTPUT connectors
should be less than -86dBm
.
If noise levels are not within rated levels,
adjust VR 102 so that the noise levels are
within rated values.
ERROR MESSAGES
EO ROM sum check error.
El RAM (CPU's) read/write error.
E2 RAM (IC21 1)read/write error.
1.itfi
•INPUT LEVEL ^-Ay
•SW 101 ,SW102 "T" miz-t yLto
•L, RwOUTPUT ST-
"fe 'y LT•!> o
•SW101, SW102 "N"ffiiJ
LtiJ <Cho
2.
2-1-1
INPUT STT 1-15.5dBm/1kHz coxt} ^
mat. OUTPUT L, RSTWfli**^'T'LS<^^
§i; T(c VR 101^PS Lfz'ik.
j; Ttc VR102 -S-pSt-So
2-1-2
hcoft, OUTPUT L, RSTL:iJi>T. Mxmm
VR101 ^pstSo
TLT. OUTPUTL, RST<7)mi]*h-
5.5±0.5dBm hi-5 (c VR1 03 ^PST
•2> o
2-2
1INPUT
OUTPUT STT6oyTX>-<;K±, -86dBm
ho
102 LT^ /TX
u
tcpStl)„
EO ROM T:n yX^tAXV-
El RAM (CPUl*]$|3) 'J-KvT
E2 RAM (IC211) 'J-KvT
24