ZiLOG ZNEO Series User manual

Copyright ©2008 by Zilog®, Inc. All rights reserved.
www.zilog.com
Introduction
This Quick Start Guide describes how to set up Zilog’s ZNEO®Series Development Kit
and start using it to build designs and applications.
Kit Contents
For a complete list of material shipped with the ZNEO Series Development Kit, refer to
the ZNEO®Series of Microcontrollers Development Kit Packing List (PAK0010).
Requirements
Table 1 lists the system requirements for running Zilog Developer Studio II (ZDS II).
Table 1. ZDS II System Requirements
Recommended Configuration Minimum Configuration
•PC running MS Windows XP
Professional
•Pentium III/500 MHz or higher processor
•128 MB RAM
•110 MB hard disk space
•Super VGA video adapter
•CD-ROM drive
•One or more RS-232 communication
ports
•USB High-Speed Port
•PC running MS Windows 98SE/
Win2000–SP4/WinXP Professional
•Pentium II/233 MHz processor
•96 MB RAM
•25 MB hard disk space (documentation
not installed)
•Super VGA video adapter
•CD-ROM drive
•One or more RS-232 communication
ports
•USB High-Speed Port
ZNEO®Series of
Microcontrollers Development
Kit
Quick Start Guide QS005703-0908

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Configuring the 5 V DC Universal Power Supply
The universal power supply kit features several different plug adapters in one box and the
power supply in another. The power supply ships with a slide-out plate that must be
removed to insert the location-specific plug adapter.
If a location-specific adapter plug is required, follow the steps below to install it:
1. Remove the slide-out plate.
2. Select the AC plug adapter appropriate for your locale and insert it into the slot that
remains after removing the slide-out plate.
3. Slide the new plug adapter into the slot until it snaps into place.
You can leave the adapter slot cover in place and plug in a standard computer equipment
AC power cord (purchased separately) between the AC cord receptacle on the end of the
power supply and an electrical outlet.
Setting Up the Development Board
Setting up the ZNEO development board involves setting its jumpers and using the USB
Smart Cable to connect the board to a high-speed or full-speed USB port on your ZDS II
host system.
Always use a grounding strap to prevent damage resulting from
electrostatic discharge (ESD).
Figure 1 displays a photograph of the ZNEO development board.
Caution:

ZNEO®Series of Microcontrollers Development Kit
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Figure 1. ZNEO Development Board
Jumper Settings
The jumper settings to set up the ZNEO development board is provided below:
1. For initial setup, ensure that jumper J2, DIS RS232, is OUT (shunt not installed) and
jumper J3, DIS IRDA, is IN (shunt installed). For detailed jumper descriptions, refer
to the Z16F2800100ZCOG ZNEO®Series Development Kit User Manual (UM0202).
2. The development kit is preprogrammed with code for demonstration and to verify that
the board is working properly.
To run the preprogrammed Demo, ensure that jumpers and switches are set as follows:
–J1 OUT
–J2 OUT
DBG Connector
Pin 1 (indicated
by square)

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–J3 IN
–J6 OUT
–J7 OUT
–Switch S2 in the RUN position.
–Switch S3 is used to control the sequence in which LEDs D2, D3, and D4 flash
when running the Demo program.
For complete details on jumper settings for ZNEO Series development kits, refer to
the Z16F2800100ZCOG ZNEO®Series Development Kit User Manual (UM0202).
3. To run the preprogrammed Demo software, connect power, set the STOP/RUN switch
S2 to the RUN position, and press reset switch S1. LEDs D2, D3, and D4 should blink
in sequence.
4. After running the Demo software, disconnect power from the development board.
5. Install the included USB Smart Cable. If you have previously installed a USB Smart
Cable as part of another Zilog®Development Kit, the drivers are already present on
your system. Plug the USB Smart Cable supplied with the ZNEO development kit into
an available USB port. The USB Smart Cable drivers automatically installs.
If the USB Smart Cable is never installed on your system, see Installing USB Smart
Cable on page 5 to install the USB Smart Cable for the appropriate operating system.
Refer to the readme.txt file included with the ZNEO installation for additional
information.
Do not connect the power supply to the development board before
connecting a USB Smart Cable to both the host PC and development
board.
Installing the ZDSII–ZNEO®Series Software
Follow the steps below to install the ZDSII–ZNEO®Series software:
1. Insert the ZDS II CD into your computer’s CD-ROM drive. DemoShield launches
automatically. If it does not automatically launch, go to the root of the CD-ROM and
double-click the file launch.exe.
Caution:

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2. DemoShield provides several installation choices. Select Install Zilog Developer
Studio to install now. You can install other software and accompanying documenta-
tion later.
3. Follow the instructions on the screen to complete the installation.
Installing USB Smart Cable
Follow the instructions below to install the USB Smart Cable and associated driver
software:
Windows Vista-32
Follow the steps below to install the USB Smart Cable for Windows Vista-32:
1. Connect the USB Smart Cable to the host PC. The Found New Hardware wizard is
displayed.
2. Select Locate and install driver software (recommended). The User Account
Control window is displayed, click Continue. The Driver Software Installation
window is displayed, and then the Found New Hardware-USB Smart Cable dialog
box is displayed.
3. Select I dont have the disc. Show me other options.
4. Select Browse my computer for driver software (advanced).
5. Browse to one of the following driver directory:
<ZDS II Installation Directory>\device drivers\USB\x32
<ZDS II Installation CD>\device drivers\USB\x32
6. Click Next. The Windows Security dialog box is displayed.
7. Select Install this driver software anyway.
8. When the software has been installed successfully, click Close.

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Windows XP
Follow the steps below to install the USB Smart Cable for Windows XP:
1. Connect the USB Smart Cable to the host PC for the first time.
The Found New Hardware wizard will activate automatically.
2. In the Wizard, select Install from a list or specific location (Advanced); then click
Next.
If the Windows Logo testing dialog appears, select Continue Anyway.
3. Select Search for the best driver in these locations and Include this location in
search.
4. Browse to one of the following driver directory:
<Zilog Developer Studio II Installation Directory>\
device drivers\USB
<Zilog Developer Studio II Installation CD>\Device Drivers\USB
5. Click Next, and then click Next again after the appropriate driver is found.
6. Click Finish to complete the installation.
Windows 2000
Follow the steps below to install the USB Smart Cable for Windows 2000:
1. Connect the USB Smart Cable to the host PC for the first time.
The Found New Hardware wizard should activate automatically.
2. In the Wizard, click Next.
3. Select Search for a suitable driver for my device (Recommended); then click Next.
4. Select Specify a location; then click Next.
5. Browse to one of the following driver directory:
<Zilog Developer Studio II Installation Directory>\
device drivers\USB
<Zilog Developer Studio II Installation CD>\Device Drivers\USB
6. Click OK, and then click Next after the appropriate driver is found.
7. Click Finish to complete the installation.
Note:

ZNEO®Series of Microcontrollers Development Kit
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Windows 98SE
Follow the steps below to install the USB Smart Cable for Windows 98SE:
1. Connect the USB Smart Cable to the host PC for the first time.
The Found New Hardware wizard should activate automatically.
2. In the Wizard, click Next.
3. Select Search for the best driver for your device (Recommended); then click Next.
4. Select Specify a location; then browse to one of the following driver directory:
<Zilog Developer Studio II Installation Directory>\
device drivers\USB
<Zilog Developer Studio II Installation CD>\Device Drivers\USB
5. Click Next, and then click Next again after the appropriate driver is found.
6. Click Finish to complete the installation.
Connecting the USB Smart Cable to the Target Board
Follow the steps below to connect USB Smart Cable to the development board:
1. Attach one end of the six-conductor ribbon cable (included) to the USB Smart Cable
six-pin DBG connector. See Figure 2 on page 7.
2. Attach the free end of the ribbon cable to the DBG connector on the target board.
Ensure that pin 1 on the ribbon cable (indicated by the dark stripe) is aligned with
pin 1 on the target connector (see Figure 1 on page 3 for location of pin 1 on the
ZNEO development board).
Figure 2. Connecting the Six-Conductor Ribbon Cable to the USB Smart
Cable

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Applying Power to the Development Board
Follow the steps below to apply power to the ZNEO development board:
1. After installing the USB Smart Cable, connect the power supply to the development
board at connector P1, then to an electrical outlet.
2. The green 3.3 V DC LED illuminates, indicating that power is being supplied to the
board.
Getting Started Using ZDS II
Follow the steps below to open and use the Z16F2800100ZCOG.zdsproj sample
project. This project is designed to compile and download into ZNEO internal Flash
Memory and blink the development board LEDs.
These procedures reference the Z16F2800100ZCOG.zdsproj file located
in the below path:
c:\Program Files\ZiLOG\ZDSII_ZNEO_<version_number>\
samples\QuickStart\
where <version_number> is the ZDS II version number.
For example,
c:\Program Files\ZiLOG\ZDSII_ZNEO_4.10.1\
samples\QuickStart\
1. To run the sample project with the ZDS II debugger enabled, set the jumpers on the
development board as follows:
–J1 OUT
–J2 OUT
–J3 IN
–J6 OUT
–J7 OUT
–Switch S2 in the RUN position
Note:

ZNEO®Series of Microcontrollers Development Kit
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–Switch S3 is used to control the sequence in which LEDs D2, D3, and D4 flash,
when running the Demo program.
2. Connect and apply power to the development board as described in Setting Up the
Development Board on Page 2 through Page 8.
Do not apply power to the development board unless the USB Smart
Cable is connected to the host PC and to the development board’s DBG
Port P3.
3. Run the ZDS II software. By default, the ZDS II is located in the Start menu under:
Programs → ZiLOG ZDSII ZNEO <version_number> → ZDSII ZNEO
<version_number>
4. Select Open Project from the File menu. The Open Project dialog box appears.
The sample used in the following steps is in the ‘C’ programming language.
An assembler version of the Quick Start sample is located in the
samples\Assembly folder.
5. Browse to the Samples folder for the Z16F2800100ZCOG.zdsproj file, located by
default in below path:
c:\Program Files\ZiLOG\ZDSII_ZNEO_<version_number>\samples\
QuickStart
6. Select the Z16F2800100ZCOG.zdsproj file and click Open. The initial ZDS II
program screen opens (see Figure 3 on page 10).
To view the project source files, double-click the Project Files folder on left side of
the IDE interface. Double-click an individual file to open that file in the ZDS II file
editor.
The following figures are for reference only. The results may vary slightly
due to configuration differences or later software revisions.
Caution:
Note:
Note:

ZNEO®Series of Microcontrollers Development Kit
QS005703-0908 Page 10 of 18
Figure 3. ZDS II Opening Screen
7.Click the Rebuild All icon to build the project. Wait for the
build to complete as indicated by the Build Complete
confirmation in the status window at the bottom of the screen
(see Figure 4 on page 11).
8.Click the Reset icon to connect and download the code to the
development board.
Reset
Icon
Rebuild
All Icon

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9. Click Go to start the program. The screen changes as shown in
Figure 5 on page 12.
Figure 4. ZDS II Build Completed Screen
Go
Icon

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QS005703-0908 Page 12 of 18
Figure 5. ZDS II Screen After Pressing GO
10. LEDs D2, D3, and D4 on the development board begin blinking in sequence. If the
LEDs do not blink, start over from step 3 on page 9.
11. Two-position slide Switch S3 controls the order in which the LEDs blink. To reverse
the sequence of the LEDs and make them blink in the opposite direction, slide switch
S3 to the opposite position.
For more information on using ZDS II and building projects for your
ZNEO
®
develop-
ment kit, refer to the Zilog Developer Studio II–ZNEO®Series User Manual (UM0171).

ZNEO®Series of Microcontrollers Development Kit
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Notes About ZNEO Development Board Memory
Configuration
The ZNEO development board provides 1Mx16 External Flash and 256Kx16 External
RAM to supplement the Flash Memory and RAM internal to the ZNEO CPU. The Quick
Start sample supplied with the development kit defaults to loading into internal Flash
Memory. However, you can easily download the Quick Start sample code into internal
RAM, external RAM, or external Flash by selecting the appropriate Build Configuration
from the drop-down menu at the top of the ZDS II user interface as described below.
Relocation of the sample program is controlled from the Project →Settings dialog box,
in the Linker tab, through the Address Spaces category (The startup module supplied
with the sample program takes care of the appropriate Address Space settings).
Complete information on internal and external memory configuration is described in
Configuring Memory for Your Program section in the Zilog Developer Studio II–
ZNEO
®
Series User Manual (UM0171).
Even though your code may be written for use in external RAM or external
Flash Memory, ensure that the ZNEO chip gets its startup vector table and
other critical information from internal Flash Memory. Your code must
therefore accommodate this requirement. For more information, refer to
Configuring Memory for Your Program section in the Zilog Developer
Studio II– ZNEO
®Series User Manual (UM0171).
Loading and Debugging Sample Code in Internal RAM
To load and debug the code in internal RAM, select Internal_RAM_Debug in the Build
Configuration drop-down menu and click the Rebuild button. Once the project is rebuilt,
use the Download Code option to load the code into internal RAM.
Loading and Debugging Sample Code into External RAM
To load and debug the code in external RAM, select External_RAM_Debug in the Build
Configuration drop-down menu and click the Rebuild button. Once the project is rebuilt,
use the Download Code option to load the code into external RAM.
Note:

ZNEO®Series of Microcontrollers Development Kit
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Loading and Debugging Sample Code in External Flash Memory
To load and debug the code in external Flash memory, select External_FLASH_Debug in
the Build Configuration drop-down menu and click the Rebuild button. Once the project
is rebuilt, use the Download Code option to load the code into external Flash memory.
Using the Built-In ZDS II Flash Loader
You can use the built-in ZDS II Flash Loader to load release hex files into internal or
external Flash Memory. The procedure is similar for loading the release hex files into
internal Flash Memory.
Follow the steps below to load a release hex file into external Flash Memory:
1. Select External_Flash_Release from the Build Configuration drop-down menu.
2. Click the Rebuild All icon to build the project. Wait for the build to complete as
indicated by the Build Complete confirmation in the Status window at the bottom
of the screen.
The resulting hex file will be located in below path:
c:\Program Files\ZiLOG\ZDSII_ZNEO_<version_number>\samples
\QuickStart\External_Flash_Release\
3. Select Tools →Flash Loader to run the Flash Loader. The Flash Loader window is
displayed. See Figure 6 on page 15.

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Figure 6. Flash Loader Window
4. In the Flash Options section of the Flash Loader, select the external Flash component
that matches the device on your target (U6 on the ZNEO development board) from the
External Flash list.
5. The Flash Loader should default to the directory and hex file for the project you built.
If you do not see hex file z16F2800100zcog.hex, click the button and browse
to the following directory:
c:\Program Files\ZiLOG\ZDSII_ZNEO_<version_number>\samples
\QuickStart\External_Flash_Release\
Select the z16F2800100zcog.hex hex file and proceed.
6. Select Program and Verify.
7. Close the Flash Loader.

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8. Connect to your target by clicking the Connect to Target icon.
You will see warnings about the absence of debug information. This is normal. How-
ever, you can single-step and set break points to debug your downloaded code.
9. Click the Reset icon in ZDS II, then click the Go icon.
10. LEDs D2, D3, and D4 on the development board begin blinking in sequence. If the
LEDs do not blink, start over from step 1 on page 14.
11. Two-position slide Switch S3 controls the order in which the LEDs blink. To reverse
the sequence of the LEDs and make them blink in the opposite direction, slide switch
S3 to the opposite position.
12. To return to the factory configuration, click the Stop Debugging icon to disconnect
from the target. Then select Debug from the Build Configuration drop-down menu
and click the Rebuild All icon.
You can now connect to the target and download the code.
Detailed instructions for using the Flash Loader are provided in the Zilog Developer
Studio II–ZNEO®Series User Manual (UM0171).
Troubleshooting Tips
If you experience trouble running the demo program with the ZNEO development board,
check the following troubleshooting tips before contacting Zilog Technical Support for
assistance:
•Verify that you are using ZDS II v4.10.0 or later.
•Ensure that you are using the unmodified sample project code as described in Getting
Started Using ZDS II on page 8.
•Verify that USB Smart Cable is properly connected to the host PC and the develop-
ment board as described in Setting Up the Development Board on page 2. Ensure that
pin 1 of the cable is properly aligned with DBG connector pin 1 of the development
board.
•Apply power to the development board. The green 3.3 V DC LED should turn ON. If
it is not illuminated, verify that power is properly connected to the board as described
in Configuring the 5 V DC Universal Power Supply on page 2.

ZNEO®Series of Microcontrollers Development Kit
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•In ZDS II, select the Project →Settings menu item. In the Debugger tab of the
Project Settings window, in the Target section, verify that the Z16F2800100ZCOG
option is selected. Verify that the drop-down menu in the Debug Tool section is set to
USBSmartCable.
Click the Setup button in the Debug Tool box and verify that the serial number for the
USB Smart Cable interface is present. If the serial number is missing, reinstall the
USB Smart Cable driver software.
•In ZDS II, click the Rebuild All button. Verify that the project rebuilds with no
errors.
•Verify that the development board is not currently running any code — no LEDs
should be blinking.
•In ZDS II, click the IDE Reset button. ZDS II will connect to the development
board and download code to it.
•Open the Windows Hyperterminal application (located in your Accessories program
group) and connect a DB9-to-DB9 cable between your host PC and console port P2 of
the development board. Set the communication settings to 57600 8 bits, no parity, one
stop bit. This is noted on main.c.
•Click the Go button. LEDs D2, D3, and D4 should blink in sequence. The hyper-
terminal should display the ‘Hello World!’ message.
If you perform these steps and cannot get the demo code to run, contact Zilog Technical
Support at www.zilog.com.

ZNEO®Series of Microcontrollers Development Kit
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DO NOT USE IN LIFE SUPPORT
LIFE SUPPORT POLICY
ZILOG'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPO-
NENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS
PRIOR WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF
ZILOG CORPORATION.
As used herein
Life support devices or systems are devices which (a) are intended for surgical implant
into the body, or (b) support or sustain life and whose failure to perform when properly
used in accordance with instructions for use provided in the labeling can be reasonably
expected to result in a significant injury to the user. A critical component is any compo-
nent in a life support device or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or system or to affect its safety or
effectiveness.
Document Disclaimer
©2008 by Zilog, Inc. All rights reserved. Information in this publication concerning the
devices, applications, or technology described is intended to suggest possible uses and
may be superseded. ZILOG, INC. DOES NOT ASSUME LIABILITY FOR OR PRO-
VIDE A REPRESENTATION OF ACCURACY OF THE INFORMATION, DEVICES,
OR TECHNOLOGY DESCRIBED IN THIS DOCUMENT. ZILOG ALSO DOES NOT
ASSUME LIABILITY FOR INTELLECTUAL PROPERTY INFRINGEMENT
RELATED IN ANY MANNER TO USE OF INFORMATION, DEVICES, OR TECH-
NOLOGY DESCRIBED HEREIN OR OTHERWISE. The information contained within
this document has been verified according to the general principles of electrical and
mechanical engineering.
ZNEO is a registered trademark of Zilog, Inc. All other product or service names are the
property of their respective owners.
Warning:

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PA0
PA1
PA2
PA7
PA3
PA4
PA5
-DIS_232
-DIS_IrDA
RXD1
nCTS1
PA6
-RESET
PA6
ANA_M[2:0]
PA3
PK[7:0]
-DIS_IrDA
ANA[11:10]
A[23:0]
-DIS_232
RXD1
TXD1
PC[7:0]
-RESET
nCTS1
PA7
ANA[7:0]
D[15:0]
PA5
PA4
PA2
TXD1
Title
Size Document Number Rev
Date: Sheet of
96C0999-001 C
Z8F1285 Evaluation Module. Schematic.
B
1 4 Thursday, March 02, 2006
Title
Size Document Number Rev
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Z8F1285 Evaluation Module. Schematic.
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Title
Size Document Number Rev
Date: Sheet of
96C0999-001 C
Z8F1285 Evaluation Module. Schematic.
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1 4 Thursday, March 02, 2006
TOP
Rev C: Swapped ANA 8 and ANA 9 on MCU page and MDS interface page
POWER&COMMUNICATIONS
POWER&COMMUNICATIONS
PA4_RXD0
PA1_T0OUT
PA0_T0IN
-DIS_IRDA
PC0_T1IN
-DIS_232
PA2_DE0
PA3_CTS0
PA5_TXD0
PA7_SDA
-RESET
TXD1
RXD1
A1
FAB
A1
FAB
MCU
MCU
PK[7:0]
D[15:0]
TXD1
A[23:0]
RXD1
ANA_M[2:0]
ANA[11:10]
-WR
nCTS1
PC[7:0]
PWML1
PWML2
ANA[7:0]
PWMH1
ANA_8
DE1
PWMH2
ANA_9
-RD
-MC_EN
PA5
PA7
PA0
PA1
PA2
PA3
PA4
-XM_EN
PA6
VREF
PC0_T1IN
-RESET
MDS INTERFACE
MDS_INTERFACE
-DIS_IrDA
-DIS_232
PK[7:0]
D[15:0]
A[23:0]
-WR
PC[7:0]
-RD
ANA_M[2:0]
ANA[11:10]
ANA[7:0]
PWML1
PWMH1
PWML2
PWMH2
PA2
PA3
PA4
PA5
PA6
PA7
TXD1
RXD1
ANA8
ANA9
nCTS1
VREF
-RESET
-MC_EN
-XM_EN
DE1

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PD0_PWMH1_ADR20
PJ4_DATA12
PK4_nCS2 PK1_nBLEN
GND
PJ2_DATA10
PD3_DE1_ADR16
PJ7_DATA15
PF5_ADR5
PF0_ADR0
PK7_nCS5
GND
PA2_DE0
PA0_T0IN
GND
PB1__ANA1_T0IN1
PD1_PWML1_ADR21
PJ1_DATA9PK2_nCS0
PA5_TXD0 PC5_MISO
VCC_33v
PE3_DATA3
PB0__ANA0_T0IN0
PF1_ADR1
VCC_33v
PK3_nCS1
PE0_DATA0
PA1_T0OUT
PB4__ANA4
PC4_MOSI
PJ0_DATA8
-RESET
PA4_RXD0 PF7_ADR7
PH1_ANA9_nRD
PF6_ADR6
PE4_DATA4
PB5__ANA5
PF2_ADR2
PH2_ANA10
PE1_DATA1
VCC_33v
PH0_ANA8_nWR
PD5_TXD1_ADR19
PJ6_DATA14
PB3__ANA3_OPOUT
VCC_33V
PF3_ADR3
GND VCC_33v
PJ3_DATA11
PC2_nSS
GND
PK5_nCS3
PH3_ANA11_CPINP_nWAIT
PD4_RXD1_ADR18
PJ5_DATA13
PK0_nBHEN
GND
PE2_DATA2
PB6_ANA6_OPINP
VCC_33v
PF4_ADR4
PK6_nCS4 PB2__ANA2_T0IN2
VCC_33v
PD2_PWMH2_ADR22
PA3_nCTS0
PB7_ANA7_OPINN
PC1_TOUT PC1
PC3_SCK PC3
PC0_T1IN
PA6_SCL
PA7_SDA
PC4_MOSI PC4
PA4_RXD0
PA3_nCTS0
PA5_TXD0
PC5_MISO PC5
PA1_T0OUT
PC2_nSS PC2
PK5_nCS3 PK5
PK7_nCS5 PK7
PK0_nBHEN PK0
PK6_nCS4 PK6
PK4_nCS2 PK4
PK2_nCS0 PK2
PK1_nBLEN PK1
PH3_ANA11_CPINP_nWAIT ANA11
PH2_ANA10 ANA10
PK3_nCS1 PK3
PF4_ADR4 A4
PJ2_DATA10 D10
PF2_ADR2 A2
PJ3_DATA11 D11
PE5_DATA5 D5
PJ0_DATA8 D8
PE1_DATA1 D1
PJ5_DATA13 D13
PG0_ADR8 A8
PE7_DATA7 D7
PE4_DATA4 D4
PG7_ADR15 A15
PF3_ADR3 A3
PF7_ADR7 A7
PE2_DATA2 D2
PF5_ADR5 A5
PJ6_DATA14 D14
PJ4_DATA12 D12
PG3_ADR11 A11
PE0_DATA0 D0
PJ1_DATA9 D9
PF6_ADR6 A6
PG4_ADR12 A12
PG5_ADR13 A13
PE3_DATA3 D3
PG1_ADR9 A9
PG6_ADR14 A14
PE6_DATA6 D6
PJ7_DATA15 D15
PG2_ADR10 A10
PF1_ADR1 A1
PF0_ADR0 A0
A20
A21
A22
A16
A18
A19
A17
A23
PD0_PWMH1_ADR20
PD3_DE1_ADR16
PD4_RXD1_ADR18
PD7_PWML2_ADR23
PD2_PWMH2_ADR22
PD6_nCTS1_ADR17
PD1_PWML1_ADR21
PD5_TXD1_ADR19
PD5_TXD1_ADR19
PD3_DE1_ADR16
PD2_PWMH2_ADR22
PD1_PWML1_ADR21
PD7_PWML2_ADR23
PD6_nCTS1_ADR17
PD0_PWMH1_ADR20
PD4_RXD1_ADR18
DE1
nCTS1
PWML1
PWMH2
TXD1
PWMH1
PWML2
RXD1
PC6_T2IN_PWMH0 PC6
PC7_T2OUT_PWML0 PC7
PH1_ANA9_nRD
PH0_ANA8_nWR
ANA_9
ANA_8
OPINP_CINN
VREF
AGND
ANA_5
CINP
OPOUT
ANA_M2
ANA_M1
ANA_M0
-MC_EN
Vref
AGND
ANA6
ANA11
ANA7
ANA1
ANA0
ANA2
PA0_T0IN
ANA_M1
ANA_M2
ANA_M0
VCC_33V
PB3__ANA3_OPOUT ANA3
PB2__ANA2_T0IN2 ANA2
PB1__ANA1_T0IN1 ANA1
PB6_ANA6_OPINP ANA6
PB4__ANA4 ANA4
PB5__ANA5 ANA5
ANA3
PB0__ANA0_T0IN0 ANA0
PB7_ANA7_OPINN ANA7
PA2_DE0
AVCC
-MC_EN
VCC_33V
GND
DBG
VCC_33V
-RESET VCC_33V
VCC_33V
PC1_TOUT
PG6_ADR14
PD6_nCTS1_ADR17
PC0_T1IN
VCC_33v
PE5_DATA5
PG2_ADR10
PE7_DATA7
PG3_ADR11
DBG
GND
PC3_SCK
VCC_33v
PG0_ADR8
PE6_DATA6
PG5_ADR13
PG1_ADR9
PA6_SCL
PA7_SDA
PD7_PWML2_ADR23
PC6_T2IN_PWMH0
PG4_ADR12
PC7_T2OUT_PWML0
PG7_ADR15
GND
OPINN
PC0
ANA_5 ANA5
D[15:0]
A[23:0]
-WR
-RD
ANA[11:10]
ANA_M[2:0]
ANA_9
ANA_8
ANA[7:0]
PC[7:0]
PK[7:0]
-MC_EN
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PWMH1
PWML1
PWMH2
PWML2
DE1
TXD1
RXD1
nCTS1
-XM_EN
VREF
-RESET
PC0_T1IN
VCC_33V
VCC_33V
Title
Size Document Number Rev
Date: Sheet of
96C0999-001 C
Z8F1285 Evaluation Module. Schematic.
B
2 4 Monday, May 08, 2006
Title
Size Document Number Rev
Date: Sheet of
96C0999-001 C
Z8F1285 Evaluation Module. Schematic.
B
2 4 Monday, May 08, 2006
Title
Size Document Number Rev
Date: Sheet of
96C0999-001 C
Z8F1285 Evaluation Module. Schematic.
B
2 4 Monday, May 08, 2006
DBG
INTERFACE
XM_OUT/MC_IN
MCU
C3
0.01uF
C3
0.01uF
C6
22pF
C6
22pF
R6
10K
R6
10K
U3
SN74CBTLV3861
U3
SN74CBTLV3861
A1
2
A2
3
A3
4
A4
5
A5
6
A6
7
A7
8
A8
9
A9
10
A10
11
B1
22
B2
21
B3
20
B4
19
B5
18
B6
17
B7
16
B8
15
B9
14
B10
13
NC
1
VCC
24
GND
12
OE
23
C4 12pF C4 12pF
C22
0.01uF
C22
0.01uF
R5
49.9K
R5
49.9K
C9
0.01uF
C9
0.01uF
C21
0.01uF
C21
0.01uF
C20
0.01uF
C20
0.01uF
C2 0.1uF C2 0.1uF
U2
Z8F1285_100QFP
U2
Z8F1285_100QFP
PA0/T0IN/OUT/DMA0REQ
1
PD2/PWMH2/ADR22
2
PC2/SS/CS4
3
PF6/ADR6
4
RESET
5
VDD
6
PF5/ADR5
7
PF4/ADR4
8
PF3/ADR3
9
PE3/DATA3
11
PE4/DATA4
10
GND
12
PE2/DATA2
13
PE1/DATA1
14
PE0/DATA0
15
GND
16
PF2/ADR2
17
PF1/ADR1
18
PF0/ADR0
19
VDD
20
PD1/PWML1/ADR21
21
PD0/PWMH1/ADR20
22
EXTAL
23
XTAL
24
PA1/T0OUT/DMA0CK 95
PA6/SCL/CS3
75
PA7/SDA/CS4
74
GND
25
AGND
45
GND
51
AVDD
31 PH0/ANA8/WR 32 PH1/ANA9/RD 33 PB0/ANA0/T0IN0 34 PB1/ANA1/T0IN1 35 PB4/ANA4 36 PB5/ANA5 37 PB6/ANA6/OPINP/CINN 38 PB7/ANA7/OPINN 39 PB3/ANA3/OPOUT 40 PB2/ANA2/T0IN2 41 PH2/ANA10/CS0 42 PH3/ANA11/CPINP/WAIT 43 VREF 44
PC0/T1IN/OUT/DMA1REQ/CINN
52
PC1/T1OUT/DMA1ACK/COUT
53
DBG
54
PC6/T2IN/OUT/PWMH0 55
PC7/T2OUT/PWML0
56
PG7/ADR15
57
VDD
58
PG6/ADR14
59
PG5/ADR13
60
PG4/ADR12
61
PG3/ADR11
62
PE7/DATA7
64
PE6/DATA6
65
PE5/DATA5
66
PG2/ADR10
67
PG1/ADR9
68
PG0/ADR8
70
PD7/PWML2/ADR23
71
PC3/SCK/DMA2REQ
72
PD6/CTS1/ADR17
73
PA5/TXD0/CS2 76
PA4/RXD0/CS1 77
PC4/MOSI/DMA2ACK 85
PD5/TXD1/ADR19 86
PD4/RXD1/ADR18 87
PD3/DE1/ADR16 88
PC5/MISO/CS5 89
PF7/ADR7 90
PA3/CTS0/FAULT0 93
PA2/DE0/FAULTY 94
GND 92
VDD 91
GND 78
VDD 79
GND
69
VDD
63
PK3/CS1
26 PK2/CS0 27 PK1/BLEN 28 PK0/BHEN 29 VDD 30
PK4/CS2
46 PK5/CS3 47 PK6/CS4 48 PK7/CS5 49 VDD 50
PJ7/DATA15 80 PJ6/DATA14 81 PJ5/DATA13 82 PJ4/DATA12 83
GND 84
PJ3/DATA11 97
VDD 96
PJ2/DATA10 98
PJ1/DATA9 99 PJ0/DATA8 100
R11
1K
R11
1K
R4
10K
R4
10K
P3
HDR/PIN 2x3
P3
HDR/PIN 2x3
1 2
3 4
5 6
C18
0.01uF
C18
0.01uF
C19
0.01uF
C19
0.01uF
J1
HDR/PIN 1x2
J1
HDR/PIN 1x2
1
2
R35
10K
R35
10K
C8
0.01uF
C8
0.01uF
+
C11 10uF
+
C11 10uF
C23
1000pF
C23
1000pF
C16
0.01uF
C16
0.01uF
U4A
SN74LVC04
U4A
SN74LVC04
1 2
147
C17
0.01uF
C17
0.01uF
C15
0.01uF
C15
0.01uF
R9
10K
R9
10K
R8
0 OHm
R8
0 OHm
C14
0.01uF
C14
0.01uF
C5
22pF
C5
22pF
U5
SN74CBTLV3861
U5
SN74CBTLV3861
A1
2
A2
3
A3
4
A4
5
A5
6
A6
7
A7
8
A8
9
A9
10
A10
11
B1
22
B2
21
B3
20
B4
19
B5
18
B6
17
B7
16
B8
15
B9
14
B10
13
NC
1
VCC
24
GND
12
OE
23
C12
0.01uF
C12
0.01uF
C1 100pF C1 100pF
C13
0.01uF
C13
0.01uF
U1
SN74CBTLV3861
U1
SN74CBTLV3861
A1
2
A2
3
A3
4
A4
5
A5
6
A6
7
A7
8
A8
9
A9
10
A10
11
B1
22
B2
21
B3
20
B4
19
B5
18
B6
17
B7
16
B8
15
B9
14
B10
13
NC
1
VCC
24
GND
12
OE
23
R1
10K
R1
10K
R7
0 OHm
R7
0 OHm
Y1
20 MHz
Y1
20 MHz
1 3
2
R3 12.4K R3 12.4K
R2 7.8K R2 7.8K
C7
0.01uF
C7
0.01uF
C10
0.01uF
C10
0.01uF
R10
5K
R10
5K
1 3
2