Zte ZM8300G Instructions for use

ZTE ZM8300G Module Hardware User Manual
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ZTE ZM8300G Module
Hardware User Manual
ProductModel:ZM8300GIoTModule
DocumentVersion:1.3
PublishingDate:2017-06-20

ZTE ZM8300G Module Hardware User Manual
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LEGAL INFORMATION
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ZTE ZM8300G Module Hardware User Manual
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Revision History
Product Version
Document
Version
Reason for Revision
Revision Date
ZM8300G IoT Module
Hardware User
Manual
V1.0
First edition
2017.03.01
ZM8300G IoT Module
Hardware User Manual
V1.1
1. Updated the operating voltage,
temperature range, and partial
test data of the ZM8300G
module.
2. Updated the Power on/off time
of the ZM8300G module.
3. Updated the hardware reset
procedure of the ZM8300G
module.
4. Change the pin PIN34/35 to
multiplex reserved function.
5. Updated the PSM function and
added the active pown_on
function.
6. Added information to the RF
and antenna design sections.
7. Fixed font and formatting
bugs.
2017.04.13
ZM8300G IoT Module
Hardware User Manual
V1.2
1. Added remarks for pown_on
scheme 3 to section 3.4.2.
2. Added precautions to section
3.4.4.
3. Added default configurations
of serial ports to section 3.6.2.
4. Added the following
information to Table 3-8: If the hot
plugging function is unavailable,
leave the UIM_DET pin not
connected.
2017.05.04

ZTE ZM8300G Module Hardware User Manual
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Product Version
Document
Version
Reason for Revision
Revision Date
5. Added precautions for MPP
indicator lighting to section
3.11.1.
6. Added information about
peripheral components in the
circuit recommended for an
antenna to section 3.13.2.
ZM8300G IoT module
hardware manual
V1.3
1.added section 2.6
2.Update section 3.4.2 for
module power of requirement
3.Update section 3.4.2 for
module hard reset requirement
4.Update section 3.4.4/5/6/ for
module waking up,state
indication,PSM_MON
5.Update section 3.6 for
description of UART
6.Update table 4-2,4-3,4-4 for
parameter
2017.06.20

ZTE ZM8300G Module Hardware User Manual
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Contents
1OVERVIEW ............................................................................................................................... 7
1.1 SCOPE ...................................................................................................................................... 7
1.2 ACRONYMS ............................................................................................................................... 7
1.3 PRODUCT DESCRIPTION ............................................................................................................... 7
2GENERAL INTRODUCTION ........................................................................................................ 9
2.1 ABOUT THIS CHAPTER ................................................................................................................. 9
2.2 FEATURE INTRODUCTION.............................................................................................................. 9
2.3 APPLICATION DIAGRAM ............................................................................................................. 11
2.4 CIRCUIT DIAGRAM .................................................................................................................... 11
2.5 OUTLINE DIMENSIONS DIAGRAM................................................................................................. 12
2.6 TRANSFERRED BOARD AND DEBUG BOARD............................................................................................. 13
3APPLICATION INTERFACES ...................................................................................................... 14
3.1 ABOUT THIS CHAPTER ............................................................................................................... 14
3.2 DEFINITIONS OF LGA PINS ......................................................................................................... 14
3.2.1 Pin Definitions ............................................................................................................. 14
3.2.2 Pin Distribution............................................................................................................ 18
3.3 POWER INTERFACES .................................................................................................................. 19
3.3.1 Overview of Power Pins............................................................................................... 19
3.3.2 VSYS Primary Power .................................................................................................... 19
3.3.3 VIO Power.................................................................................................................... 20
3.4 CONTROL SIGNAL INTERFACES ..................................................................................................... 20
3.4.1 Overview of Control Signals ........................................................................................ 20
3.4.2 POWN_ON Signal........................................................................................................ 20
3.4.3 RESET_N Signal ........................................................................................................... 22
3.4.4 WAKEUP_IN Signal...................................................................................................... 23
3.4.5 WAKEUP_OUT Signal .................................................................................................. 24
3.4.6 PSM_MON Signal ........................................................................................................ 24
3.4.7 STATE Signal ................................................................................................................ 25
3.5 DEBUG_UART INTERFACE........................................................................................................ 25
3.6 BLSP INTERFACES..................................................................................................................... 26
3.6.1 Pin Description ............................................................................................................ 26
3.6.2 UART Interfaces ........................................................................................................... 26
3.6.3 SPI Bus Interface.......................................................................................................... 27

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3.6.4 I2C Bus ......................................................................................................................... 29
3.7 GPIO INTERFACES .................................................................................................................... 30
3.8 USIM INTERFACE ..................................................................................................................... 31
3.8.1 Pin Description ............................................................................................................ 31
3.8.2 Electrical Characteristics and Design Points................................................................ 31
3.8.3 Circuit Recommended for the USIM Card Interface..................................................... 32
3.9 USB INTERFACE ....................................................................................................................... 32
3.9.1 Pin Description ............................................................................................................ 32
3.9.2 Design Points and Recommended Circuit .................................................................... 33
3.10 AUDIO INTERFACES ................................................................................................................... 34
3.10.1 Pin Description ............................................................................................................ 34
3.10.2 Design Points............................................................................................................... 34
3.11 ADC/MPP INTERFACES............................................................................................................. 35
3.11.1 Pin Description ............................................................................................................ 35
3.11.2 Design Points............................................................................................................... 35
3.12 JTAG INTERFACE ...................................................................................................................... 36
3.12.1 Pin Description ............................................................................................................ 36
3.12.2 Design Points............................................................................................................... 37
3.13 ANTENNA INTERFACES ............................................................................................................... 37
3.13.1 Pin Description ............................................................................................................ 37
3.13.2 Antenna Design Points ................................................................................................ 38
4RF CHARACTERISTICS ............................................................................................................. 39
4.1 ABOUT THIS CHAPTER ............................................................................................................... 39
4.1.1 Power Supply............................................................................................................... 39
4.1.2 Operating Current ....................................................................................................... 39
4.2 REFERENCE DESIGN FOR RF LAYOUT............................................................................................. 39
4.3 TEST STANDARD FOR CONDUCTED RF........................................................................................... 40
4.4 REQUIREMENTS FOR ANTENNA DESIGN......................................................................................... 40
4.4.1 Key Points for Antenna Design .................................................................................... 40
4.4.2 Antenna Efficiency....................................................................................................... 41
4.4.3 VSWR........................................................................................................................... 42
4.4.4 S11............................................................................................................................... 42
4.4.5 Polarization ................................................................................................................. 42
4.4.6 Radiation Pattern ........................................................................................................ 42
4.4.7 Requirements for IoT Antenna Design......................................................................... 43
4.4.8 Precautions for Early Antenna Design ......................................................................... 43

ZTE ZM8300G Module Hardware User Manual
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5MECHANICAL CHARACTERISTICS ............................................................................................ 44
5.1 ABOUT THIS CHAPTER ............................................................................................................... 44
5.2 ASSEMBLY PROCEDURE.............................................................................................................. 44
5.2.1 Overview ..................................................................................................................... 44
5.2.2 Steel Mesh................................................................................................................... 44
5.2.3 Reflow Curve ............................................................................................................... 46
5.3 REPAIR PROCEDURE .................................................................................................................. 47
5.3.1 Repair Procedure......................................................................................................... 47
5.3.2 Module Dismantling.................................................................................................... 47
5.3.3 treatment in weld area ............................................................................................... 47
5.3.4 Module Installation ..................................................................................................... 47
5.3.5 Visual Inspection ......................................................................................................... 47
5.3.6 Feature Validation....................................................................................................... 47
5.4 EMC AND ESD PROTECTION ...................................................................................................... 48

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7
1Overview
1.1Scope
This document is intended for customers who use and develop wireless IoT terminal products.
This document provides information and precautions for developing the hardware of IoT
terminal products using ZTE ZM8300G IoT wireless module. This document applies only to
hardware development that uses the ZM8300G IoT wireless module.
1.2Acronyms
Table 1-1 Acronyms Used in This Document
Acronym
Full Name
ESD
Electro-Static discharge
USB
Universal Serial Bus
UART
Universal Asynchronous Receiver Transmitter
USIM
Universal Subscriber Identity Module
I/O
Input/Output
BLSP
BAM (bus access module) low-speed peripheral
SPI
Serial Peripheral Interface
I2C
Inter-Integrated Circuit
PCM
Pulse-coded Modulation
LED
Light Emitting Diode
GPIO
General-purpose input/output
EMC
Electromagnetic Compatibility
NB-IoT
Narrow Band Internet of Things
AP
Application processor
1.3Product Description
The ZM8300G module is an IoT module that uses the LGApackaging. The ZM8300G module
supports the CAT NB/eMTC, multiple band combinations such as Band 5/8 and Band 3/39,

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8
and Support for GNSS (GPS, Beidou, GLONASS, and Galileo), and provides a wide variety
of interfaces, such as the USB, UART, SPI, I2C, PCM, and ADC. The ZM8300G module can
be used for the development of various kinds of IoT products. This document describes the
functions, application interfaces, RF characteristics, electrical characteristics, reliability, and
mechanical characteristics of the ZM8300G module and provides precautions for design, with
the goal of providing design guidelines and references for the hardware application and
development of the ZM8300G module.
The ZM8300G module is small and its dimensions are as follows: 23.0 mm x 28.0 mm x 2.4
mm (excluding the label thickness, which is 0.1 mm). The ZM8300G module meets
requirements of M2M applications and can be widely used in IoT-related devices such as data
metering devices, data collection devices, security solution devices, wireless POS devices,
and mobile computing devices.
Being an LGAmodule, the ZM8300G IoT module provides 67 pads (consisting of 58 LGA
signal pads, seven JTAG test pads, and two PG pads) and can be applied to customers'
design.

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9
2General Introduction
2.1About This Chapter
This chapter describes the ZM8300G module in general, covering the following aspects:
Feature introduction
Application diagram
Circuit diagram
Outline dimensions diagram
2.2Feature Introduction
Table 2-1 provides major technical parameters and features of the ZM8300G module.
Table 2-1 Major Technical Parameters and Features of the ZM8300G Module
Title
Description
Physical features
Dimensions: 23.0 mm x 28.0 mm x 2.4 mm
Weight: 3.3 g
Airlink
technologies
Supports the NB-IoT: Band 5/8,3/39.
Supports the GNSSes: GPS, Beidou, GLONASS, and Galileo.
Operating
temperature
-40 to 85℃
Storage
temperature
-40 to 85℃
Operating voltage
DC 3.0 V to 4.2 V (with the typical value being 3.6 V)
AT command set
Refer to the ZTE ZM8300G IoT Module AT Command Set.
Power
consumption (3.6
V)
leakage current: 4.8 uA
PSM (power saving mode) sleep current: 7 uA
Average sleep current: 0.7 mA
Idle current：1.47mA , 2.56s DRX Online ◆注 1 idle current: note 1
Average operating current:
NB-IoT: 50 mA (UL)/50 mA (DL) ◆Note 2

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Title
Description
eMTC: 115 mA (UL)/112 mA (DL) ◆Note 3
Application
interfaces (LGA
interfaces)
USB 2.0 interface
USIM card interface (2.85 V and 1.8 V), supporting hot plugging
UART/JTAG debug interface
UART/SPI/I2C/GPIO (multiple combinations; for details, see Table 3-6
PCM/I2Sinterface
ADC/MPP interface
Startup/Shutdown interface
Module hardware reset interface
Status indication interface
AP waking up interface for module
Module waking up interface forAP
Antenna interface
Antenna pads (1xeMTC/NB-IoT antenna pad; 1xGPS antenna pad)
◆Note 1: The lab data(sleep and Idle current) provided by Qualcomm ‘s test data from lab.
◆Note 2: The lab data provided by Qualcomm ‘s test data from lab. The operating condition is as
follows: LTE 10 MHz bandwidth embedded data call@0dBm TX, UL/DL only. Used data packets are
as follows: UL 62.5 kbps (15 kHz single tone)/DL 21 kbps (multi tone).
◆Note 3: The lab data provided by Qualcomm ‘s test data from lab. The operating condition is as
follows: LTE 10 MHz bandwidth embedded data call@0dBm TX, UL/DL only. 375 kbps data packets
are used in both the uplink and downlink directions.

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11
2.3Application Diagram
ZM8300 IoT
Application
interface
POWER
ANT
WAKEUP-IN/OUT
POWN_ON
RESET_N
WAKEUP-IN/OUT
STATE
PCM
USIM
CODEC
USB
MAIN ANT
GPS ANT
UART/SPI/I2C/
GPIO
IC
LED
ADC/MPPADC/LED 3.0V~4.2V
Typical
3.6V
USIM SLOT
Or
eSIM
Figure 2-1 Application Diagram of the ZM8300G Module
2.4Circuit Diagram
Figure 2-2 is the circuit diagram of the ZM8300G module. The ZM8300G module consists
of the following main function units:
Baseband controller/power management unit
Memory (1 Gbit NAND + 512 bit LPDDR2)
LGA interface unit
RF transceiver IC
RF front-end circuit

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CPU
PMU
LGA
Interface
MCP
FLASH
RF
transceiver
RF TRx
GPS Rx
RF_
RX/TX
GPS_RX
RF Front-end
RX/TX
CONTROL
VSYS
VIO
Power
supply
GPS_ANT
MAIN_ANT
USIM
UATR/SPI
/I2C
WAKEUP_IN
WAKEUP_OUT
WAKEUP_IN
STATUS
USB
PSM_MON
RESET_N
JTAG/UART
ZM8300 IoT
ADC/MPP ADC/MPP
POWN_ON
JTAG/Debug_UART
USIM/eSIM
USB
UATR/SPI
/I2C
STATUS
PSM_MON
WAKEUP_OUT
VIO
RESET_N
POWN_ON
Figure 2-1 Circuit Diagram of the ZM8300G Module
2.5Outline Dimensions Diagram
Figure 2-3 Dimensions of the ZM8300G Module (in mm)

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Figure 2-4 Dimensions of the BOT Side of the ZM8300G Module (in mm) ◆Note 4
◆Note 4: Figure 2-4 is the outline pad diagram of the ZM8300G module. If pad design of a
system board is required, ZTE can provide a dedicated outline drawing file.
2.6 transferred board and debug board
ZTE provide transferred board,debug board and peripheral such as antenna,power
supplier,Serial Interface cable in order to better apply the ZM8300G to design the product for
you,detailed referred to <<ZTE debug board use manual for module product>>

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3Application Interfaces
3.1About This Chapter
This chapter describes the following major interfaces provided by the ZM8300G module:
Power interfaces
Control signal interfaces
DEBUG_UART interface
BLSP interfaces
GPIO interfaces
USIM interface
USB interface
Audio interfaces
ADC/MPP interfaces
JTAG interface
Antenna interfaces
3.2Definitions of LGA Pins
The ZM8300G IoT module uses the LGA package and has 67 pads, namely, 58 signal pads,
seven JTAG test pads, and two PG pads. Using the pads, the ZM8300G module is connected
to a customer's IoT application platform. The following sections describe interfaces provided
by the ZM8300G module.
3.2.1 Pin Definitions
Table 3-1 provides definitions for input/output parameters of pins of the ZM8300G module.
Table 3-1 Definitions for Input/Output Parameters of Pins of the ZM8300G Module ◆Note 1
Type
Description
DO
Digital output
DI
Digital input
B
Bidirectional digital
PI
Power input
PO
Power output
I
In

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15
O
Out
AI
Analog input
AO
Analog output
◆Note 1: The pin directions in Table 3-1 are based on the body of the ZM8300G module.
Table 3-2 provides definitions for pins of the ZM8300G LGA module.
Table 3-2-1 Definitions for Interfaces Provided by the ZM8300G Module
Pin
Signal
Type
Description
Param
eter
Minim
um
Value
(V)
Typica
l Value
(V)
Maxim
um
Value
(V)
Remarks
1
GND
GND
Grounding
-
-
-
-
2
MAIN_ANT
-
Main antenna interface
-
-
-
-
50 Ω
3
GND
GND
Grounding
-
-
-
-
4
GND
GND
Grounding
-
-
-
-
5
STATE
DO
Module status indication
signal
VOH
1
1.8
1.9
1.8 V Power domain
VOL
0
-
0.45
6
WAKEUP_IN
DI
AP waking up module
signal
VIH
1
-
2.1
VIL
0
-
0.63
7
WAKEUP_OUT
DO
module waking up AP
signal
VOH
1
1.8
1.9
VOL
0
-
0.45
8
PSM_MON
DO
Module deep sleeping
indication signa
VOH
1
1.8
1.9
VOL
0
-
0.45
9
GND
GND
Grounding
-
-
-
-
10
GND
GND
Grounding
-
-
-
-
11
GPS_ANT
-
GPS antenna interface
-
-
-
-
50 ohms
12
GND
GND
Grounding
-
-
-
-
13
GND
GND
Grounding
-
-
-
-
14
GND
GND
Grounding
-
-
-
-
15
DEBUG_UART_RX
DI
Debug serial port RX
signal
VIH
-
-
-
Led out by means of
external design
16
DEBUG_UART_TX
DO
Debug serial port TX
signal
VOH
-
-
-
17
BLSPA_0
B
Two groups of four-wire
BLSP signals being
configured as UART,
SPI, I2C, and GPIO
interfaces
VIH
1
-
2.1
1.8 V power domain
18
BLSPA_1
19
BLSPA_2
VIL
0
-
0.63
20
BLSPA_3
21
BLSPB_0
VOH
1
1.8
1.9
22
BLSPB_1

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Pin
Signal
Type
Description
Param
eter
Minim
um
Value
(V)
Typica
l Value
(V)
Maxim
um
Value
(V)
Remarks
23
BLSPB_2
VOL
0
-
0.45
24
BLSPB_3
25
GND
GND
Grounding
-
-
-
-
26
PCM_DIN
DI
PCM voice data input
signal
-
-
-
-
1.8 V power domain
27
PCM_DOUT
DO
PCM voice data output
signal
-
-
-
-
28
PCM_CLK
DO
PCM voice clock signal
-
-
-
-
29
PCM_SYNC
DO
PCM voice
synchronization signal
-
-
-
-
30
GND
GND
Grounding
-
-
-
-
31
RESET_N
DI
Module hardware reset
signal
-
-
-
-
32
POWN_ON
DI
Module startup/shutdown
signal
-
-
-
-
33
GND
GND
Grounding
-
-
-
-
34
RESERVED
-
Pin reserved for
multiplexing
-
-
-
-
For example, to
multiplex the GPIO
function
35
RESERVED
-
Pin reserved for
multiplexing
-
-
-
-
36
GND
GND
Grounding
-
-
-
-
37
VIO
PO
1.8 V output power of the
module
-
-
1.8
-
20 mA
38
GND
GND
Grounding
-
-
-
-
39
USB_ID
DI
USB 2.0 ID signal
-
-
-
-
40
USB_VBUS
AI
USB2.0 PHY detection
signal
-
-
-
-
41
GND
GND
Grounding
-
-
-
-
42
ADC1/MPP1
AI
ADC/current sinks
-
0
1.8
43
GND
GND
Grounding
-
-
-
-
44
ADC0/MPP0
AI
ADC/current sinks
-
0
1.8
45
GND
GND
Grounding
-
-
-
-
46
USIM_PWR
PO
USIM signal power
-
-
1.8/2.85
-
Supporting 1.8
V/2.85 V
SIM card
47
GND
GND
Grounding
-
-
-
-
48
VSYS
PI
Power supply for module
-
3
3.6
4.2
49
VSYS
PI
Power supply for module
-
3
3.6
4.2

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Pin
Signal
Type
Description
Param
eter
Minim
um
Value
(V)
Typica
l Value
(V)
Maxim
um
Value
(V)
Remarks
50
GND
GND
Grounding
-
-
-
-
51
GND
GND
Grounding
-
-
-
-
52
USB_DP
AI/O
USB2.0 differential signal
DP
-
-
-
-
90Ω
53
USB_DM
AI/O
USB2.0 differential signal
DM
-
-
-
-
90Ω
54
GND
GND
Grounding
-
-
-
-
55
USIM_DET
DI
Detection of the SIM card
hot plugging function
-
-
-
-
Select the card slot
that supports the hot
plugging function.
56
USIM_RESET
DO
SIM card reset signal
-
-
-
-
Supporting 1.8
V/2.85 V
SIM card
57
USIM_DATA
B
SIM card data signal
-
-
-
-
58
USIM_CLK
DO
SIM card clock signal
-
-
-
-
T1
JTAG_PS_HOLD
-
Power setup holding
signal
-
-
-
-
Led out using a test
point or connector
T2
JTAG_TDI
-
TDI signal of the JTAG
interface
-
-
-
-
T3
JTAG_TMS
-
TMS signal of the JTAG
interface
-
-
-
-
T4
JTAG_TDO
-
TDO signal of the JTAG
interface
-
-
-
-
T5
JTAG_TCK
-
TCK signal of the JTAG
interface
-
-
-
-
T6
JTAG_RESOUT_N
-
JTAG debug rest output
-
-
-
-
T7
JTAG_TRST_N
-
TRST signal of the JTAG
interface
-
-
-
-
G1
PG1
-
POWER PAD
-
-
-
-
Geothermal pads
G2
PG2
-
POWER PAD
-
-
-
-
Table 3-2-2 Electrical characteristics of the IO interfaces
Parameter
Description
Minimum
Value
Typical
Value
Maximum
Value
Unit
VIH
High-level input voltage
0.65*Vio
-
Vio+0.3
V
VIL
Low-level input voltage
0
-
0.35*Vio
V
VSHYS
Schmitt hysteresis voltage
15
-
-
mV
IL
Input leakage current
Vio=max, Vin=0V to Vio
0
-
0.2
uA
VOH
High-level output voltage
Iout=Ioh
Vio-0.45
-
Vio
V
VOL
Low-level output voltage
Iout=Iol
0
-
1.45
V

ZTE ZM8300G Module Hardware User Manual
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18
Parameter
Description
Minimum
Value
Typical
Value
Maximum
Value
Unit
IOH
High-level output current
Vout=Voh
3
-
mA
IOL
Low-level output current
Vout=Vol
-
-
-
mA
IOH_XO
High-level output current
XO digital clock outputs only
6
-
-
mA
IOL_XO
Low-level output current
XO digital clock outputs only
-
-
-
mA
CIN
Input capacitance
-
-
5
pf
3.2.2 Pin Distribution
Figure 3-1 illustrates the distribution of LGA pins of the ZM8300G module (top view).
Figure 3-1 Distribution of LGA Pins of the ZM8300G Module (Top View)

ZTE ZM8300G Module Hardware User Manual
<All rights reserved. No distribution without prior permission of ZTE.>
19
3.3Power Interfaces
3.3.1 Overview of Power Pins
The LGAinterface unit of the ZM8300G module provides the following power pins:
VSYS: Power supply for module
VIO: power output pin of the module
3.3.2 VSYS Primary Power
The ZM8300G module uses the VSYS pins (PIN 48 and PIN 49 is the interface for
LGA), which are Power supply for module, to receive power provided by an external power
supply. The input voltage should be within the range of 3.0 V to 4.2 V (with the typical value
being 3.6 V), and the input current should not be less than 1 A.
Considering all external applications of the ZM8300G module, focus on the specifications
of the external power supply.As the network environments differ from each other dramatically,
when the ZM8300G module sends signals at the maximum transmit power, the peak
operating current for module is more than 600mA,which continued for 10ms. In this case,
ensure that the voltage drop of the external power supply is not lower than the operating
voltage of the ZM8300G module (3.0 V). Otherwise, abnormal case such as a ZM8300G
module reset may occur.
For external power supplies, ensure that they provide adequate and steady input
capabilities. Buck or Boost/LDOs/Battery with the output capability not less than 1A are
required. In addition, ensure that the power circuit on the external system board is as short as
possible and is wide enough and that a good backflow is ormed on the ground plane. Connect
energy storage capacitors of at least one hundred uFin parallel at power interfaces of the
module, with the goal of reducing instantaneous power fluctuations. Moreover, it is
recommended that customers add a ferrite-bead(or a same-package zero-ohm resistor) to
the VSYS power circuit in order to reduce EMI. Ensure that the rated current of the selected
ferrite-bead meets the requirement. In addition, carry out ESD measures for the power
interfaces. Figure 3-2 illustrates the recommended power supply circuit.
VDD_3V6 VSYS
150uF
47uF
22uF
1uF
0.1uF
33pF
TVS
Bead