Arcom TARGET386EX User manual

Contents
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Preface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
The Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Name Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Problem? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Contents - Packing List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Utility Disks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Anti-Static Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electromagnetic Compatibility (EMC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Section 1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Section 2. Getting Started . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Equipment required . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Installation & Monitor Startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Section 3. Links and Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Default Link Positions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
User Configuration Record . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Section 4. Using the TARGET386EX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Programmable Memory and I/O Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Memory Map After Power-up/Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
I/O Map After Power-up/Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
On-Board Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
User Links and LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Interrupt Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2192-08270-000-000
J539 TARGET386EX
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TARGET386EX
User Manual
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Interrupt Control Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
STEbus Support [NOT SBC VARIANTS] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
PC/104 Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Battery Back-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Utility Disks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
The Next Step . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Section 5. Troubleshooting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Appendix A. Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Appendix B. Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Appendix C. Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
The STEbus and the TARGET386EX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
The PC/104 and the TARGET386EX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
STEbus and PC/104 interaction on the TARGET386EX . . . . . . . . . . . . . . . . . . . . 36
Appendix D. Bibliography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Appendix E. Product Issue Changes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Appendix F. Circuit Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
J539 TARGET386EX
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Revision History
2192-08270-000-000Revision History
J539 TARGET386EX
Page 3
PCB
V 1 Iss 2
V1 Iss 2
A
B
961107 First release.
961213 Minor edits throughout the manual.
Manual
Issue Comments
© Copyright Arcom Control Systems Ltd. 1996
The choice of boards and systems is the responsibility of the buyer, and the use to which they are put cannot
be the liability of Arcom Control Systems Ltd. However, Arcom’s sales team is always available to assist you
in making your decision.
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J539 TARGET386EX
2192-08270-000-000 Revision History
Page 4
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Preface
The Manual
This manual details the operation and features of Arcoms
TARGET386EX boards. It has been designed as both a guide to
getting started with the TARGET386EX Development Kit and a
reference for the hardware features of the board.
Name Conventions
Throughout this document an asterisk * suffix to a signal name
denotes that a signal is active low (e.g. DATACK*).
All numbers are in decimal unless otherwise indicated. Where a
number is suffixed by h the value is in hexadecimal format.
Problem?
If you have any problems finding information about this board, or
the board fails to work, or something is missing, please contact
Arcom Customer Support at our offices in Cambridge, UK.
If the engineers are busy please leave a message, or alternatively,
send a facsimile message. Please state:
Your name, telephone and facsimile numbers
The time and date
The product name
The problem
Arcom Customer Support: Tel: 01223 412428
Fax: 01223 410457
For US callers: Tel: (816) 941 7025
For US callers: Fax: (816) 941 0343
Internet: [email protected]
Arcom Main Switchboard: Tel: 01223 411200
Fax: 01224 403400
Contents - Packing List
In your TARGET386EX Development Kit package you should have:
A TARGET386EX in a sealed anti-static bag.
A document titled TARGET386EX User Manual (this document)
An SVIF1 Development Interface Module
A CAB-SVIF1 Development Interface Cable
A high density 3 1/2 floppy disk titled TARGET386EX Monitor
Utility Disk
A document titled TARGET386EX Monitor Manual
2192-08270-000-000Preface
J539 TARGET386EX
Page 5
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A high density 3 1/2 floppy disk titled TARGET386EX Board
Software Library
A document titled TARGET386EX Board Software Library
Shortform
A high density 3 1/2 floppy disk titled TARGET386EX
SourceVIEW
A document titled TARGET386EX SourceVIEW
Intel ApBUILDER software pack
Utility Disks
Three utility disks are provided with the TARGET386EX. One
contains source and assembled code for the monitor software pre-
installed on the board together with a utility to convert assembled
code into Intel Hex format to allow code download to the board via
the monitor. The second disk contains C library routines for setting
up and controlling the board, for use in applications code together
with a disk based TARGET386EX Board Software Library Manual.
The third disk contains Arcoms SourceVIEW development and
debugging environment for use with the TARGET386EX.
Anti-Static Handling
This board contains CMOS devices which could be damaged in the
event of static electricity being discharged through them. At all
times, please observe anti-static precautions when handling the
board and always unpack and install it in an anti-static working
area.
Electromagnetic Compatibility (EMC)
The TARGET386EX is classified as a component with regard to the
European Community EMC regulations and it is the users
responsibility to ensure that systems using the board are compliant
with the appropriate EMC standards.
The STEbus variants of the TARGET386EX, when used in an Arcom
CRATE3CE enclosure, are CE approved under Arcoms STEbus
Technical Construction File.
Packaging
Please ensure that should a board need to be returned to Arcom, it
is adequately packed. Use an anti-static bag for the board and use a
box not bag to physically protect the board. Retain the original
packing if possible.
J539 TARGET386EX
2192-08270-000-000 Preface
Page 6
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Section 1. Introduction
TARGET386EX is a Eurocard sized target CPU board developed
specifically for embedded applications offering the following
features:
Intel 386EX microprocessor running at 33MHz
STEbus 8-bit expansion interface
PC/104 16-bit expansion interface
256KB SRAM as standard, 512KB option available (16-bit wide
access)
512KB Flash ROM on-board as standard (16-bit wide) with
resident monitor software
16/32KB Dual Port RAM (DPR) between 386EX and STEbus (slave
mode only)
Programmable memory and I/O maps
Two 120KBaud (max.) RS232 serial communications ports
(National Semiconductor 16450 UART compatible)
Programmable watchdog timer
Flexible hardware interrupt support including STEbus interrupt
out facility
Software development/download port (SVIF1 port)
Two user links
Two user LEDs and +5V power LED
JTAG port supporting Flash ROM programming
The TARGET386EX is available as four variants:
This manual covers all four variants and indicates where a feature
does not apply to the Single Board Computer (SBC) variants.
The TARGET386EX is shipped with a software monitor blown into
the on-board Flash ROM to allow simple exercising of the board and
downloading of application code. The remote target portion of
Arcoms SourceVIEW development software is also blown into the
Flash ROM. By using the board with the TARGET386EX
Development Kit the user can develop and debug application
software very quickly.
2192-08270-000-000Section 1. Introduction
J539 TARGET386EX
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Variant Name
TARGET386EX
TARGET386EX-H
TARGET386EX-SBC
TARGET386EX-SBC-H
STEbus Master/Slave and PC/104 Master
256k SRAM
STEbus Master/Slave and PC/104 Master
512k SRAM
STEbus Master Single Board Computer
256k SRAM
STEbus Master Single Board Computer
512k SRAM
Specification
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J539 TARGET386EX
2192-08270-000-000 Section 1. Introduction
Page 8
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Section 2. Getting Started
This section is designed to familiarise the user with the features of
the TARGET386EX and demonstrate the use of the monitor
software.
Equipment required
For STEbus board variants (PL1 fitted)
TARGET386EX SBC Development Kit
STEbus rack and backplane with power supply
IBM PC/AT compatible computer running terminal emulation
software
For SBC board variants (PL1 not fitted)
TARGET386EX SBC Development Kit
Power supply (+5V at 1A minimum) connected up to PL2 (see
Appendix B. Connections)
IBM PC/AT compatible computer running terminal emulation
software
Installation & Monitor Startup
Refer to Target386EX Quickstart Manual for more comprehensive
instructions with drawings.
1. Ensure that the links on the TARGET386EX board are in their
default configurations (see Section 3. Links and Options).
2. From the TARGET386EX Development Kit take the CAB-SVIF1
cable and plug the 10 pin ribbon cable connector into the SVIF1 PL2
header.
3. Plug PL1 of the SVIF1 into PL3 (software development/download
port) on the TARGET386EX. The body of the SVIF1 should lie over
the TARGET386EX.
4. Ensure that Link 19 is fitted so monitor EPROM is activated
5. For STEbus variants slide the TARGET386EX into the STEbus rack
until it mates with one of the backplane connectors.
OR
For SBC variants wire the +5V power supply cable to pin 2 of the
PL2 screw terminal block and the 0V cable to either pin 5 or pin 6 of
the terminal block.
6. Plug the 9 pin D-type connector marked channel B on the CAB-
SVIF1 cable into one of the COM ports on the PC/AT computer.
7. Configure the terminal emulation software on the PC/AT for
communications via the same COM port as used in No. 6 above at 19200
Baud with 8 data bits, no parity and 1 stop bit. Set the protocol to 'none'.
2192-08270-000-000Section 2. Getting Started
J539 TARGET386EX
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8. Turn on the STEbus rack or SBC power supply - the surface mount
power indicator LED on the TARGET386EX will illuminate.
9. The terminal emulator will display the following (software version
may vary):
--==<< TARGMON TARGET MINI-MONITOR >>==--
Version 1.03
Copyright (C) Arcom Control Systems 1996
0100>
The monitor software is now running and can be used to exercise
many areas of the board. The monitor also supports code download
from a terminal emulator and Flash ROM programming. Press the
H key to display a command list. A full manual for operating the
monitor is shipped with the TARGET386EX. Section 4. Using the
TARGET386EX describes the operation of the board in more detail
and describes the tools available to develop applications code to run
on the board.
J539 TARGET386EX
2192-08270-000-000 Section 2. Getting Started
Page 10
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Section 3. Links and Options
IMPORTANT NOTE:
STEbus variants of the TARGET386EX board are shipped in, and
power-up in, STEbus slave mode. This means that it cannot yet
access other STEbus peripheral boards. To access STEbus peripheral
boards via the monitor, links LK2 and LK3 should be fitted to drive
STEbus SYSRST* and SYSCLK* signals and General Control Register
1 (default I/O location FC06h) should be written with 07h. This sets
the board up as a default STEbus master with any memory or I/O
accesses not allocated to on-board memory or peripherals being
routed to the STEbus. See following sections and appendices for
more details of board set-up.
Default Link Positions
Note: A + next to a link position indicates the default shipping position.
LK1. STEbus timeout to TFRERR* [STEbus VARIANTS ONLY]
If an STEbus transfer initiated by the TARGET386EX is not
completed within a set time (see LK8) then a bus timeout will occur
to terminate the cycle. This may be used to generate an interrupt
(see LK15) and LK1 allows a timeout to assert the STEbus TFRERR*
signal to notify other boards in the system that there has been a
transfer problem. DO NOT FIT THIS LINK if there is an Arcom
SCIMX or SCIM386SXplus board in the system as these boards have
TFRERR* linked directly to their processor NMI line.
2192-08270-000-000Section 3. Links and Options
J539 TARGET386EX
Page 11
A B
LK18
LK16
LK12
LK13
LK11
LK7
LK19
LK17
LK15
LK14
LK10
A
B
C
D
E
F
LK5
LK6
LK4
A
B
C
D
LK1
A
LK2
B
LK3
LK8
A
B
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2192-08270-000-000
LK2. STEbus SYSRST* [NOT SBC VARIANTS]
Note: Only one board in an STEbus system should drive SYSRST*
LK3. STEbus SYSCLK [NOT SBC VARIANTS]
Note: Only one board in an STEbus system should drive SYSCLK to the
STEbus backplane. This does not have to be the STEbus default master
board.
LK4 and LK5. STEbus Dual Port RAM (DPR) size links [NOT SBC
VARIANTS]
Note: DPR can only be accessed from the STEbus when the
TARGET386EX is in STEbus slave mode (see General Control Register 1).
These links define the size of the DPR for both on-board accesses and
STEbus accesses. In STEbus default or potential master mode, when the
DPR is not accessible from the STEbus, these links must still be set to define
the size of the DPR device for on-board accesses. See LK7 for DPR STEbus
base address selection
LK6. STEbus interrupt-out [NOT SBC VARIANTS]
See General Control Register 0 and Interrupt Assignments for
details.
J539 TARGET386EX
Section 3. Links and Options
Page 12
LK4 LK5 Function
Not valid configuration
32KB DPR
16KB DPR
Not valid configuration
Omit Omit
+Omit
Fit
Fit Fit
Omit
+Fit
LK6 Function
Interrupt-out asserts STEbus ATNRQ0*
Interrupt-out asserts STEbus ATNRQ1*
Interrupt-out asserts STEbus ATNRQ2*
Interrupt-out asserts STEbus ATNRQ3*
A
B
C
D
LK1 Function
Bus timeout does not assert TFRERR*
Bus timeout asserts TFRERR*
+Omit
Fit
LK2 Function
Board receives SYSRST* from backplane
Board drives SYSRST* to backplane
+A
B
LK3 Function
Board does not drive SYSCLK to STEbus backplane
Board drives SYSCLK to STEbus backplane
+Omit
Fit
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LK7. STEbus DPR base address [NOT SBC VARIANTS]
Each position of LK7 corresponds to an STEbus address line. Fitting
a link will decode the address line logic low and omitting a link will
decode it logic high. LK7 has no effect if the board is in STEbus
default or potential master mode. See LK4 and LK5 for DPR size
selection. Default base address is D0000h with 32KB size selected.
LK8. STEbus timeout [NOT SBC VARIANTS]
LK9. Does not exist
LK10. INT0 interrupt source selection
LK11. INT1 interrupt source selection
LK12. INT2 interrupt source selection
LK13. INT3 interrupt source selection
2192-08270-000-000Section 3. Links and Options
J539 TARGET386EX
Page 13
LK7 Function
Decode STEbus A19
Decode STEbus A18
Decode STEbus A17
Decode STEbus A16
Decode STEbus A15
Decode STEbus A14 (for 32KB DPR size OMIT THIS LINK)
F
E
+D
C
+B
A
LK8 Function
4us bus timeout
8us bus timeout
A
+B
LK10 Function
STEbus ATNRQ0* [NOT SBC VARIANTS]
PC/104 IRQ10
A
+B
LK11 Function
STEbus ATNRQ1* [NOT SBC VARIANTS]
PC/104 IRQ11
A
+B
LK12 Function
STEbus ATNRQ2* [NOT SBC VARIANTS]
PC/104 IRQ12
A
+B
LK13 Function
STEbus ATNRQ3* [NOT SBC VARIANTS]
PC/104 IRQ14
A
+B
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LK14. INT6 interrupt source selection
LK15. INT7 interrupt source selection
LK16. Watchdog reset enable
LK17. User link - CPU port P1 bit 6
LK18. User link - CPU port P1 bit 7
LK19. Run mode select
Selects whether the processor runs the monitor software or the users
application code after a power-on or reset. Application code must be
set to start running at 80000H (lowest Flash ROM memory address).
Once running, code may dynamically change the mapped size of the
Flash ROM (by re-programming 386EX chip select UCS) to free more
memory space for expansion bus memory mapped peripherals.
LK20. Battery back-up from PL2
FACTORY FIT LINK - default position depends on board variant
J539 TARGET386EX
2192-08270-000-000 Section 3. Links and Options
Page 14
LK18 Function
CPU port P1 bit 6 reads as 1
CPU port P1 bit 6 reads as 0
Omit
+Fit
LK19 Function
Run application starting at memory address 80000H
Run monitor software
Omit
+Fit
LK20 Function
STEbus variant - VSTBY from PL1
SBC variant - VSTBY from PL2 pin 1
Omit
Fit
LK14 Function
DPR mailbox interrupt [NOT SBC VARIANTS]
PC/104 IRQ6
A
+B
LK16 Function
Watchdog reset disabled
Watchdog timeout generates CPU reset
A
+B
LK17 Function
CPU port P1 bit 7 reads as 1
CPU port P1 bit 7 reads as 0
Omit
+Fit
LK15 Function
STEbus TFRERR*/bus timeout interrupt [NOT SBC VARIANTS]
PC/104 IRQ15
A
+B
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LK21. ISP daisy-chain link
FACTORY FIT LINK - default position depends on board variant
This link is fitted on the SBC variant where IC10 is not fitted to allow
in-system programming of IC11 during factory test.
LK22. Processor speed
FACTORY FIT LINK
LK23 and LK24. IC21 Intel Flash compatibility
FACTORY FIT LINKS
LK23 and LK24 should be fitted if an Intel 28F400 Flash device is
fitted to the board. The default device is a Fujitsu 29F400TA.
2192-08270-000-000Section 3. Links and Options
J539 TARGET386EX
Page 15
LK21 Function
STEbus variant
SBC variant
Omit
+Fit
LK22 Function
CPU runs at 33MHz
CPU runs at 25MHz
+Omit
Fit
LK23 LK24 Function
Fujitsu device fitted
Intel device fitted
+Omit +Omit
Fit Fit
User Configuration Record
A B
LK18
LK16
LK12
LK13
LK11
LK7
LK19
LK17
LK15
LK14
LK10
A
B
C
D
E
F
LK5
LK6
LK4
A
B
C
D
LK1
A
LK2
B
LK3
LK8
A
B
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2192-08270-000-000
J539 TARGET386EX
Section 3. Links and Options
Page 16
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Section 4. Using the TARGET386EX
Programmable Memory and I/O Map
The TARGET386EX has a very flexible scheme for locating its on-
board memory, peripherals and expansion busses in its memory and
I/O maps. The 386EX processor has eight outputs called
programmable chip selects, namely UCS and CS0 to CS6. These
outputs may be programmed so that they become active over a
range of memory or I/O addresses and can be used to activate
devices connected to the 386EX. The table below shows how the chip
selects are used on the TARGET386EX with the default address
ranges programmed by the monitor after initialisation.
Chip selects CS0, CS1, CS2 and UCS are activated for the address
ranges indicated in the table to control CPU accesses to the on-board
memory and peripherals.
Any CPU access to an address that is not covered by one of CS0,
CS1, CS2 or UCS is automatically directed to the default expansion
bus. On power-up or reset the default expansion bus is the PC/104
interface. STEbus board variants can access peripheral boards on
both PC/104 and STEbus. On power-up or reset the STEbus is the
non-default expansion bus. As shown in the table above, 386EX chip
selects CS3, CS4, CS5 and CS6 can be used to direct CPU accesses
that would normally go to the default expansion bus to access the
non-default expansion bus instead.
This example illustrates the use of CS3 to CS6. The monitor software
sets the TARGET386EX up so that the memory area from 48000h to
7FFFFh is directed to the PC/104 bus by default. The user has an
STEbus memory board that exists in the memory address range
60000h to 6FFFFh. Any one of CS3 to CS6 may be programmed to
cover 60000h to 6FFFFh and CPU accesses to any address in this
range will then be diverted to the STEbus instead of the PC/104.
2192-08270-000-000Section 4. Using the TARGET386EX
J539 TARGET386EX
Page 17
386EX
Chip Select
UCS
CS6
CS5
CS4
CS3
CS2
CS1
CS0
CS0
TARGET386EX Chip Select Use
Flash ROM
Accesses non-default expansion bus
Accesses non-default expansion bus
Accesses non-default expansion bus
Accesses non-default expansion bus
SVIF1 port, STEbus interrupt control
Register, General Control Registers 0
and 1
Dual port RAM (32KB)
NOT FITTED ON SBC VARIANTS
Main RAM (256KB)
Main RAM (512K)
Default Address Range
not programmed or enabled
not programmed or enabled
not programmed or enabled
not programmed or enabled
not programmed or enabled
FC00h-FFFFh, I/O
40000h - 47FFFh, MEMORY
not enabled if 512K main RAM
0 - 3FFFFh, MEMORY
0 - 7FFFF, MEMORY
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2192-08270-000-000
Note: If 512K of RAM is enabled, then there can be no access to the
PC/104 or SETbus, as there is no room for this in the memory map,
as follows.
CS3, CS4, CS5 and CS6 can be programmed very flexibly to create
multiple holes in the default bus memory or I/O space that are
directed to the non-default bus.
The default expansion bus can be changed by writing to bit 2 of
General Control Register 1. If this bit is set to 1 then the STEbus
becomes the default expansion bus. CPU accesses not covered by
CS0, CS1, CS2 or UCS will then be automatically diverted to STEbus.
CPU accesses can then be diverted to the PC/104 bus by
programming CS3 to CS6 for the appropriate address ranges.
The Board Software Library supplied with the Development Kit
fully supports programming all the 386EX chip selects.
Note: On SBC board variants PC/104 is the only available expansion bus.
Programming the chip selects that control accesses to on-board Flash
ROM, memory and I/O can also be used to move these on-board
peripherals around in the address map, see Appendix B. Reference
for more details.
Memory Map
J539 TARGET386EX
Section 4. Using the TARGET386EX
Page 18
16KB Monitor after reset
(UCS)
Top of PC/104 memory space
16KB Monitor (UCS) after initialisation
PC/104 (default)
STEbus (CS3-6)
32KB Dual Port SRAM (CS1)
256KB SRAM (CS0)
Max. Flash ROM (UCS)
3FFFFFFh
3FFC00h
1000000h
100000h
FFFFFh
FC000h
FBFFFh
80000h
7FFFFh
48000h
40000h
3FFFFh
00000h
ROM
RAM
or 512K
RAM
1M
512K
0
The address range if the ROM or RAM can
be changed to make a hole in the memory
map for access to the external busses.
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Memory Map After Power-up/Reset
After reset the upper chip select UCS is enabled with the entire
64MB memory address space as its address block. This allows the
boot monitor program to run from the top of memory. By default
the monitor program will run in real mode, the UCS register is then
programmed by the monitor software to assert the Flash ROM chip
select at addresses from 80000h to FFFFFh (512KB).
The state of LK19 tells the monitor whether to run itself or the users
application code. Application code must always start running from
address 80000h (bottom of Flash ROM). Having the Flash ROM
occupy this much of the memory map may obscure areas of the
memory map required by PC/104 or STEbus peripheral boards. If
this is the case then the application code can be written to re-
program the start address of UCS, while it is running to effectively
limit the size of the Flash ROM. Code should be written to jump into
the reduced Flash ROM area and then to re-program UCS for the
new size.
Memory space between the bottom of ROM and the top of main
RAM (location selected by CS0) will be automatically mapped to the
default expansion bus (STEbus or PC/104 depending on bit 2 of
General Control Register 1). CS3-6 can be programmed to direct
accesses to the non-default bus. CS1 decodes the on-board address
of the 16/32KB Dual Port RAM, this is fully re-locatable.
Note: when running the monitor software on 512KB RAM variants
of board the extra 256KB of RAM is not accessible until chip select
CS0 is re-programmed because in order to gain access to STEbus or
PC/104 bus or the on-board DPR located by CS1, either the bottom
of the Flash ROM area must be moved up the memory map by
programming UCS or the top of the on-board main RAM must be
moved down by programming CS0.
2192-08270-000-000Section 4. Using the TARGET386EX
J539 TARGET386EX
Page 19
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I/O Map
I/O Map After Power-up/Reset
The 386EX I/O has 64KB of I/O space. This is routed to the default
bus (STEbus or PC/104) except for the following locations. I/O
locations 22h and 23h are reserved for the I/O map configuration
register REMAPCFG. This register can change the way the I/O
space is set up for the 386EX. The monitor program sets the 386EX
up into Expanded Mode by default. This allows all the on-chip
peripherals to be mapped to address between F000h and F8FFh.
Programmable chip select line CS2 is used to select on-board
peripherals (STEbus interrupt control, interrupt out and bus timeout
interrupt clear, SVIF1 port). As CS2 can be programmed to be
anywhere in the I/O space (or, indeed, the memory space) the
location of this on-board peripheral control register block may be
relocated to any convenient location. In order to allow the maximum
space for I/O expansion on STEbus or PC/104 the monitor program
sets this register block location up to start at FC00h.
PC/104 is the only expansion bus available on SBC variants.
J539 TARGET386EX
2192-08270-000-000 Section 4. Using the TARGET386EX
Page 20
PC/104 (default)
STEbus (CS3-6)
SVIF1 Port
General Control Register 1 (repeat)
General Control Register 1
General Control Register 0 (repeat)
General Control Register 0
STEbus Control Register (repeat)
STEbus Control Register
PC/104 (default)
STEbus (CS3-6)
On-chip peripherals (Interrupt controllers, timers, UARTS)
PC/104 (default)
STEbus (CS3-6)
386EX 16bit REMAPCFG
register (not movable)
STEbus or PC/104
FFFFh
FC0Fh
FC0Ch
FC07h
FC06h
FC05h
FC04h
FC01h
FC00h
F8FFh
F000h
EFFFh
0023h
0022h
0000h
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