Asus P552W User manual

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P552W Level 3,4
Trouble Shooting Guide
Ver 1.0

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CONTENT
1. OVERVIEW
1.1 System Block Diagram ...……………………..……………... 5
1.2 power-on sequence ………………………………………...… 6
1.2.1 Start-up Timing Diagram …………………...……………. 6
1.2.2 Start-up Timing Parameters …………………………...….7
1.2.3 Power-on Sequence Summary ………………...…………. 7
1.2.4 POWER UP RESET TIMING ………………………….... 8
1.2.5 POWER UP TIMING SPECIFICATIONS (1/2) ………... 9
1.2.6 POWER UP TIMING SPECIFICATIONS (2/2) ………... 9
1.3 Main Specification ………………………………………….. 10
1.4 Device exterior description …………………………………. 11
1.4.1 FRONT SIDE ………………………….………………... 11
1.4.2 BACK SIDE …………………………………………….. 12
1.5 On Board Major Components Location …………………….. 13
1.5.1 FRAON SIDE ………………………………………..…. 13
1.5.2 BACKT SIDE …………………………………………... 14
1.6 Debugging Equipments ……………………………………... 16
2.Baseband Trouble Shooting
2.1 Introduction …………………………………………………. 19
2.2 Device Cannot Power On …………………………………… 19
2.2.1 Measure each power-on sequence voltage level ………... 19
2.2.2 RTC can’t power on issue ………………………………. 21
2.3 Device Peripheral Trouble Shooting (MMI Testing) ……….. 22
2.3.1 LCD Display Test ………………...…………………….. 22
2.3.2 Vibrator Test ……………………….…………………… 23
2.3.3 RTC Test ……………………………...………………… 23
2.3.4 Storage Test …………………………………………….. 23
2.3.5 MicroSD Test …………………………………………… 24
2.3.6 LED Test ………………………………………………... 24
2.3.7 3M and VGA camera Test ……………………………… 25
2.3.8 SIM Test ………………………………………………... 27
2.3.9 Battery Test ……………………………………………... 28

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2.3.10 SDRAM Test ………………………………..………… 30
2.3.11 Audio Test …………………………………………….. 30
2.3.12 Touch Panel Defect ……………………………….… 35
3.RF Trouble Shooting
3.1 Equipment ……………………………………..…………... 36
3.1.1 Software requirements ................................................. 36
3.1.2 Hardware requirements ................................................... 36
3.1.3 Instrument requirements.................................................. 36
3.2 RF Block Diagram..................................................................37
3.2.1 GSM block diagram........................................................ .37
3.2.2 WCDMA block diagram.................................................. 38
3.2.3 Bluetooth and WLAN block diagram ............................. 39
3.3.4 GPS block diagram ......................................................... 40
3.3 Procedures of RF Repair........................................................ 40
3.3.1 GSM and WCDMA repair procedures ........................... 40
3.3.2 Bluetooth and WLAN repair procedure ......................... 42
3.3.3 GPS repair procedure ..................................................... 43
3.4 General GSM debug.............................................................. 44
3.4.1 GSM path and test points ............................................ 44
3.4.2. GSM Tx debug ……………………………………... 48
3.4.3 GSM Rx debug ............................................................ 58
3.5 General WCDMA debug....................................................... 64
3.5.1. WCDMA path and test points ……………………..... 64
3.5.2 WCDMA Tx debug ..................................................... 67
3.5.3 WCDMA Rx debug………………………………….. 75
3.6 General Bluetooth and WLAN debug .................................. 80
3.6.1 Bluetooth and WLAN path and test points ………...... 80
3.6.2 Bluetooth and WLAN debug ………………………... 82
3.7 General GPS debug................................................................ 86
3.7.1 GPS path and test points .............................................. 86
3.7.2 GPS debug …………………………………………... 89

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Appendix
1. Bluetooth Debug Tool Operation ................................... 101
2. WLAN Debug Tool Operation ....................................... 104
3. GPS Debug Tool Operation – GPSinformation_en........ 109
4. GPS Firmware Download Tool Operation – GPSDL..... 111
5. GPS Debug Tool Operation – SiRFDemo...................... 113

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1. OVERVIEW
1.1 System Block Diagram

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1.2 power-on sequence
1.2.1 Start-up Timing Diagram

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1.2.2 Start-up Timing Parameters
1.2.3 Power-on Sequence Summary

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The baseband processor must write a logic 1 to a dedicated I2C
watchdog register bit during the next 8 s period. This will
move the DA9035 into the ACTIVE mode, and start the continuous
watchdog monitoring circuit. Failure to issue the initial watchdog
write will result in shut down of the DA9035 to the power-down state.
Once in the ACTIVE state, the EXT_WAKEUP signal will be
asserted while the nONKEY, nEXTON or VCHG_DETECT are
asserted (after de-bouncing), otherwise it is held low.
All I/Os of the DA9035, connected to the host processor will be
released at the end of the 32 ms countdown.
1.2.4 POWER UP RESET TIMING

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1.2.5 POWER UP TIMING SPECIFICATIONS (1/2)
1.2.6 POWER UP TIMING SPECIFICATIONS (2/2)

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1.3 Main Specification
Networks
HSDPA 3.6Mbps, UMTS 2100
EDGE/GPRS/GSM 900/1800/1900, Class 10
Operating System Microsoft Windows® Mobile™ 6.1 Professional
CPU Marvell Tavor 624MHz
Memory 256 MB Flash + 128MB SDRAM
Connectivity USB v1.1(FS), Bluetooth 2.0+EDR
GPS SiRF Star III
Display 2.8“, QVGA 240 x 320, 65K, TFT
Camera 2 Mega-Pixel, Fixed Focus
Battery 1100mAh Lithium
Weight Around 105g (with battery)
Standby Time 3G: 150 hours / 2G: 150 hours
Talk Time 3G: 3 hours / 2G: 5 hours
Expansion Slot Micro-SD (support SDHC)
Browser HTTP / WAP 1.2.1/2.0
Messaging SMS / MMS / Email / MSN / Push E-mail
Video
Record:MPEG4@QVGA 24fps / H.263@QCIF 24fps
Playback:MPEG4@QVGA 30fps / H.263@QCIF 30fps
Picture JPEG / PNG / GIP / BMP
Audio MP3 / WMA / 3GP / AAC / AAC+
Ringtone MP3 / MIDI
JAVA J2ME (CLDC 1.1 + MIDP2.0)

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1.4 Device exterior description
1.4.1 FRONT SIDE
NO. FUNCTION
1POWER BUTTON
2FUNCTION LED
3LCD
4CALL KEY
5AnyTime Launcher KEY
6JOY DIAL BUTTON
7OK KEY
8END KEY
9GPS PORT
10 VOLUME BUTTON

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1.4.2 BACK SIDE
NO. FUNCTION
11 SPEAKER
12 2M CAMERA
13 BATTERY COVER
14 TOUCH PEN
15 HOLD KEY
16 CAMERA KEY
17 RESET BUTTON
18 MiniUSB PORT

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1.5 On Board Major Components Location
1.5.1 FRAON SIDE

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1.5.2 BACKT SIDE

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1.6 Debugging Equipments
Oscilloscope
Soldering Iron

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Power Supply
Reheat fan

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Voltmeter

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2.Baseband Trouble Shooting
2.1 Introduction
The purpose of this repair manual is to provide a general trouble
shooting guide for the defective
ASUS PDA phone GM2.
The repair methodology provided in this manual is strictly for the
GM2 model ONLY, trouble shooting
methodology for the other ASUS designed PDA phone will not be
included in this document.
2.2 Device Cannot Power On
The most common reasons that will cause device to fail to power
on is due to defect components or incorrect power-on sequence. It is
recommended to observe and examine if there is any obvious external
damage on the PCB or any on board component first. If not, please
hook the power supply and check if there is any current, If there is no
current observed on power supply, please push the power button to
power on the
system first and follow the following debugging process: V_BAT =
power supply voltage
2.2.1 Measure each power-on sequence voltage level
A. V_BAT = power supply voltage ,check C1103.1
This is to make sure that the power source is at the correct level. If
the measured voltage level is lower than the supplied main voltage, it
is likely that there is a current leakage on the V_BAT power domain.
(Generally this will cause high current consumption on the power
supply). If this is observed, please check all the components that are
connected to the V_BAT net, and examine if there is any possible
defect. If the measured voltage is equal to 0V, and it is not shorted to
GND, please check if there is any defect on the battery connector.

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B. VCC_BBAT= 2.9V
If VCC_BBAT is < 2.9V, please examine chip U901 and the
resistors/capacitors around it. Observe if there is any defect.
C. nBATT_FAULT(R321) = 2.9V
If incorrect voltage is observed, please examine any possible
defect on U303, U304, U305, U306 and the surrounding components.
D. 32KHz clock (TXTAL_IN)
If 32KHz clock signal is not measured, please examine any
possible defect on X301 and the surrounding components.
E. SYS_EN(U406.1) = 2.9V
SYS_EN is the signal that sends from the CPU to the PMU to
indicate power on sequence is running correctly up to this point, and
can continue to turn on certain power domains.
If SYS_EN voltage level is incorrect, it is likely there is a defect on
the CPU (U301)
F. VCC_MVT(R515)=1.8V；VBUCK3(C943.1)=2.1V；
VCC_MVT_PLL_CORE(R525)=1.8V；
VCC_MVT_CLK(R528)=1.8V；LDO2(R927)=1.8V；
LDO3(R931)=2.8V
If incorrect voltage is measured on the above power domains,
please check if there is any defect on U901, L903,
U301,U41 ,L8 ,L9 ,L10 and the surrounding components.
G. PWR_EN (U304.2)= 2.9V
PWR_EN is a signal that sends from the CPU to the PMU to
indicate that power on sequence is running correctly upon this point,
and the PMU can proceed to turn on the remaining power domain
required for the CPU. If all the power domains measured in
procedure 1-E are correct, but PWR_EN is measured at an incorrect
level, then it is most likely that there is a defect on U901 or U301.
H. Verify if V_COMM(R966) and V_APPS(R967) voltage level are