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Atmel AT43USB324 User manual

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1
Features
•AVR®8-bit RISC Microcontroller with 83 ns Instruction Cycle Time
•USB Hub with One Attached and Two External Ports
•USB Keyboard Function with Three Endpoints
•16K Bytes of Program Memory, 512 Bytes SRAM
•32 x 8 General-purpose Working Registers
•34 Programmable I/O Port Pins
•Support for 18 x 8 Keyboard Matrix
•Keyboard Scan Inputs with Pull-up Resistors
•4 LED Driver Outputs
•One 8-bit Timer/Counter with Separate Prescaler
•External and Internal Interrupt Sources
•Programmable Watchdog Timer
•6 MHz Oscillator with On-chip PLL
•5V Operation with On-chip 3.3V Power Supply
•48-lead SSOP and 48-lead LQFP
Overview
The Atmel AT43USB324 is a compound USB device designed for use in multimedia
USB keyboards with an embedded hub. Internally, the AT43USB324 consists of a
USB hub and function interface, a hub repeater, and an AVR microcontroller. To the
USB host, the embedded function appears as an attached port of the hub with its own
device address and three endpoints. The third function endpoint makes the
AT43USB324 extremely suitable for keyboards supporting the Consumer Page as
described in the USB HID Usage tables. A typical application of the AT43USB324 is
shown in Figure 1 and block diagrams are shown in Figures 2 and 3.
The AT43USB324 interfaces to the USB host at the transaction layer while the micro-
controller firmware handles the USB protocol layers in addition to performing the
keyboard control functions. Except for LEDs, no other external components are
required for the keyboard function.
Pin Configurations
USB Multimedia
Keyboard
Controller
AT43USB324
Rev. 1941A–02/01
48-lead SSOP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
PD6
PD7
XTAL1
XTAL2
LFT
PE1
PE0
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
PC7
PD5
PD4
VCC
CEXT
VSS
TEST
RESET
DM0
DP0
DM2
DP2
DM3
DP3
PD3
PD2
PD1
PD0
PC0
PC1
PC2
PC3
PC4
PC5
PC6
48-lead LQFP
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
TEST
VSS
CEXT
VCC
PD4
PD5
PD6
PD7
XTAL1
XTAL2
LFT
PE1
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PA0
PA1
PA2
PA3
PA4
48
47
46
45
44
43
42
41
40
39
38
37
13
14
15
16
17
18
19
20
21
22
23
24
PE0
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
PA7
PA6
PA5
RESET
DM0
DP0
DM2
DP2
DM3
DP3
PD3
PD2
PD1
PD0
PC0
查询AT43USB324 供应商 捷多邦,专业PCB打样工厂,24小时加急出货
2AT43USB324
1941A–02/01
Figure 1. A Typical USB Hub/Keyboard Application
Figure 2. USB Block Diagram (1)
AT43USB324
XTAL1
XTAL2
LFT
RST
TEST
PWR3/PD3
PWR2/PD4
OVC3/PD2
OVC2/PD1
DP0
DM0
DP2
DM2
DP3
DM3
PA[0:7]
PB[0:7]
PE[0, 1]
PC[0:7]
PD[5:7]
PD0
CEXT
VCC
VSS
COL[0:7]
COL[8:15]
COL[16,17]
ROW[0:7]
LEDs
KEYBOARD
DATA
ADDRESS
CONTROL
AVR CPU 16K ROM
512 BYTES SRAM
PORT A
PORT B
PORT C
PORT D
PORT E
INT
UNIT
OSC
&
PLL
WDT
T/C0
USB BLOCK
3
AT43USB324
1941A–02/01
Figure 3. USB Block Diagram (2)
PORT 0
XCVR
HUB
REPEATER
SERIAL
INTERFACE
ENGINE
HUB
INTERFACE
UNIT
FUNCTION
INTERFACE
UNIT
AVR
MICROCONTROLLER
DATA
ADDRESS
CONTROL
PORT 2
XCVR
PORT 3
XCVR
4AT43USB324
1941A–02/01
Pin Assignment
Type: I = Input
O=Output
B = Bi-directional
U = USB IO
V = Power Supply, Ground
48-lead LQFP Pin Assignment
Pin # Signal Type Pin # Signal Type
1 TEST I 25 PA4/CL4 B
2 VSS V 26 PA3/CL3 B
3 CEXT V 27 PA2/CL2 B
4VCCV 28PA1/CL1B
5PD4B 29PA0/CL0B
6 PD5 B 30 PC7/RW7 B
7 PD6 B 31 PC6/RW6 B
8 PD7 B 32 PC5/RW5 B
9 XTAL1 I 33 PC4/RW4 B
10 XTAL2 O 34 PC3/RW3 B
11 LFT O 35 PC2/RW2 B
12 PE1/CL17 B 36 PC1/RW1 B
13 PE0/CL16 B 37 PC0/RW0 B
14 PB7/CL15 B 38 PD0 B
15 PB6/CL14 B 39 PD1 B
16 PB5/CL13 B 40 PD2 B
17 PB4/CL12 B 41 PD3 B
18 PB3/CL11 B 42 DP3 U
19 PB2/CL10 B 43 DM3 U
20 PB1/CL9 B 44 DP2 U
21 PB0/CL8 B 45 DM2 U
22 PA7/CL7 B 46 DP0 U
23 PA6/CL6 B 47 DM0 U
24 PA5/CL5 B 48 RESET I
5
AT43USB324
1941A–02/01
48-lead SSOP Pin Assignment
Pin # Signal Type Pin # Signal Type
1 PD6 B 25 PC6/RW6 B
2 PD7 B 26 PC5/RW5 B
3 XTAL1 I 27 PC4/RW4 B
4XTAL2O 28PC3/RW3 B
5LFTO 29PC2/RW2B
6 PE1/COL17 B 30 PC1/RW1 B
7 PE0/CL16 B 31 PC0/RW0 B
8 PB7/CL15 B 32 PD0 B
9 PB6/CL14 B 33 PD1 B
10 PB5/CL13 B 34 PD2 B
11 PB4/CL12 B 35 PD3 B
12 PB3/CL11 B 36 DP3 U
13 PB2/CL10 B 37 DM3 U
14 PB1/CL9 B 38 DP2 U
15 PB0/CL8 B 39 DM2 U
16 PA7/CL7 B 40 DP0 U
17 PA6/CL6 B 41 DM0 U
18 PA5/CL5 B 42 RESET I
19 PA4/CL4 B 43 TEST I
20 PA3/CL3 B 44 VSS V
21 PA2/CL2 B 45 CEXT V
22 PA1/CL1 B 46 VCC V
23 PA0/CL0 B 47 PD4 B
24 PC7/RW7 B 48 PD5 B
6AT43USB324
1941A–02/01
Signal Description
Signal Type Name and Functions
VCC V Power Supply –5V supply input
CEXT O External Capacitor –A high quality 0.47 µF must be connected to CEXT for proper
operation of the chip.
VSS V Ground
XTAL1 I Oscillator Input –Input to the inverting oscillator amplifier
XTAL2 O Oscillator Output –Output of the inverting oscillator amplifier
LFT I
PLL Filter –For proper operation of the PLL, this pin should be connected through
a 0.01 µF capacitor in parallel with a 100Ωresistor in series with a 0.22 µF
capacitor to ground (VSS). Both capacitors must be high quality ceramic
DP0 U
Upstream Plus USB I/O –This pin should be connected to CEXT1 through an
external 1.5 kΩpull-up resistor. DP0 and DM0 form the differential signal pin pairs
connected to the host controller or an upstream hub
DM0 U Upstream Minus USB I/O
DP[2,3] U
Port Plus USB I/O –Each of these pins should be connected to VSS through an
external 15 kΩresistor. The DP[2,3] and DM[2,3] are the differential signal-pin pairs
to connect downstream USB devices
DM[2,3] U Port Minus USB I/O –Each of these pins should be connected to VSS through an
external 15 kΩresistor
PA[0:7] B Port A[0:7] –Bi-directional 8-bit I/O port with controlled slew rate. These pins are
used as eight of the keyboard matrix column output strobes: PA[0:7] = COL[0:7]
PB[0:7] B
Port B[0:7] –Bi-directional 8-bit I/O port with controlled slew rate. These pins are
used as the eight of the keyboard matrix column output strobes: PB[0:7] =
COL[8:15]
PC[0:7] B Port C[0:7] –Bi-directional 8-bit I/O port with internal pull-ups. These pins are used
as keyboard matrix row input signals: PC[0:7] = ROW[0:7]
PD[0:7] B
Port D[0:7] –Bi-directional I/O ports. PD[4:7] have built-in series limiting resistors
and can be used to drive LEDs directly. An alternate function of PD2 is as INT0 and
PD3 is as INT1, the external interrupt pins
PE[0:1] B Port E[0:1] –Bi-directional I/O port with controlled slew rate which can be used as
two additional keyboard column output strobes: COL 16, 17
RESET IReset –A low on this pin for two machine cycles while the oscillator is running
resets the device
TEST I Test Pin –This pin should be tied to ground
7
AT43USB324
1941A–02/01
Multimedia
Keyboards
The hardware of the AT43USB324 supports a wide variety of USB keyboards with an
embedded hub. The exact configuration and function of the keyboard/hub is defined by
the firmware programmed into its masked ROM.
Oscillator and PLL All the clock signals required to run the AT43USB324 are derived from on-chip oscilla-
tor. To reduce EMI and power dissipation, the oscillator is designed to operate with a
6 MHz crystal. An on-chip PLL generates the high frequency for the clock/data separa-
tor of the serial interface engine. In the suspended state, the oscillator circuitry is turned
off.
The oscillator of the AT43USB324 is of a special low drive type, designed to work with
most crystals without any external components. The crystal must be of the parallel reso-
nance type requiring a load capacitance of about 10 pF. If the crystal requires a higher
value capacitance, external capacitors can be added to the two terminals of the crystal
and ground to meet the required value. To assure quick startup, a crystal with a high Q,
or low ESR, should be used. To meet the USB hub frequency accuracy and stability
requirements for hubs, the crystal should have an accuracy and stability of better than
100 ppm. The use of a ceramic resonator in place of the crystal is not recommended
because a resonator would not have the necessary frequency accuracy and stability.
The clock can also be externally sourced. In this case, connect the clock source to the
XTAL1 pin, while leaving XTAL2 pin floating. The switching level at the XTAL1 pin can
be as low as 0.47V (see Electrical Specifications section on page 10) and a CMOS
device is required to drive this pin to maintain good noise margins at the low switching
level.
For proper operation of the PLL, an external RC filter consisting of a series RC network
of 100Ωand 0.22 µF in parallel with a 0.01 µF capacitor must be connected from the
LFT pin to VSS (see Figure 4). Use only high quality ceramic capacitors.
Figure 4. External RC Filter
I/O Pins The keyboard matrix strobe output pins, PA[0:7], PB[0:7] and PE[0,1] have controlled
slope drives. With a load of 100 pF, the output fall time ranges between 75 ns and
300 ns. The keyboard matrix strobe input pins, PC[0:7] have built-in pull-up resistors, 20
kΩnominal value, to the internal 3.3V power supply.
Y1
6.000 MHz
R1
100
C1
0.22 µF
C2
0.01 µF
XTAL1
XTAL2
LFT
U1
AT43USB324
8AT43USB324
1941A–02/01
The PD[4:7] have 5V tolerant open-drain outputs and each has a built-in series resistor
of 330Ωnominal value. These output pins are designed for driving a LED connected to
the 5V supply.
The remaining GP I/O pins of the AT43USB324 are bi-directional with CMOS inputs and
push-pull outputs.
Hub and Port Power
Management
The embedded hub in a keyboard will most likely be a bus-powered hub even though
the hardware of the AT43USB324 is designed to accommodate both types of hubs.
Management of the downstream port power is also defined by the firmware –per port or
global overcurrent sensing, individual or gang power switching. While the interface to
the external power supply monitoring and switching is achieved through the microcon-
troller’s I/O ports, the USB hardware of the AT43USB324 contains the circuitry to handle
all the possible combinations port power management tasks.
Overcurrent Sensing The AT43USB324 is capable of detecting an overcurrent in its downstream ports even
while it is in the suspend state. Overcurrent input flag for Port 2 is routed to PD1 and for
Port 3 to PD2.
1. Global Overcurrent Protection. In this mode, the Port Overcurrent Indicator
and Port Overcurrent Indicator Change should be set to 0’s. For the
AT43USB324, an external solid state switch, such as the Micrel MIC2025, is
required to switch power to both external USB ports. The FLG output of the
switch should be connected to either PD0 or PD1 of the microcontroller. When
an overcurrent occurs, FLG is asserted and the firmware should set the Hub
Overcurrent Indicator and Hub Overcurrent Indicator Change and switch off
power to the hub.
2. Individual Port Overcurrent Protection. The Hub Overcurrent Indicator and
Hub Overcurrent Indicator Change bits should be set to 0’s. One MIC2536 is
required for the two USB ports. One FLG output of the MIC2536 should be con-
nected to PD0 and the other to PD1 of the microcontroller. An overcurrent is
indicated by FLG being asserted. The firmware sets the corresponding port’s
Overcurrent Indicator and the Overcurrent Indicator Change bits and switches off
power to the port. At the next IN token from the host, the AT43USB324 reports
the status change.
Port Power Switching 1. Gang Power Switching. One of the microcontroller I/O port pins must be pro-
grammed as an output to control the external switch, PWR. Switch ON is
requested by the USB host through the SetPortFeature (PORT_POWER)
request. Switch OFF is executed upon receipt of a ClearPortFeature
(PORT_POWER) or upon detecting an overcurrent condition. The firmware
clears the Power Control Bit. Only if all BOTH of the Power Control Bits of Ports 2
AND 3 are cleared should the firmware de-assert the PWR pin.
2. Individual Power Switching. One microcontroller I/O port pin must be assigned
for each USB port to control the external switch, PWRx, where x = 2, 3. Each of
the Power Control Bits controls one PWRx.
Power Management
Circuit
Figure 5 shows a simplified diagram of a power management circuit of an
AT43USB324-based hub design with global overcurrent protection and ganged power
switching.
9
AT43USB324
1941A–02/01
Figure 5. Power Management Circuit Diagram
BUS_POWER
GND
GND
VCC
AT43USB324
PWR
OVC
CTL
FLG
PORT2_POWER
PORT2_GND
PORT3_POWER
PORT3_GND
SWITCH
IN OUT
U1
U2
10 AT43USB324
1941A–02/01
Electrical Specification
DC Characteristics
The values shown in this table are valid for TA= 0°C to 85°C, VCC = 4.4V to 5.25V, unless otherwise noted.
Absolute Maximum Ratings*
Operating Temperature.................................. -40°C to +125°C*NOTICE: Stresses beyond those listed under Absolute Maxi-
mum Ratings may cause permanent damage to the
device. These are stress ratings only, and functional
operation of the device at these or any other condi-
tions beyond those listed under Operating Conditions
is not implied. Exposure to Absolute Maximum
Ratings conditions for extended periods of time
may affect device reliability.
Storage Temperature ..................................... -65°C to +150°C
All Input/Output Voltage .........-0.3V to VCEXT + 0.3V, 4.6V max
Supply Voltage (VCC) .......................................... 4.4V to +5.5V
Power Supply
Symbol Parameter Min Max Unit
VCC 5V Power Supply 4.4 5.25 V
ICC 5V Supply Current 30 mA
ICCS Suspended Device Current 150 µA
USB Signals: DPx, DMx
Symbol Parameter Condition Min Max Unit
VIH Input Level High (Driven) 2.0 V
VIHZ Input Level High (Floating) 2.7 V
VIL Input Level Low 0.8 V
VDI Differential Input Sensitivity DPx and DMx 0.2 V
VCM Differential Common Mode Range 0.8 2.5 V
VOL1 Static Output Low RL of 1.5 kΩto 3.6V 0.3 V
VOH1 Static Output High RL of 15 kΩto GND 2.8 3.6 V
VCRS Output Signal Crossover 1.3 2.0 V
VIN Input Capacitance 20 pF