Casio MG-500 Troubleshooting guide

Service
Manuau
&
PARTS
LIST
cme
MIDI
GUITAR
MG-500
MG-510
AUG.1987

CONTENTS
1 SCHEMATIC DIAGRAM...
1-1 PCBs M385-MA1M, CN1, CN2.
1-2. PCB M4385-MA2M..
2 PCB VIEW...
2-1 PCB M385-MA1M
2-2 PCB M385-MA2M
2:3 PART NUMBER REFERENCE TABLE.
2-4 PCB M385-MA1IM
2-5 PCB M385-MA2M.
3.
CIRCUIT
DESCRIPTION.
3-1
WIRING
DIAGRAM.
3-2
BLOCK
DIAGRAM.
3-3
CIRCUIT
BLOCK.
4 CPU (uPD78C10G) PIN FUNCTION:
5 GATE ARRAY F.
6
INTERNAL
CIRCUIT
OF
GATE
ARRAY
(1)
Frequency
Detection
Counte
(2)
Peak
Detection
Circuit.
(3)
Address
Latch
(4)
MIDI
Buffer.
7 “MIDI CIRCUIT.
8 RESET CIRCUIT.
9
RELATION
BETWEEN
FRET
PITCH
&
FREQUENCY,
10 TEST MODE
11 ADJUSTMENTS..
PARTS LIST
EXPLODED VIEW..
OPERATIONS.
MIDI Implementation Chart.

1.
SCHEMATIC
DIAGRAM
=e
Ha
CY
a
a
Sa
na
ae
ae
ea

2
PCB
VIEW

2-4 PCB _M385:MAIM
2.3
PART
NUMBER
REFERENCE
TABLE
Resistors.
[im
47k
R25~R30
1K2Q
R41,
R42
Ez
1m
Z|
R2
1K2
‘R31
1KQ
R43VRA6
Not
used
R3VRS
Not
used
R32
1K2
R47
R59
Not
used
[
Revaie
|
47K2
R33
2200
REO
a0
R19
1ko
~
|
Rs
1K
Ret
10Ka
R20
47KQ
R35
10KQ
|
R62
1KQ
|
R21
1KQ
R36,
R37
Ka
R63
wkKaQ
naz
|
a7Ko
R38
2200
roa
22k2
R23
1Ka
i)
1Ka
Ros
10Ka
R24
4a7Ko
R40
10KaQ
[res
ia
Sts and tC
=
7
cr
uPD78610G-1B-X}
C3
wPD65031GC169
|
ICS
NJM78LO5R:
(GAF)
102
uPo2sc256eG-
|
Ic
pstsi8a2
|
108
HPD74HCUOSG
Capacitors
aI
3
=
see
|
crs
|
2200F
c19
330
pF
31
25V4.u
a
revi0#
aI
20
220
pF
cx2—|
_330pF
cy
oomr
ca
_-30pF
33
15
pF
(Non
polarity)
cexctt
|
2200F
cz
Tevi0#
caavcas
|
220
0F
12
16V10n
C23
0.01
pF
|
cas
15pF
(Non
polarity)
13,c14
|
220pF
c2a
|
220
pF
a7
0.01
uF
oo
330
pF
c25<027
|
330
pF
cas
tova34
cié
220
pF
28
0.01
uF
C49,
C50
56
pF
(Non
polarity)
7
30pF
|
C28
16VI0%
cst
0.01
uF
[e
8
220
pF
30
16v22n
52
100
pF

Oscillators
x1
NRastomie
|
x2
NR-18-2MHz
coit
u
$8c-03
Zener Diodes
z01
HzMsc
1,02
|
1ss220-1

2-6 PCB _M385.MA2M
Resistors
+
RIVR3
47kKQ
R36
47K2
R71
22K
‘Re
2KQ
R37R38
47KQ
R72VR73
47KQ
RS
22K2
R39VR40
100
KQ
R74
47m
RE
1KQ
Rat
22mMQ
R75
1KQ
a7
47KQ
Raz
2KQ
|
R76
100
K2
RB
22M2
[Raa
47KQ
a7
22K2
RO
27M2
R44
10KQ
R78
27MQ
RIOVRI2
100
KQ.
R45.
R46
100
KQ
R79
22M2
R13
330K2.
Ra?
WOKa
|
Reo
1ka
Rw
22K
R48.
RAD
100
KQ.
‘Ret
100
K2Q
RIGVAI?
47
KQ
R60
sa
Re2
22Ka
RIB
2KQ
‘RST
3BoKnQ
R83
27M2
[Care
toKa
Rs2
22Ka
Res
22a
R20vR21
100K
RSSAAS4
47K
Res
222
R22
47Ka
R55
2K2
|
Res
330K2
[
R23.
R24
100
KQ.
RSE
47KQ
R87-R88
100K2
R26
330
KQ
R57
1K2
R89
47KQ
R26
222
nse
22K
R90
2K
R27
22M
R59
100
Ka
ROIWRO2
47K
R28
27M
60
27M
R93
47K
R29
22kQ
R61
47kQ
RO4VRO7
100
K2
30
100
K@
Rez
22Ma
R98
10Ka
Rat
1Ka
~
[res
22k2
ROOWR100__100
K2
R32
27
M0
Res
3302
R101
10Ka
R33
22k
RESVRES
100K
R102
22k2
R34
1Ka
|
Reo
10K
R103
330K2
cr
100
Ka
R70
aKa

Capacitors:
ce
0.012
uF
oz
0.033
uF
as
4700
pF
CI
0.047
uF
Cy
1000
pF
ca
8200
oF
Cy
8200
pF
ce
|
(0.022uF
as
0.087
uF
CI
001uF
25
Cora
C46
0027
uF
cs
1000
pF
26
0.033uF
car
0.022
yF
cs
O01yr
27
0Viu
8
1000
pF
7
3300pF
=|
C28
O0tur
co
|
(ome
ce
16800
pF
29
0.018
F
C50
0.033,
F
o
Sov
wer
30
OomF
cst
0.0474F
C10
oor
cst
0.027
uF
cs2
Sov
war
ci
018
F
x2
or
F
53
6800
pF
12
1000
pF
33
sovipeP
54
0.0181
F
13
O.018
uF
34
tovaa
55
01m
F
cia
0.087
uF
035
0015
uF
56
O01
nF
cis
ooue
36
0.047
uF
cs?
0.087
uF
ci6
OomF
7
O012uF
ose
1000
pF
7
5600
pF
38
0015
uF
59
0.087,
F
cre
S0V1)8P
oe
1000
pF
260
00m
F
cre
0.018
uF
co
0001
uF
co
00271
F
20
0.087
uF
Co
O01uF
062
00121
F
21
sovIH
az
Sov
wer
|
83
sovuaP
Diodes

3-1
WIRING
DIAGRAM
M385—CNI
(Console)
3
CIRCUIT
DESCRIPTION
M385-MA2M
(Linear circuits)
MAIN VR@)
M385—CN2
BATTERY
BOX
AAx6
(Jock panel)

3-2
BLOCK
DIAGRAM
AC edeptor (AD—5)
Power
MIDI
MIDI
Circuit
Circuit
Pickup
ie
|
=
E
Rom
[|
wpp7ecio
}——|
GAF
|»
midi
out
6
AA
size
batteries
——+|
:
Switches
8
LEDS
Linear
Circuit
separates
the
signal
from
MIDI
pickup
into
three
kinds
of
data
which
are
velocity,
peak,
and
frequency
data.
Gate
Array
F
contains
sexadecimal
counters
which
counts
up
frequency
data
and
send
it
to
CPU
asa
pitch
data.
Peak
signal
is
used
for
the
timing
signal
of
the
counters.
Velocity
data
is
transformed
into
digital
data
in
builtin
ADCs
in
CPU.
The
pitch
and
the
velocity
data
are
converted
into
MIDI
signal
in
CPU
and
sent
to
MIDI
OUT
terminal
via
a
buffer
in
Gate
Array
F.

3-3 CIRCUIT BLOCK
3
OBdleggtoe
avalos 7.
t
ovd|
eK et keh
cual
BU38e BF 88
RESET

4
CPU
(uPD78C10G)
PIN
FUNCTIONS
Pin
No.
|
Terminal
Signal
|
In/Out
Function
59
PAO
Swi
In
_|
Inputs
from
the
DIP
switches
4 PAS
1 PAG
2 PAT
3
PBO
sws
4
Pat
si
In
5
PB2
2
In
6
PB3
$3
In
7
PB4
S4
In
|
Low
when
mode
switch
is
“PROGRAM”.
8
PBS
$5
In|
Lowwhen
mode
switch
is
“BEND”
9
PBE
Lo3
Out
|
b
LED
drive
signal.
Low
active.
10
P87
Lb2
Out
_|
#
LED
drive
signal.
Low
active.
n
PCO
Mi
Out
_|
MIDI
data
output
12
Pci
Lot
Out
_|
Pilot
lamp
drive
signal.
Low
active.
13
PC2
In|
2M
Hz
MIDI
clock
pulse
input
4
PCs
CLA
Out
__|
Resets
gate
array’s
built-in
counters
15
PCa
CLK
‘Out
__|
Clock
signal
for
gate
array’s
bu
16
PCS
: E
Not
used
7
PCE
>
in|
The
guitar
becomes
self
diagnostic
mode
when
this,
terminal
is
Low
and
power
switch
is
turned
on.
18,
19
|
PC7,NMI
:
=
Not
used
20
INTI
INTT
in
__|
interrupt
from
the
gate
array
21
MODE
: :
Not
used
22
RESET
:
In|
Power
ON
reset
signal
input
23
MODEO
E
:
Not
used
24,25
|
X2,X1
:
In/Out
_|
15M
Hz
clock
pulse
input/output
26
vss
: -
Ground
(0
V)
source
27
AVSS
: =
Ground
for
the
built-in
ADCs
28
ANO
ENV1
In
Envelope
signal
from
the
1st
string
29
ANI
ENV2
In
__|
Envelope
signal
from
the
2nd
string
30
AN2
ENV3
In
___|
Envelope
signal
from
the
3rd
string
31
‘AN3
ENV4
in
__
|
Envelope
signal
from
the
4th
string
32
‘ANS
ENVS
In|
Envelope
signal
from
the
5th
string
33
ANS
ENVE
in
|
Envelope
signal
from
the
6th
string
34,35
[ANG,AN7
|
- =
Not
used
36
VREF
E
In
__|
Reference
voltage
(+5
V)
for
the
built-in
ADCs
37
AVDD
=
in|
+5
V
source
for
built-in
ADCs
ate

38
RD
R
Qut__|
Memory
read
signal
39 WR Out _| Memory write signal
40 ALE . Out Address Latch Enable.
Data bus PDO - PD7 become lower address (AO-
AT) bus.
41-48 | PFOPF7 : Out | Upper address (A8 - A15) bus
49-56 | PDO-PO7 - Infout_| Data bus
57 STOP : : Not used
L 58 voD - - +5 V source
GATE ARRAY F
The
gate
array
contains
counters
which
detects
the
frequency
of
string
vibration,
an
address
latch,
i
and
a
MIDI
data
buffer.
The
following
is
the
pin
function
of
the
gate
array.
Pin No. | Terminal Signal In/Out Function
1-10 | ADO-AD7 | ADO-AD7 | In/Out | Data bus
3,7__| GND 0G : Ground (0 V) source
11-20 | A0-A7 A0-A7 Out Lower address bus
12,23
|
CS2,CS1
Al5,A14
|
In
Built-in
counter
provides
frequency
data
from
data
bus when this terminal is Low and terminal CS1 is 1
High
21 voo1 vob : +5 V source
22 ALE ALE In Address Latch Enable signal. When this terminal is
High, the contents of data bus are latched and be-
come lower address bus (AO - A7).
24
WR
WR
In
When
Low,
peak
signals
from
the
strings
cannot
be
entered.
25
vob2
yoo
: +5
V source
26
RD
RD
In
__|
When
Low,
note
number is
provided
in data
bus.
27
Pt
PEAK
1
In
‘Ist
string’s
peak signal
input
28
st
SIG1
in
‘Ist
string’s
frequency
signal
input
29
P2
PEAK
2
In
2nd
string’s
peak
signal
input
30
82
SIG2
In__|
2nd
string’s
frequency
signal
input
31
P3
PEAK 3
in
3rd
string’s
peak
signal
input,
32
$3
SIG3
In
3rd string’s
frequency
signal
input
33
GND
0G
: Ground (0
V) source
[34
vod vob
In
+5
V source
35
Pa
PEAK 4
In__|
Ath
string’s
peak signal
i
36
S4
sIG4
In
|
4th
string’s
frequency
signal
input
-2-

37
PS
PEAK
5
In
5th
string’s
peak
signal
input
=
$5
SIGS
in|
_Bth
string’s
frequency
signal
input
30
_|
PG
PEAK6
|
In
|
6thstring’s
peak
signal
input
40
|
$6
SIG6
In|
6th
string’s
frequency
signal
input
41-45|-
:
=_|_Not
used
[46
MO
MO.
Out
|
MIDI
data
output
47
CLR cLR
In
Frequency
detection
counter
reset
signal
48
MI
MI
In
MIDI
data
input
fs
49
cK
CLK
In
Clock
pulse
for
frequency detection
counter
50
INTI INTT
‘Out
|
Interrupt
to
CPU
51,52]
- :
>|
Not
used

6 INTERNAL CIRCUITS OF GATE ARRAY F
(1) Frequency Detection Counter
In
order
to
detect
the
frequency
of
strings’
vibrations,
sexadecimal
counter
in
Gate
Array
F
counts
up
the
positive
and
negative portions
of
the
waveform
from
the
strings,
and
provides
digital
data
to
CPU
via
data
bus.
SER
seetetan
Seeiaey
ADO~7
KXRE ROOST
BRKT.
SKE
KKK
1
sicz
‘Signal from the Same circuit os above
2nd string
|
Mr Za
Jy
sic4
1
Signal
from
the
Some
circuit
as
above
4th string
sis
u-
Signal trom the
Sth string
=f
siss|
Signal from the tt
6th string
1
Lu
—
AO~3
0
Decoder

(2)
Peak
Detection
Circuit
‘The
circuit
disregards
abnormal
string
vibration
which
may
occur
at
the
beginning
and
the
end
of
string
vibration
and
detects
the
accurate
frequency
of
string
vibrations.
PEAK
signals
are
provided
at
the
peaks
of
string
vibration
waveform
and
latched
in
the
flip
flops.
While
a
PEAK
signal
is
latched,
output
Q
of
the
flip
flop
rises
to
High
level.
‘At
certain
timing,
CPU
opens
the
tri-state
inverters
by
‘signals
AG
and
7
so
that
data
bus
drop
to
Low.
(CPU
receives
frequency
data
from
the
counters
between
the
period
of
being
Low
of
ADO
-
AD6.
Every
time
CPU
receives
data,
it
compares
the
fre-
soto
quency
with
the
formerly
detected
data
and
if
there
4
,
is
a
difference
between
the
two
data,
CPU
disregards
Ppa
‘the
former
data
in
order
to
detect
the
accurate
fre-
these
date
quency.
When
PEAK
signals
are
not
provided,
Q
outputs
of
the
flip
flops
interrupt
the
CPU
via
INT
1
terminal.
Receiving
INT
I,
CPU
stops
detecting
frequency
data.
High
when
PEAK
signal
is
lotchea
Opens
at
certain
z
timig
PEAK2
when High, CPU
‘does not detect
frequency deta
OINT!
A6,A7©

(3) Address Latch
Receiving
signal
ALE
from
CPU,
signals
ADO
-
AD7
are
latched
in
and
become
lower
address
signals
AQ
-
A7.
Lotches the address bus
and keeps its status until
it recieves the next ALE signal:
Date/Address
bus
perkates
CPU provides High level
when the dato bus carries
address dato.
(4) MIDI Buffer
Amplifies the MID! output signal from CPU.
Me mo

e+
these
os
++
bet
GEsT

7 MIDI CIRCUITS
MIDI pickup converts the string vibration into current value.
MIDI Pickup
After inverted, filtered, and gain-controlled, the signal from MIDI pickup is separated in three
different signals.
(1) SIG——— For detecting the string frequency.
Integral circuit (A) eliminates the harmonics and, Comparator (@) turns the
ss! low paca eee
| for frequency detection.
extracts only positive portion of the waveform and, Comparator
heen tate (Chee Reser
For the velocity and note ON/OFF detection.
From Rectifier output, an integral circuit of a capacitor and a resistor extracts
the envelope signal only and, op amp (E) amplifiers the envelope signal.
(3) ENV
Actual waveforms at checkpoints ()~ ©) are shown on the next page.