DAQ system PCIe-FRM13 User manual

PCIe-FRM13
User Manual
Version 1.1
ⓒ2005 DAQ SYSTEM Co., Ltd. All rights reserved.
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All other trademarks or intellectual property mentioned herein belongs to their respective owners.
Information furnished by DAQ SYSTEM is believed to be accurate and reliable, However, no responsibility is assumed by DAQ SYSTEM for its use, nor
for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under
any patent or copyrights of DAQ SYSTEM.
The information in this document is subject to change without notice and no part of this document may be copied or reproduced without the prior
written consent.

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Contents
1. Introduction -------------------------------------------------------------------------- 3
1-1 Product Features ------------------------------------------------------------------------- 4
1-2 Product Application ------------------------------------------------------------------------- 5
2. PCIe-FRM13 Board Function
2-1 Board Block Diagram ------------------------------------------------------------------------ 6
2-2 FPGA Block Diagram ------------------------------------------------------------------------ 7
2-3 Camera Link ------------------------------------------------------------------------ 8
2-4 Camera Link Cable & Connector ----------------------------------------------------------- 10
2-5 Camera Link & PCIE-FRM13 ---------------------------------------------------------- 11
3. PCIe-FRM13 Board Description
3-1 Board Layout ------------------------------------------------------------------------ 13
3-2 Device Features ------------------------------------------------------------------------ 14
3-3 Connector Pin out ------------------------------------------------------------------------ 15
3-3-1 J1(MDR) Connector ----------------------------------------------------------------- 16
3-3-2 J5 Connector ------------------------------------------------------------------ 18
3-3-3 Dsub-15 Connector ----------------------------------------------------------------- 20
3-3-4 Mini-Circular Connector ---------------------------------------------------------- 21
3-3-5 J6 Switch --------------------------------------------------------------------- 22
3-4 Photo Coupler In/Out
3-4-1 Photo Coupler Input ---------------------------------------------------------- 23
3-4-2 Photo Coupler Output ---------------------------------------------------------- 24
4. Installation
4-1 Product Contents ----------------------------------------------------------------------- 25
4-2 Installation Process ------------------------------------------------------------------------ 25

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5. Sample Program
5-1 Image Frame Function ---------------------------------------------------------------------- 29
5-2 UART Function ----------------------------------------------------------------------- 33
5-3 Area/Line Scan ---------------------------------------------------------------------- 34
5-4 CC/Trigger Function ----------------------------------------------------------------------- 34
5-5 DIO Function ----------------------------------------------------------------------- 36
Appendix
A-1 Board Size --------------------------------------------------------------------- 37
A-2 Repair Regulations --------------------------------------------------------------------- 38
References ------------------------------------------------------------------------ 39

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1. Introduction
PCIe-FRM13 is an image acquisition device that supports cameras compatible with Base
configuration camera Link. PCIe-FRM11 acquires images in real time and transfers them directly to
system memory. The easy installation method and fast image transfer make it a suitable device to
meet the needs of the industry with low cost and high efficiency.
The sample program provided by the DQ system is provided in the form of a source so that the API
provided to use the board can be tested briefly, so the user can modify it and use it. Refer to Chapter
5 Sample Program for detailed explanation.
The MDR 26-pin connector can be connected to a Camera Link compatible camera, and the Mini-
Circular connector can supply the camera's power (12V). In addition, it has the function of external
control by providing 8 Digital Inputs and 8 Digital Outputs. Refer to 4.3 Connector Pin-Out for detailed
explanation.
Camera-link This is a board that transmits the captured image frame to the PC through the PCI
Express 1x interface method in conjunction with the standard camera. The operation of the board is
controlled by the program API, and the figure below shows the interlocking operation of the board.
[Figure 1-1. PCIe-FRM13 Board Usage]
In [Figure 1-1], PCIe-FRM13 is installed in the PCI Express slot in the PC and receives from the
camera through the image frame through the Camera-Link standard interface. It is responsible for
transmitting the received data to the application program through the PCI Express 1x GEN2 interface.
It is interfaced with external I/O through the 15Pin D-SUB connector on the left, and the mini-circular
connector in the middle can supply power to the camera, and the 26Pin MDR connector at the bottom
is connected to Camera-Link Camera to provide frame data and asynchronous (UART) to send and
receive communication data.

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1-1 Product Features
Items
Description
Remark
Hardware
PC Interface
PCI Express 1x GEN2
Operation Power
PC Power
+3.3V (Max 1.1A)
+12V (Max 1A).
Video Interface
Base Camera Link
Feature
Area/Line Scan Camera
Pixel Clock : 20 ~ 85MHz
External I/O
4-Ch. Digital In
8-Ch Digital Out
Digital Input :
Voltage Range : 9 ~ 24V
Current Range : 3.75mA (For 9V)
~ 10mA (For 24V)
Digital Output :
Voltage Range : ~ 7V
Current Range : Within 10mA
On-board Memory
256MB DDR3
Communication
UART(Data bit 8, 1 start, 1 stop, No
parity, 9600/19200/38400/57600
/115200bps)
Simultaneous use of
boards
Max. 4
Software
OS
Windows 2000/XP/7/8/10 (32/64bit)
API
Windows Client DLL API
Development
Support
Sample Program
VC++
Environmental conditions
Operating temperature
range
0 ~ 60℃
Storage temperature
range
-20 ~ 80℃
Humidity range
5 ~ 95%
Non-condensing
Board size
120.8mm X 68mm
PCB Board Size

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1-2 Product Applications
Image recognition (Pattern, particle, etc.)
Inspection equipment (Sensor, Semiconductor, Device etc.)
Black and White, Color Image Display
Medical Image Capture (X-ray, Supersonic etc.)

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2. PCIe-FRM13 Board Function
2-1 Board Block Diagram
As shown in the figure below, in the case of PCIe-FRM13, FPGA Core Logic is in charge of
overall control. Main functions include Frame Data reception, UART data transmission/reception
for this, Camera Control signal and external trigger.
These functions are performed using API in PC through PCI Express 1x GEN2 interface.
[Figure 2-1. PCIe-FRM13 Signal Block Diagram]

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2-2 FPGA Block Diagram
The FPGA core logic is programmed using JTAG, and the logic program is saved in FPGA
Program Logic and loaded when power is applied.
PCI Target
/ Master
PCI Express
1x BUS
Local Bus
Address
Data(Mem,I/O)
Reserved
(0x00 –0x5F)
Reserved
(0x70 –0xAF)
UART
(0x60)
Camera Link(LVDS)
(0xC0)
Interrupt controller
DIO
(0xD0)
Ext. Address, Data, Control
Local BUS
Interrupt
Controller
(0xb0)
INT sources in Chip
IO Decoder
MEM Decoder
To each IO
Module
PCIe-FRM13 INTERNAL BLOCK - FPGA
DPRAM
From Ext.
CLOCK syn.
MEM Decoder
BUS Mux
Reserved
(0xE0 –0xFF)
[Figure 2-2. PCIe-FRM11 FPGA Block Diagram]

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2-3 Camera Link
Camera Link is a communication interface developed for use in vision applications. In the past,
we used proprietary connectors and cables between camera makers and frame grabber makers.
This caused a lot of confusion and cost increase for users. In order to resolve this confusion,
increasing data rate, and confusion in data transmission, the specifications of the Camera Link
interface are the specifications of cable or connector assembly, transmission speed and It was
made with regulations such as transmission method.
Many digital video solutions today use Low Voltage Differential Signal (LVDS) communication
defined by RS-644. RS-644 LVDS has become the Camera Link standard by improving the existing
RS-422 method, which had inconvenient cables and limited transmission speed. LVDS can transmit
data at high speed by using a differential signal with a low voltage swing. Compared to the
existing single-ended signal using one line, the differential signal transmits the signal using two
complementary lines. This transmission structure has the characteristics of large-scale common-
phase voltage rejection, low power consumption, and excellent noise immunity, which is
impossible with single-ended systems that only reference ground for data transmission.
An advanced LVDS technology for the transmission of digital data is a Channel Link. The channel
link can transmit parallel-to-serial and serial-to-parallel at 2.38 Gbps. Referring to [Figure 2-3], the
transmitter converts 28-bit CMOS/TTL data into 4 LVDS data streams. The converted signal is
transmitted to the MDR cable according to the Transmit Clock, and the opposite receiver converts
these four LVDS data into a 28-bit CMOS/TTL parallel signal according to the Receive Clock. This
channel link technology is being used as a low-cost chipset that is easy to learn and portable, so
that it can be used immediately.
Camera Link interface includes Base Configuration, Medium Configuration, and Full
Configuration. Base Configuration uses four RS-644 LVDS pairs for transmitter/receiver and camera
control as shown in [Figure 2-3], and uses two RS-644 LVDS pairs for communication between
camera and frame grabber. The data transmitted serially through the 26-Pin MDR Cable is
changed to 28-bit parallel image data at the Receive end of the frame grabber and used.

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[Figure 2-3. Base Camera Link Block Diagram]