Endace EDM01-25 User manual

DAG 8.4I Card User Guide
EDM01-25

EDM01-25v4 DAG_8.4I_Card_User_Guide
©2008Endace Technology Ltd. Confidential - Version 3 - June 2008
Protection Against Harmful Interference
When present on equipment this manual pertains to, the statement "This device complies with part 15 of the FCC
rules" specifies the equipment has been tested and found to comply with the limits for a Class A digital device,
pursuant to Part 15 of the Federal Communications Commission [FCC] Rules.
These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment.
This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in
accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will
be required to correct the interference at their own expense.
Extra Components and Materials
The product that this manual pertains to may include extra components and materials that are not essential to its
basic operation, but are necessary to ensure compliance to the product standards required by the United States
Federal Communications Commission, and the European EMC Directive. Modification or removal of these
components and/or materials, is liable to cause non compliance to these standards, and in doing so invalidate the
user’s right to operate this equipment in a Class A industrial environment.
Disclaimer
Whilst every effort has been made to ensure accuracy, neither Endace Technology Limited nor any employee of
the company, shall be liable on any ground whatsoever to any party in respect of decisions or actions they may
make as a result of using this information.
Endace Technology Limited has taken great effort to verify the accuracy of this manual, but nothing herein should
be construed as a warranty and Endace shall not be liable for technical or editorial errors or omissions contained
herein.
In accordance with the Endace Technology Limited policy of continuing development, the information contained
herein is subject to change without notice.
Website
Copyright 2008 Endace Technology Ltd. All rights reserved.
http://www.endace.com
No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form or by any
means electronic, mechanical, photocopying, recording, or otherwise, without the prior written permission of the
Endace Technology Limited.
Endace, the Endace logo, Endace Accelerated, DAG, NinjaBox and NinjaProbe are trademarks or registered
trademarks in New Zealand, or other countries, of Endace Technology Limited. Applied Watch and the Applied
Watch logo are registered trademarks of Applied Watch Technologies LLC in the USA. All other product or
service names are the property of their respective owners. Product and company names used are for identification
purposes only and such use does not imply any agreement between Endace and any named company, or any
sponsorship or endorsement by any named company.
Use of the Endace products described in this document is subject to the Endace Terms of Trade and the Endace
End User License Agreement (EULA).

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Contents
Introduction 1
Overview .....................................................................................................................................................................1
Card Features..............................................................................................................................................................1
Purpose of this User Guide ....................................................................................................................................... 1
System Requirements................................................................................................................................................. 2
General ...................................................................................................................................................................2
Operating System ................................................................................................................................................. 2
Other Systems........................................................................................................................................................ 2
Card Description ........................................................................................................................................................ 3
Battery removal – don’t do it! .............................................................................................................................3
Card Architecture.......................................................................................................................................................4
InfiniBand network input and output ..................................................................................................................... 4
Installation 5
Introduction ................................................................................................................................................................5
DAG Software package .............................................................................................................................................5
Inserting the DAG Card ............................................................................................................................................5
Port Connectors .......................................................................................................................................................... 6
External power supply ..............................................................................................................................................6
Configuring the DAG card 7
Introduction ................................................................................................................................................................7
Before configuring the DAG card....................................................................................................................... 7
Firmware images .................................................................................................................................................. 7
Setting up the FPGA .................................................................................................................................................. 8
Programming the FPGA ...................................................................................................................................... 8
dagrom ...................................................................................................................................................................9
Loading new firmware images onto a DAG Card ......................................................................................... 10
Preparing the DAG card for use............................................................................................................................. 10
Configuring the DAG card...................................................................................................................................... 11
Display Current Configuration......................................................................................................................... 11
dagconfig tokens explained............................................................................................................................... 12
dagconfig options ............................................................................................................................................... 15
Viewing the DAG card status ................................................................................................................................. 16
Interface Status.................................................................................................................................................... 16
Extended Statistics.............................................................................................................................................. 17
Universal counters.............................................................................................................................................. 17
Using your DAG card to capture data 19
Introduction .............................................................................................................................................................. 19
Basic data capture..................................................................................................................................................... 19
Starting a capture session .................................................................................................................................. 19
dagsnap ................................................................................................................................................................ 20
Capturing data at high speed............................................................................................................................ 21
Viewing captured data ............................................................................................................................................ 22
dagbits .................................................................................................................................................................. 22
Additional capture feature...................................................................................................................................... 23
Dagconvert........................................................................................................................................................... 24
Using third party applications................................................................................................................................ 25
Classification 27
Overview ................................................................................................................................................................... 27
filter_loader application .......................................................................................................................................... 28
filter_loader operation........................................................................................................................................ 29

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Synchronizing Clock Time 31
Overview................................................................................................................................................................... 31
DUCK Configuration............................................................................................................................................... 31
Common Synchronization ...................................................................................................................................... 31
Network Time Protocol........................................................................................................................................... 32
Timestamps............................................................................................................................................................... 33
Example ............................................................................................................................................................... 33
Dagclock .................................................................................................................................................................... 34
Dagclock Statistics reset..................................................................................................................................... 35
Dagclock output explained ............................................................................................................................... 36
Card with Reference ................................................................................................................................................ 38
Overview ............................................................................................................................................................. 38
Pulse Signal from External Source ................................................................................................................... 38
Connecting the Time Distribution Server ....................................................................................................... 38
Testing the Signal ............................................................................................................................................... 38
Single Card No Reference....................................................................................................................................... 39
Two Cards No Reference ........................................................................................................................................ 40
Overview ............................................................................................................................................................. 40
Synchronizing with Each Other ....................................................................................................................... 40
Synchronizing with Host................................................................................................................................... 41
Connector Pin-outs .................................................................................................................................................. 42
Overview ............................................................................................................................................................. 42
Pin Assignments ................................................................................................................................................. 42
Data Formats 43
Overview................................................................................................................................................................... 43
Generic ERF Header ................................................................................................................................................ 44
ERF 21. TYPE_INFINIBAND............................................................................................................................ 46
Extension Headers (EH).......................................................................................................................................... 47
Introduction ........................................................................................................................................................ 47
EH 3. Classification ............................................................................................................................................ 48
Troubleshooting 49
Reporting Problems ................................................................................................................................................. 49
Version History 51

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Introduction
Overview
The Endace DAG 8.4I card provides the means to transfer data into the memory of the host
computer. Substantial buffering is provided to avoid packet loss in cases where data capture
is limited by the PCIe bus bandwidth. Further, unlike a Network Interface Card (NIC),
Endace products actively manage the movement of network data into memory while only
consuming a minimal amount of the host computer's resources. The full attention of the CPU
remains focused on the analysis of incoming data without a constant stream of interruptions
as new packets arrive from the network. For a busy network link, this feature has a turbo-
charging effect similar to that of adding a second CPU to the system.
The DAG 8.4I card is a two port, PCIe card that allows capture of data. It is designed for use
with the InfiniBand interface. It provides full-rate capture of SDRx4 2.5 Gigabits per second
(Single Data Rate) InfiniBand traffic with precision time stamping capability. The PCIe
interface enables a capture rate of up to 13 Gigabits per second.
Card Features
The following features are available on this DAG card. Note: Different firmware images
may be required. Not all features are available on each firmware image. For further
information on which feature is available in what firmware image, see Firmware images
7 (page ).
•SDRx4 InfiniBand
•Classification
Purpose of this User Guide
The purpose of this User Guide is to provide you with an understanding of the DAG 8.4I
card architecture, functionality and to guide you through the following:
•Installing the card and associated software and firmware
•Configuring the card for your specific network requirements
•Running a data capture session
•Synchronizing clock time
•Data formats
You can also find additional information relating to functions and features of the DAG 8.4I
card in the following documents which are available from the Support section of the Endace
website at http://www.endace.com
•EDM04-01 DAG Software Installation Guide
:
•EDM04-08 Configuration and Status API Programming Guide
•EDM04-19 DAG Programming Guide
•EDM05-01 Time Distribution Server User Guide
•EDM11-01 ERF types
This User Guide and the EDM04-01 DAG Software Installation Guide are also available in PDF
format on the installation CD shipped with your DAG 8.4I card.

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System Requirements
General
The minimum system requirements for the DAG 8.4I card are:
•A computer, with at least a Intel Xeon 1.8GHz or faster and a minimum of 1GB RAM.
•At least one free PCI-e slot supporting 8-lane operation.
•Software distribution requires 60MB free space.
•For details of the supported operating systems, see one of the following documents:
•EDM04-01 DAG Software Installation Guide
•Current release notes - See the Documentation CD or the Endace support website
at https://www.endace.com/support
.
•Requires 12V external power via 4.2mm Pitch Mini-Fit Jr , 6 way, (PCI Express Card
Power Connector).
Operating System
This document assumes you are installing the DAG 8.4I card in a computer which already
has an operating system installed. To install refer to EDM04-01 DAG Software Installation
Guide. All related documentation is included on the CD shipped with the DAG 8.4I card.
Other Systems
For advice on using an operating system that is substantially different from any of those
specified above, please contact Endace Customer Support at [email protected].

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Card Description
The Endace InfiniBand DAG 8.4I card is for use in InfiniBand networks running at 10
Gigabits per second over 4x copper cabling using single data rate (SDRx4, 2.5 Gigabits per
second). The interface to the computer is an 8-lane PCIe, which has a throughput (receive-
only) of 13 Gigabits per second.
The card has two inputs with InfiniBand 4x connectors. The DAG card can be used in:
•PORT mode, where each input is terminated at the DAG card, or
•TAP mode, where a single InfiniBand link passes through the card, and data is
sampled from both directions of the link.
The DAG 8.4I Card has an additional power supply socket. This must be connected to a 12 V
power supply using the supplied cable.
Note: For passive fail safe you required a NinjaITM. Please refer to EMD09-20 NinjaITM
User Guide.
The key features of the card are:
•User configurable dual channel network monitoring for InfiniBand networks.
•100% capture into host memory at up to 13 Gigabits per second
•Header only or variable length packet capture.
•SDRx4 InfiniBand network interface.
•Conditioned clock with one PPS input and local synchronization capability.
•8 Lane PCIe bus interface.
•A TCAM external to the FPGA for packet classification.
Battery removal – don’t do it!
Removing the battery from a DAG card voids your warranty.
Removing the battery from a DAG card will cause the loss of encryption key used to decode
the DAG card's firmware. Once the encryption key is lost the DAG card must be returned to
Endace for reprogramming.
The battery in this product is expected to last a minimum of 10 years.

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Caution
Risk of explosion if the battery is replaced by an incorrect type.
Dispose of used batteries carefully.
Card Architecture
SDRx4 Infiniband data, received by the two Infiniband interfaces, flows directly in to the
Field Programmable Gate Array (FPGA).
The FPGA contains the packet record processor and the DAG Universal Clock Kit (DUCK)
timestamp engine. The DUCK provides high resolution per-packet timestamps which can be
accurately synchronized.
Note: For further information on the DUCK and time synchronization see to
Synchronizing Clock Time 31(page ) later in this user guide.
Time stamped records are classified and can be optionally discarded without further
processing depending on classification results. Packets passing the classification process are
stored in an internal FIFO memory before transmission to the host.
The following diagram shows the card’s major components and the flow of data:
InfiniBand network input and output
InfiniBand I/O to and from the DAG card is through two InfiniBand 4x connectors mounted
on the bezel edge of the card. The two connectors are labeled A and B. Each input and
output consists of four signal pairs.
Pin assignment on the InfiniBand connectors follows the InfiniBand 4x standard. For further
details on the InfiniBand standard refer to the InfiniBand™ Architecture Release 1.2
(http://www.infinibandta.org
).

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Installation
Introduction
The DAG 8.4I card operates on an 8 lane PCIe bus and can be installed in any free 8 lane PCIe
slot. The PCIe bus allows multiple DAG cards to be installed without affecting the
bandwidth used by each DAG 8.4I card.
Best performance (13 Gigabits per second) can only be achieved using an 8-lane PCIe slot,
however the DAG card will function in a 4-lane PCIe slot.
DAG Software package
The latest DAG Software package must be installed before you install the DAG 8.4I card
itself. See EDM04-01 DAG Software Installation Guide, which is included on the CD shipped
with the DAG 8.4I card.
Inserting the DAG Card
Caution:
It is very important to protect both the computer and the DAG 8.4I card from
damage by electro-static discharge (ESD). Failure to do so could cause damage to
components and subsequently cause the card to partially or completely fail.
1. Turn power to the computer OFF.
2. Remove the PCIe bus slot screw and cover.
3. Using an approved ESD protection device attach the end with the strap to your wrist
and pull or clip firmly so there is firm contact with your wrist.
4. Securely attach the clip on the other end of the strap to a solid metal area on the
computer chassis as shown below.
5. Insert the DAG 8.4I card into PCIe bus slot ensuring it is firmly seated.
6. If this DAG card requires an external power supply, complete the following steps:
a. Connect the supplied (or equivalent) power cable to the external power connector
on the DAG card.
b. Connect the cable to the appropriate power connector on your server's power
supply unit.
7. Check the free end of the card fits securely into the card-end bracket that supports the
weight of the card.
8. Secure the card with the bus slot cover screw.
9. Turn power to the computer ON.
10. Ensure the blue (FPGA successfully programmed) LED on the DAG card illuminates.

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Port Connectors
The DAG 8.4I card is for use in InfiniBand networks running at 10 Gigabits per second over
4x copper cabling using single data rate (SDRx4, 2.5 Gigabits per second).
The card has two inputs with InfiniBand 4x connectors.
There is an 8-pin RJ-45 socket located near the InfiniBand connectors which is available for
connection to an external time synchronization source.
Caution:
Never connect an Ethernet network or telephone line to the RJ-45 sockets.
External power supply
The DAG 8.4I PCB has an additional power supply socket. This must be connected to a 12 V
power supply using the supplied cable.
Caution:
Prolonged operation of the DAG 8.4I card without this extra power supply
connected could damage parts of the card.
The current draw through this extra power connector is up to .
The external power supply connector is a 4.2mm Pitch Mini-Fit Jr , 6 way, (PCI Express Card
Power Connector).
Some modern PSU units have connectors on the power supply designed to fit directly to this.
Otherwise use the Endace supplied adapter cable to connects this input to a standard 5.25"
Drive power connector on the system power supply unit.

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Configuring the DAG card
Introduction
Configuring the DAG 8.4I card ready for capturing data requires the following steps:
•Setting up the FPGA 8(page )
•Preparing the DAG card for use 10(page )
•Configuring the DAG Card 11(page )
•Viewing the DAG card statistics 16(page )
Once the DAG 8.4I is configured you can start capturing data, see Using your DAG card to
capture data 19(page ) for details on capturing data.
Before configuring the DAG card
Before configuring the FPGA, you should ensure that:
•dagmem has been run and memory allocated to each installed DAG card.
•dagload has been run so that all DAG drivers have been installed.
Refer to the Installing the drivers section for the required Operating system in EDM04-01 DAG
Software Installation Guide for the further details.
Firmware images
The following lists the features available on each firmware image available on this DAG card.
FPGA image SDRx4 InfiniBand
dag84ipci_erf.bit
The software version strings are displayed in the dagconfig output and when using the
dagrom -x command. They include a version number and creation date.

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Setting up the FPGA
All DAG cards have at least one Field-Programmable Gate Array (FPGA). The FPGA
contains the firmware for the DAG card. The firmware defines how the DAG card operates
when capturing data and contains the specific configuration.
Note: Some DAG cards have multiple FPGA's.
For each FPGA there are two firmware images:
•a factory image - contains fixed basic functionality for operating the DAG card.
•a user image - contains an upgradable version of the DAG card firmware. Additional
functionality for the DAG card is available via the user image. Different user images
may be available with different functionality, i.e. TERF, DSM etc.
Firmware images are loaded into DAG card flash ROM in the factory. The image is
programmed into the FPGA each time the DAG card is powered up. The user image can
then be programmed into the FPGA either manually or via a script.
Programming the FPGA
Before configuring the DAG card for capture, you must load and program the DAG card
with the appropriate FPGA image.
Note: For information about the dagrom options, see dagrom 9(page ).
Load the appropriate FPGA image using dagrom as follows:
dagrom -d0 -rvp -f dag84ipci_erf.bit
(where "0" is the device number of the DAG card you wish to capture data from). The
filename of the FPGA image may differ from the above depending on the version
required.

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dagrom
dagrom is a software utility that enables you to configure the FPGA on Endace DAG cards.
The following is a list of options available in dagrom.
Option Description
-a,--alternate-half
Use alternate (stable) half. [Default is current half.] Factory / User.
-A,--entire-rom
Entire ROM. [Default is current half only.]
-b,--swid-rom-check
Check if there is a SWID on the ROM.
-c,--cpu-region <region>
Access CPU region: c=copro, b=boot, k=kernel, f=filesystem.
--continue
Continue on erase error.
-d,--device <device>
DAG device to use.
-e,--erase
Erase ROM. [Default is read.]
-F,--disable-cfi-fast
Disable fast program option for CFI mode.
-f,--file <filename>
File to be read when programming ROM. There are multiple FGPA images
per DAG card, covering the different versions, ERF, TERF DSM etc.
--force
Force loading firmware. Dangerous.
-g,--rom-number <rom>
Access specified ROM controller. [Default is 0.]
-h,--help
-?,--usage
This page.
-i,--halt-ixp
Halt the embedded IXP Processor (DAG 7.1S only).
--image-table-fpga
<image table fpga>
Specify the Power On image selection table FPGA number
--image-table-image
<image table image>
Specify the Power On image selection table Image number
-j,--swid-rom-check-key
<key>
Check the ROM SWID key with the one supplied.
-l,--hold-bus
Hold PBI bus from XScale (DAG 3.7T only).
-m,--swid-key <key>
Hexadecimal key for writing the Software ID (aka SWID).
-o,--swid-rom-read
Read SWID from ROM.
-p,--program-current
Program current User 1 Xilinx image into FPGA.
-q,--image-number
<image number>
Specify the image number to write or to program the card.[0 - 3]. 0 factory
image, 1 user image 1, 2 user image 2, 3 user image 3. (7.5G2/G4 only)
--swid-write <swid>
Write given SWID. The key must be supplied with the -m option, requires a
valid running XScale ROM Image. (3.7T, 3.7D, 3.8S and 7.1S only)
-r,--reprogram
Reprogram ROM (may imply erase and write).
--reset-method
<reprogram method>
Specify the method to reprogram the card.[1.Ringo 2.George 3.Dave]
-s,--swid-rom-write
<swid>
Write given SWID to ROM. The key must be supplied with the -m option.
-t,--swid-read-bytes
<bytes>
Read <bytes> of SWID, requires a valid running XScale ROM image (3.7T
only)
-u,--swid-erase
Erase SWID from ROM.
--unknown
Force loading firmware. Dangerous.
-v,--verbose
Increase verbosity.
-V,--version
Display version information.
-w,--write
Write ROM (implies erase). [Default is read.]
--write-out <filename>
Write the contents of the ROM to a file.
-x,--list-revisions
Display Xilinx revision strings (the default if no arguments are given).
-y,--verify
Verify write to ROM.
-z,--zero
Zero ROM. [Default is read.]
All commands apply to the current image portion of the ROM, unless one of the options -a,
-A, -c is specified.
Note: Not all commands are supported by all DAG cards.

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To view the FPGA image revision strings, type the following:
dagrom -d0 -x
where "0" is the device number of the DAG card you wish to capture data from
user: dag84ipci_erf_v2_1 5vlx110tff1738 2008/06/24 20:03:27 (active)
factory: dag84ipci_erf_pci_v2_7 5vlx110tff1738 2008/03/03 16:53:05
Loading new firmware images onto a DAG Card
New DAG card FPGA images are released regularly by Endace as part of software packages.
They can be downloaded from the Endace website at https://www.endace.com/support
The -r option invokes a comparison of images on the computer and in the DAG card. Newer
versions are automatically loaded onto the DAG card and programmed into the FPGA. See
.
Endace recommends you use the dagrom -r command when loading images from the
computer to the ROM on the DAG card.
dagrom 9(page ). This eliminates unnecessary reprogramming of the ROM and extends its
life.
Preparing the DAG card for use
Before configuring the DAG 8.4I card you must run the following dagconfig command to set
the default parameters in the DAG card. This ensures the DAG 8.4I card functions correctly
once you begin capturing data.
Note: Ensure you run this command each time the FPGA is reprogrammed.
dagconfig -d0 default
where "0" is the device number of the DAG card you wish to capture data from.
The current DAG 8.4I configuration displays and the firmware is verified as correctly loaded.
See dagconfig 15(page ) for more information.

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Configuring the DAG card
Display Current Configuration
Once you have loaded the FPGA image you should run the dagconfig tool without
arguments to display the current card configuration and verify the firmware has been loaded
correctly.
To display the default configuration for the first card, use:
dagconfig –d0
where "0" is the device number of the DAG card you wish to capture data from.
A description of available commands follows.
Note: Not all commands displayed in the following diagram.

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dagconfig tokens explained
align64
Sets the packets to be all generated as multiples of 8 bytes, 64-bit aligned, (align64) before
being received by the host. Not a configurable option.
buffer_size
The buffer size=nMB indicates that a total of nMB of memory have been allocated to the
DAG card in total. Memory allocation occurs when the dagmem driver is loaded at boot time.
See EDM04-01 DAG Software Installation Guide for details on how to allocate memory.
default
The default command initializes the DAG card configuration and sets all settings to
operations values. The command also resets the DAG card configuration back to its default
state.
Example
dagconfig default
drop_count
Note: The drop/nodrop setting for the DAG card determines where the packets are being
dropped.
Port/GPP (no drop)
The number of packets dropped during current capture session on this port. Resets to 0
when dagconfig reset is run.
enable/disable
Sets whether this DAG card captures data on the defined port (a or b).
Note: DAG ports are enabled by default. You do not need to use dagconfig to enable the
card in order to begin capture unless you have previously disabled it.
Example
dagconfig -d0 enablea
dagconfig -d0 disablea
dagconfig -d0 enableb
dagconfig -d0 disableb
where "0" is the device number of the DAG card you wish to capture data from
Note: On some firmware images changes to this option may not take effect.

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mem
You can split the DAG card's allocated memory between the receive and transmit stream
buffers to suit your own requirements. The split is displayed as a ratio as shown below:
mem=X:Y
where:
Xis the memory allocated in MB to the rx stream
Yis the memory allocated in MB to the tx stream.
If there are multiple rx or tx streams memory can be allocated to each stream:
mem=X:Y:X:Y:X:Y
Buffer_size 12(page ) and rx and tx Streams are related to mem.
Example
You can split 128MB of memory evenly between the tx and rx streams using:
dagconfig –d0 mem=64:64
Note: You can not change the stream memory allocations while packet capture or
transmission is in progress.
overlap/nooverlap
Configures the rx and tx memory hole to be overlapped. This enables in-line forwarding
without copying the data across the memory holes.
Example
dagconfig overlap
dagconfig nooverlap
Note: This option is only applicable on firmware images containing TX.
reset
Resets the ethernet framers, set auto mode.
Example
dagconfig -d0 reset
rxonly
Configures the memory hole to only receive.
Example
dagconfig rxonly
rxtx
Enables both transmit and receive, and splits the memory hole for rx and tx.
This allocates 16MB of memory to each transmit stream, and divides the remaining memory
between the receive streams.
Example
dagconfig rxtx
Note: This option is only applicable on firmware images containing TX.

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slen
Before you begin to capture data you can set the size that you want the captured packets to
be. You can do this using the dagconfig tool to define the packet snaplength (slen).
Note: The snaplength value must be a multiple of 8 and in the range 48 to 9600 per card
inclusive.
By default, slen is the portion of the packet that you want to capture is set to 48 per card.
This means that only the first 48 bytes of each packet will be captured. If you want to capture
the whole packet you need to set the length to a larger value.
Example
Setting up a DAG 8.4I card with a snap length of 200 bytes:
dagconfig -d0 slen=200
Note: The ERF header is not included in the slen value. Therefore a slen of 48 will
produce a 64-byte capture record made up of 48 bytes plus the number of bytes in
the ERF header.
txonly
Configures the memory hole to only transmit.
Note: Only displayed if the DAG card supports transmit (i.e. has a terf image).
Example
dagconfig txonly
Note: This option is only applicable on firmware images containing TX.
varlen
The DAG 8.4I uses variable length capture. This allows you to capture the whole packet,
providing its size is less than the slen value. Therefore to be effective you should set the slen
value to the largest number of bytes that a captured packet is likely to contain.
Any packet that is larger than the slen value will be truncated to that size. Any packet that is
smaller than the slen value will be captured at its actual size therefore producing a shorter
record which save bandwidth and storage space.
The example below shows a configuration for variable length full packet capture:
dagconfig –d0 slen=9600

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dagconfig options
dagconfig is a software utility used to configure and display statistics.
By default all commands, unless otherwise defined, run on device 0 (-d0). Commands only
apply to one DAG card.
The following is a list options available in dagconfig. Not all options listed are applicable to
all cards.
Options: Description
-1,--porta
Port A only (default all). Multi-port cards only.
-2,--portb Port B only (default all). Multi-port cards only.
-3,--portc
Port C only (default all). Four-port cards only.
-4,--portd
Port D only (default all). Four-port cards only.
--porte to --portp
As above, for extra ports on the 3.7T DAG card.
-c,--concfg <conncfg>
Connection configuration. Used by the DAG 7.1S only.
-C,--counters Outputs the counters. Verbosity levels from 0=(basic / default) to
3=(full).
-d,--device <device>
DAG device to use. Default is d0.
-e,--extended
Displays the current extended statistics (non boolean and image
dependant). Verbosity levels from 0=(basic / default) to 3=(full).
Note: Some images may not contain extended statistics.
-G,--getattribute <getattribute>
Gets individual attributes by attribute name. Use in conjunction with
the --porta or --portb options to get individual only multi-port cards.
-h,--help
Displays the MAN pages. The information displayed is dynamically
based on the DAG card and does not work correctly when there is no
DAG card in the system.
Note: There are a few commands that display even though they are not
applicable.
-i,--interval <seconds> Interval to repeat in seconds.
-m,--hmon
Outputs the hardware monitor information.
-n,--voltages
Outputs the DAG card voltage monitor information.
-S,--setattribute <setattribute>
Sets individual attributes by attribute name. Use in conjunction with
the --porta or --portb options to get individual only multi-port cards.
-s,--statistics
Outputs the statistics for the DAG card. Verbosity levels from 0=(basic
/ default) to 3=(full).
-T,--tree
Outputs the supported Configuration and Status attributes and
components with the description and name. Using the -v2 verbosity
level also outputs all components and attribute codes. Verbosity levels
from 0=(basic / default) to 3=(full).
-t,--txstats
Outputs the transmit statistics for the DAG card. Where applicable.
-u, --ucounters
Outputs the universal counters for the DAG card. Where applicable.
-v,--verbose <level> Sets the verbosity level, from 0 (basic) to 3 (full).
-V,--version
Display the DAG card version information.
Note: For cards with more than 2 ports you can select the required port using: -
(portnumber) or --(portletter).

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Viewing the DAG card status
Interface Status
When you have configured the card according to your specific requirements you can view
the interface statistics to check the status of each of the links using:
dagconfig –d0 –s
For more information see dagconfig (page 15).
There are multiple printout levels. The statistics displayed below are printout level 0.
Example outputs are shown below:
Note: “1” indicates the condition is present on the link “0” indicates the condition is not
present on the link.
Port
rx_byte_align
rx_channel_align
rx_link_up
A
0
0
0
B
0
0
0
rx_packet_error_latch
pll detect
GTP Reset Status
0
1
0
0
1
0
Status Conditions
A definition of each status condition up to printout level 2 is described below.
Condition Definition
GTP Reset Status
The GTP Reset for all the four lanes.
lane_zero_rx_byte_align
Rx Byte Align for lane zero.
lane_one_rx_byte_align
Rx Byte Align for lane one.
lane_two_rx_byte_align
Rx Byte Align for lane two.
lane_three_rx_byte_align
Rx Byte Align for lane three.
lane_zero_rx_channel_align
Rx Channel Align for lane zero.
lane_one_rx_channel_align
Rx Channel Align for lane one.
lane_two_rx_channel_align
Rx Channel Align for lane two.
lane_three_rx_channel_align
Rx Channel Align for lane three.
pll detect
The Phase Locked Loop detected for tile 0 and tile 1.
Port
Indicates the port the status conditions apply to.
rx_byte_align
Rx Byte Align for all four lanes.
rx_channel_align
Receive Channel Bonding for all four lanes.
rx_link_up
Indicates the receive link status. 0 = down, 1 = up.
rx_packet_error_latch
Rx Packet Error Latch.