Endace DAG 4.2S User manual

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EDM01-02: DAG 4.2S Card User Guide
©2005 i Version 7: May 2006
Published by:
Endace Measurement Systems
®
Ltd
Building 7
17 Lambie Drive
PO Box 76802
Manukau City 1702
New Zealand
Phone: [phone]
Fax: [phone]
[email protected]m
www.endace.com
International Locations
New Zealand
Endace Technology® Ltd
Level 9
85 Alexandra Street
PO Box 19246
Hamilton 2001
New Zealand
Phone: [phone]
Fax: [phone]
Americas
Endace USA® Ltd
Suite 220
11495 Sunset Hill Road
Reston
Virginia 20190
United States of America
Phone: ++1 703 382 0155
Fax: ++1 703 382 0155
Europe, Middle East & Africa
Endace Europe® Ltd
Sheraton House
Castle Park
Cambridge CB3 0AX
United Kingdom
Phone: ++44 1223 370 176
Fax: ++44 1223 370 040
Copyright 2005 ©All rights reserved. No part of this publication may be reproduced, stored in a retrieval
system, or transmitted, in any form or by any means electronic, mechanical, photocopying, recording, or otherwise,
without the prior written permission of the publisher.

EDM01-02: DAG 4.2S Card User Guide
©2005 ii Version 7: May 2006
Protection Against Harmful Interference
When present on equipment this manual pertains to, the statement "This device complies with part 15 of the FCC rules"
specifies the equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to Part 15
of the Federal Communications Commission [FCC] Rules.
These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a
commercial environment.
This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the
instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be
required to correct the interference at his own expense.
Extra Components and Materials
The product that this manual pertains to may include extra components and materials that are not essential to its basic
operation, but are necessary to ensure compliance to the product standards required by the United States Federal
Communications Commission, and the European EMC Directive. Modification or removal of these components and/or
materials, is liable to cause non compliance to these standards, and in doing so invalidate the user’s right to operate this
equipment in a Class A industrial environment.
Disclaimer
Whilst every effort has been made to ensure accuracy, neither Endace Measurement Systems Limited nor any employee of
the company, shall be liable on any ground whatsoever to any party in respect of decisions or actions they may make as a
result of using this information.
Endace Measurement Systems Limited has taken great effort to verify the accuracy of this manual, but assumes no
responsibility for any technical inaccuracies or typographical errors.
In accordance with the Endace Measurement Systems policy of continuing development, design and specifications are
subject to change without notice.

EDM01-02: DAG 4.2S Card User Guide
©2005 i Version 7: May 2006
Table of Contents
Chapter 1: Introduction 1
1.1 User Manual Purpose 1
1.2 DAG 4.2S Card Description 2
1.5 DAG 4.2S Card System Requirements 3
Chapter 2: Installation 5
2.2 Insert the Card into PC 5
2.3 DAG 4.2S Card Optical Connectors 6
Chapter 3: Setting Optical Power 7
3.1 DAG 4.2S Card Optical Power Input 7
3.2 Splitter Losses 8
Chapter 4: Confidence Testing 9
4.1 Interpreting DAG Card LED Status 9
4.2 DAG 4.2S Card Capture Session 10
4.4 DAG 4.2S Card Configuration Options 13
4.5 Inspect Links Data and Cells 16
4.6 Reporting Problems 18
Chapter 5: Running Data Capture Software 19
5.1 Starting Capture Session 19
5.2 High Load Performance 21
Chapter 6: Synchronizing Clock Time 23
6.1 Configurations Tool Usage 24
6.2 Time Synchronization Configurations 25
6.2.1 Single Card no Reference Time Synchronization 25
6.2.2 Two Cards no Reference Time Synchronization 26
6.2.3 Card with Reference Time Synchronization 27
6.3 Synchronization Connector Pin-outs 29
Chapter 7:Data Formats 31
7.1 Data Formats 31
7.2 Timestamps 34

EDM01-02: DAG 4.2S Card User Guide
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EDM01-02: DAG 4.2S Card User Guide
©2005 1 Version 7: May 2006
Chapter 1: Introduction
Introduction
The installation of the Endace DAG card on a PC begins with installing the
operating system and the Endace software.
Viewing this
document
This document, DAG 4.2S Card User Manual is available when the
installation CD is placed in a running Windows PC.
In this chapter
This chapter covers the following sections of information.
User Manual Purpose
DAG 4.2S Card Description
DAG 4.2S Card Architec t ure
DAG 4.2S Card Extended Functions
DAG 4.2S Card System Requirements
1.1 User Manual Purpose
Description
The purpose of this DAG Card User Manual is to describe:
Installing DAG 4.2S card
Setting Optical Power
DAG 4.2S Card Confidence Testing
Running Data Capture Software
Synchronizing Clock Time
Data Formats
Prerequisite
This document presumes the DAG card is being installed in a PC already
configured with an operating system.
A copy of Debian Linux 3.1 [Sarge] is available as a bootable ISO image
on one of the CD's shipped with the DAG card.
To install on the Linux/FreeBSD operating system, follow the instructions
in the document EDM04.06-01 Linux FreeBSD Installation Manual,
packaged in the CD shipped with the DAG card.
To install on a Windows operating system, follow the instructions in the
document EDM04.06-02 Windows Installation Manual, packaged in the
CD shipped with the DAG card.

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1.2 DAG 4.2S Card Description
Description
The DAG 4.2S single interface OC-48c/STM-16c card is capable of cell
and packet capture and generation on IP networks.
Description
Figure 1-1 shows the DAG 4.2S PCI card.
Figure 1-1. DAG 4.2S PCI Card.
1.3 DAG 4.2S Card Architecture
Description
Serial SONET optical data is received by the DAG 4.2S card optical
interface, and fed through a demultiplexor into a physical layer ASIC. The
packet data is then fed immediately into the Xilinx FPGA. This FPGA
contains the DUCK timestamp engine, packet record processor, and PCI
interface logic.
The close association of these two components means that packets or cells
can be time-stamped very accurately. Time stamped packet or cell records
are then stored in an external FIFO before transmission to the host.

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Figure
Figure 1-2 shows the DAG 4.2S card major components and data flow.
Figure 1-2. DAG 4.2S Card Major Components and Data Flows.
1.5 DAG 4.2S Card System Requirements
Description
The DAG 4.2S card and associated data capture system minimum
operating requirements are:
•PC, at least Pentium III 800MHz or faster
•Intel i840, ServerWorks III LE/HE or newer chip set
•Minimum of 128 MB RAM
•At least one free 64-bit 3.3v signaling only PCI slot with 3.3V and 5V
power
•Software distribution requires 30MB free space
•Endace Linux Install CD requires 6 GB
Operating
system
For convenience, a Debian 3.1 [Sarge] Linux system is included on the
Endace Software Install CD. Endace currently supports Windows XP,
Windows Server 2000, Windows Server 2003, FreeBSD, RHEL 3.0, and
Debian Linux operating systems.
Different
system
For advice on using a system substantially different from that specified
above, contact Endace support at [email protected]

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EDM01-02: DAG 4.2S Card User Guide
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Chapter 2: Installation
Introduction
A DAG 4.2S card can be installed in any free 3.3v signalling 64-bit Bus
Mastering PCI slot. The DAG 4.2S card is capable of running at 66MHz,
but if any other device on the same bus is not capable of 66MHz operation
then all devices on the bus will operate at 33MHz.
Although by default, the driver supports up to four DAG cards in one
system, there should not be more than two cards on a single PCI bus due to
bandwidth limitations. However, this is not usually a limitation as for most
applications a maximum of two cards only can be used with reasonable
application performance.
In this chapter
This chapter covers the following sections of information.
Insta l lation of Operating System and Endace Software
Insert the Card into PC
DAG 4.2S Card Optical Connectors
2.1 Installation of Operating System and Endace Software
Description
If the DAG device driver is not installed, before proceeding with the next
chapter, install the software on Linux/FreeBSD operating systems by
following the instructions in EDM04-01 Linux/FreeBSD Installation
Guide.
To install the software on a Windows operating system, follow the
instructions in EDM04-02 Windows Installation Guide.
Go to the next section of information when the DAG device driver is
installed.
2.2 Insert the Card into PC
Description
Inserting the DAG 4.2S card into a PC involves accessing the bus slot,
fitting the card, and replacing bus slot screw.
Procedure
Follow these steps to insert the DAG 4.2S card.
Step 1. Access bus Slot
Power computer down.
Remove PCI bus slot cover.

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Procedure (continued)
Step 2. Fit Card
Insert into PCI bus slot.
Step 3. Replace bus Slot Screw
Secure card with screw.
Step 4. Power up Computer
2.3 DAG 4.2S Card Optical Connectors
Description
The DAG 4.2S card has two SC-type optical connectors. The bottom
connector nearest the PCI slot is for the received signal, the top is for the
transmitted signal.
The transmit port is only connected if the loop back facility being used in
the DAG to daisy chain systems, or if a data generation program being
used.
If the Tx port of the DAG 4.2S card is not used, the SC-type transceiver
optics should be covered to prevent ingress of dust.
An 8-pin RJ45 socket is used for time synchronization. This socket should
never be connected to an Ethernet network or telephone line.
Figure
Figure 2-1 shows the DAG 4.2S card SC-type optical connectors.
Figure 2-1. DAG 4.2S Card SC-type Optical Connectors.

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Chapter 3: Setting Optical Power
Introduction
The optical power range depends on the particular device fitted on the
DAG 4.2S card.
The DAG 4.2S card is shipped fitted with HFCT 5402D 1300nm single-
mode short range optics module by default.
Optical power
measure
Optical power is measured in dBm – decibels relative to 1 mW where 10
dB is equivalent to a factor of 10 in power.
The numbers are all negative, showing powers below 1 mW. The most
sensitive devices can work down to about –30 dBm, or 1 uW.
Configuration
The following table describes the DAG 4.2S card optics power module
part, single-mode fibre [SMF], and configuration.
Part No. Fibre Data Rate Max Pwr
[dBm] Min Pwr [dBm] Nominal pwr [dBm]
HFCT 5402D SMF 2488 -3 -18.5 -14
MMF: Multi-Mode Fibre SMF: Single-Mode Fibre
In this chapter
This chapter covers the following sections of information.
DAG 4.2S Card Optical Power Input
Splitter Losses
3.1 DAG 4.2S Card Optical Power Input
Description
The optical power input to the DAG 4.2S card must be within a receiver’s
dynamic range.
When optical power is slightly out of range an increased bit error rate is
experienced. If power is well out of range the system cannot lock onto the
SONET frames. In extreme cases of being out range excess power will
damage a receiver.
When power is above the upper limit the optical receiver saturates and
fails to function. When power is below the lower limit the bit error rate
increases until the device is unable to obtain lock and fails.
Input power
When the DAG card is set up, measure the optical power at the receiver
and ensure that it is within the specified power range. The recommended
power is -14 dBm.
Input power is adjusted by:
Changing splitter ratio if power is too high or too low, or
Inserting an optical attenuator if power is too high.

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3.2 Splitter Losses
Description
Splitters have the insertion losses marked on packaging or in
accompanying documentation.
A 50:50 splitter will have an insertion loss of between 3 dBm and 4 dBm
on each output
90:10 splitter will have losses of about 10 dBm in the high loss output,
and <2 dBm in the low loss output
Single mode
fibre loss
A single mode fibre connected to a multi-mode input has minimal extra
loss.
Multi-mode
fibre loss
A multi-mode fibre connected to a single mode input creates large and
unpredictable loss.
Wavelength loss
Splitters are designed for a particular wavelength. When mismatched, the
split ratio will be different from that which was intended.

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Chapter 4: Confidence Testing
Introduction
The confidence testing is a process to determine whether the DAG 4.2S
card is functioning correctly. The process also involves a card capture
session, and demonstrates configuration in the style of 'What You See You
Can Change', WYSYCC. Interface statistics are also inspected during this
process.
In this chapter
This chapter covers the following sections of information.
Interpreting DAG Card LED Status
DAG 4.2S Card Capture Session
DAG 4.2S Card Configuration in WYSYCC Style
DAG 4.2S Card Configuration Options
Inspect Links Data and Cells
Reporting Problems
4.1 Interpreting DAG Card LED Status
Description
The DAG 4.2S card has a block of 6 status LEDs, one blue, one yellow,
two green, one red and one orange.
Figure
Figure 4-2 shows the DAG 4.2S card status LEDs.
Figure 4-2. DAG 4.2S Card Status LEDs.
LED definitions
The following table describes the LED definitions.
LED Description
LED 1 - Blue FPGA successfully programmed.
LED 2 - Yellow Data capture in progress.
LED 3 - Green PPS synchronisation signal, flashes with valid input
signal.
LED 4 - Red Transmitter laser ON.
LED 5 - Green SD. Signal Detect, valid optical signal seen by the
optical receiver.
LED 6 - Orange LOF. Loss of Frame synchronization alarm, usually
caused by loss of signal.

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Description
When the DAG 4.2S card is powered up for a capture session the top left
LED 1 should always come on, and:
•LED 2 indicates when a packet capture session is in progress.
•LED 3 flashes if a PPS signal is being received by the card.
•LED 4 is only on if the laser is turned on with the dagfour utility.
When an OC-48c optical signal is applied.
•LED 5 should go on.
•LED 6 should go out.
Figure
Figure 4-3 shows the correct LED state for the DAG 4.2S card without
optical input.
Figure 4-3. DAG 4.2S Card Correct LED Status Without Optical Input.
Description
The dagfour utility supports configuration status and physical layer
interface statistics for the DAG 4.2S card.
In a troubleshooting configuration options –si should be passed to the tool
to watch the operational status of the optical, SONET and framing layers.
More details about the meaning of the various bits are supplied through the
help page ( dagfour –h) as well as via the manual page.
4.2 DAG 4.2S Card Capture Session
Description
The DAG 4.2S card uses a VSC9112 SONET ATM/PoS physical layer
interface device to support capturing of ATM cells and HDLC encoded
Packet-over-SONET data frames.
The card supports both OC-48c and STM-16c standards.
A successful DAG 4.2S card capture session is accomplished by checking
the receiver ports optical signal levels and checking the card has correctly
detected the link. This is followed by configuring DAG for normal use.

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Procedure
Follow these steps to troubleshoot DAG 4.2S card configuration.
Step 1. Check Receiver Ports Optical Signal Levels.
The card supports 1300 nanometer single-mode fibre attachments with
optical signal strength between 0 dBm and -18 dBm.
If in doubt, check card receiver ports light levels are correct using an optical
power meter.
The card receiver ports are the lower half of the dual SC-style connector, the
closest to the LED’s.
Cover the unused card transmit port with an SC-style plug to prevent dust
and mechanical hazards from damaging optics.
Step 2. Understand Link Layer Configuration
Learn about the link layer configuration in use at the network link being
monitored.
Important parameters include specific scrambling options in use.
If the information cannot be obtained reliably, the card can be made to work
by varying the parameters until data is arriving at the host system.
Step 3. Check Card is Locked to Data Stream
Configure card according to local settings.
Check through the physical layer statistics that the card is locked to the data
stream.
Step 4. List Current Settings
For DAG 4.2S framer configuration and statistics the dagfour tool is
supplied.
Calling dagfour without arguments lists current settings.
The dagfour -h prints a help listing on tool usage.
Step 5. Check FPGA Image Loaded.
Before configuring the card, ensure the most recent FPGA image is loaded
on the card.

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Procedure , continued
dag@endace:~$ dagrom -rvp –d dag0 -f xilinx/dag423pcix-erf.bit
dag@endace:~$ dagfour -d dag0
light nolaser nomuxfcl nomuxeql
link PoS noreset OC48c nofcl noeql
sonet slave scramble
PoS nopmin nopmax nodiscard crc32 pscramble norxpkts notxpkts
long=1500 short=40
packet varlen slen=48
packetA drop=0
pci 66MHz 64-bit buf=128Mb rxstreams=1 txstreams=0 mem=128:0
Step 6. Configure DAG for Normal Use
The dagfour default command is always used:
dag@endace:~$ dagfour default
light nolaser nomuxfcl nomuxeql
link PoS noreset OC48c nofcl noeql
sonet slave scramble
PoS nopmin nopmax nodiscard crc32 pscramble norxpkts notxpkts
txrclk=78MHz long=61440 short=40
packet varlen slen=48
packetA drop=0
pci 66MHz 64-bit buf=128Mb rxstreams=1 txstreams=0 mem=128:0
4.3 DAG 4.2S Card Configuration in WYSYCC Style
Description
The configuration of the tool works in WYSIWYC style – what you see is
what you can change.
To turn on the card’s laser for instance, type:
dag@endace:~$ dagfour -d dag0 laser
light laser nomuxfcl nomuxeql
link PoS noreset OC48c nofcl noeql
sonet slave scramble
PoS nopmin nopmax nodiscard crc32 pscramble rxpkts txpkts
txrclk=78MHz long=61440 short=40
packet varlen slen=48
packetA drop=0
pci 66MHz 64-bit buf=128Mb rxstreams=1 txstreams=0 mem=128:0

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ATM status
In ATM mode, the status output changes:
dag@endace:~$ dagfour -d dag0 atm
light laser nomuxfcl nomuxeql
link ATM noreset OC48c fcl noeql
sonet slave scramble
packetA drop=0
pci 66MHz 64-bit buf=128Mb rxstreams=1 txstreams=0 mem=128:0
For configuration options removing or adding the
no prefix will change the
setting.
4.4 DAG 4.2S Card Configuration Options
Description
There are many DAG 4.2S card configuration options supported.
default
set framer to normal defaults
[no]laser
dis/enable transmit laser
atm
set framer into ATM mode
pos
set framer into Packet-over-SONET (PoS) mode
[no]muxfcl
(un)set facility loopback in the MUX
[no]muxeql
(un)set equipment loopback in the MUX
[no]reset
hold/release framer (in) reset
oc48c
set framer to OC48c mode
[no]fcl
(un)set facility loop back in the phy. This is
useful for card chaining
[no]eql
(un)set equipment loop back in the phy
[no]scramble
(un)set SONET scrambling
master
set card to SONET clock master
slave
set card to SONET clock slave
[no]pscramble
(un)set Packet-over-SONET scrambling
[non]discard
(un)set discard of FCS mismatched PoS packets
crc16
PoS CRC16 link
crc32
PoS CRC32 link
[no]pmin
dis/enable discard of packets smaller than a
predefined minimum size
[no]pmax
dis/enable discard of packets larger than a
predefined maximum size
[no]rxpkts
dis/enable packet reception
[no]txpkts
dis/enable packet transmission
[no]txrclk
dis/enable packet transmission

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slen=X
capture X bytes of packet data.
[no]varlen
dis/enable variable length capture. Otherwise
record length padded to slen. Defaults to varlen.
Inspect
interface
statistics
Once the card has been configured as expected, the interface statistics
should be inspected to see if the card is locked to the data stream.
dag@endace:~$ dagfour -d dag0 –si
The tool will display a number of status bits as they have occurred since
the last time read. In the following example, the interval is set to one
second via the -i option.
Status bits
display
LoS
Loss of signal.
If set, this indicates that there is either no signal at
the receiver or the optical signal strength is too low
to be recognized.
OoF
Out of frame.
If set, the section overhead processor is not locked
to the SONET stream.
LoF
Loss of frame.
If set, Oof had been asserted for more than 3
milliseconds.
SectionBIP
SONET/SDH Section Bit Interleaved Parity error.
The link is impaired, check connections and optical
signal level.
LineBIP
SONET/SDH Line Bit Interleaved Parity error. The
link is impaired, check connections and optical
signal level.
LineFEBE
SONET/SDH Line Far End Bit Error. The link is
impaired, check connections and optical signal
level.
PathBIP
SONET/SDH Path Bit Interleaved Parity error. The
link is impaired, check connections and optical
signal level.
PathFEBE
SONET/SDH Path Far End Bit Error. The link is
impaired, check connections and optical signal
level.

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POS mode
In POS mode, the following columns are present:
RxFrames
Number of PoS frames received since last reading.
RxBytes
Number of PoS payload bytes received since last
reading.
ATM mode
In ATM mode, the following columns are present:
LCD
Loss of Cell Delineation. The framer cannot lock
onto the ATM cells.
RxCells
Number of non-idle ATM cells received since last
reading.
Extra counters
These extra counters are available with the extended statistics option:
dagfour –ei
Abort
Number of PoS frames aborted since last reading.
FCSErr
Number of PoS frames with FCS errors since last
reading.
Invalid
Number of Invalid PoS frames received since last
reading.
Path_Label SONET/SDH C2 byte value or Path Signal Label.
Typically 0x13 for ATM, 0x16 for PPP, and 0xCF
for Cisco HDLC POS.
PoS OC-48
stream example
An example for a card locked to a PoS OC-48c stream carrying a constant
traffic load is:
LoS OoF LoF SectionBIP LineBIP LineFEBE PathBIP PathFEBE RxFrames RxBytes
0 0 0 335492 56699364 9083393 619149 397 22030639 4294901759
0 0 0 0 0 0 0 0 150316 5712008
0 0 0 0 0 0 0 0 151025 5738950
0 0 0 0 0 0 0 0 151026 5738988
The first second has high values as the counters have accumulated their
values over more than one second.