Endace DAG 3.7D User manual

DAG 3.7D Card User Guide
EDM01-16

EDM01-16v5 DAG_3.7D_Card_User_Guide
©2005-2008 Endace Technology Ltd. Confidential - Version 5 - November 2008
Protection Against Harmful Interference
When present on equipment this manual pertains to, the statement "This device complies with part 15 of the FCC
rules" specifies the equipment has been tested and found to comply with the limits for a Class A digital device,
pursuant to Part 15 of the Federal Communications Commission [FCC] Rules.
These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment.
This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in
accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will
be required to correct the interference at their own expense.
Extra Components and Materials
The product that this manual pertains to may include extra components and materials that are not essential to its
basic operation, but are necessary to ensure compliance to the product standards required by the United States
Federal Communications Commission, and the European EMC Directive. Modification or removal of these
components and/or materials, is liable to cause non compliance to these standards, and in doing so invalidate the
user’s right to operate this equipment in a Class A industrial environment.
Disclaimer
Whilst every effort has been made to ensure accuracy, neither Endace Technology Limited nor any employee of
the company, shall be liable on any ground whatsoever to any party in respect of decisions or actions they may
make as a result of using this information.
Endace Technology Limited has taken great effort to verify the accuracy of this manual, but nothing herein should
be construed as a warranty and Endace shall not be liable for technical or editorial errors or omissions contained
herein.
In accordance with the Endace Technology Limited policy of continuing development, the information contained
herein is subject to change without notice.
Website
Copyright 2005-2008 Endace Technology Ltd. All rights reserved.
http://www.endace.com
No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form or by any
means electronic, mechanical, photocopying, recording, or otherwise, without the prior written permission of the
Endace Technology Limited.
Endace, the Endace logo, Endace Accelerated, DAG, NinjaBox and NinjaProbe are trademarks or registered
trademarks in New Zealand, or other countries, of Endace Technology Limited. Applied Watch and the Applied
Watch logo are registered trademarks of Applied Watch Technologies LLC in the USA. All other product or
service names are the property of their respective owners. Product and company names used are for identification
purposes only and such use does not imply any agreement between Endace and any named company, or any
sponsorship or endorsement by any named company.
Use of the Endace products described in this document is subject to the Endace Terms of Trade and the Endace
End User License Agreement (EULA).

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Contents
Introduction 1
Overview .....................................................................................................................................................................1
Card Features..............................................................................................................................................................1
Purpose of this User Guide ....................................................................................................................................... 1
System Requirements.................................................................................................................................................2
General ...................................................................................................................................................................2
Operating System ................................................................................................................................................. 2
Other Systems........................................................................................................................................................ 2
Card Description ........................................................................................................................................................ 3
Battery removal – don’t do it! .............................................................................................................................3
Card Architecture.......................................................................................................................................................4
Line Types ...................................................................................................................................................................5
Supported Types................................................................................................................................................... 5
Installation 7
Introduction ................................................................................................................................................................7
DAG Software package .............................................................................................................................................7
Inserting the DAG Card ............................................................................................................................................7
Port Connectors .......................................................................................................................................................... 8
Coaxial Transceivers .................................................................................................................................................. 9
Connecting to the Network....................................................................................................................................... 9
Router .....................................................................................................................................................................9
DSX-3 Tap ..............................................................................................................................................................9
Configuring the DAG card 11
Introduction .............................................................................................................................................................. 11
Before configuring the DAG card..................................................................................................................... 11
Firmware images ................................................................................................................................................ 11
Full Line Rate Configuration............................................................................................................................. 12
E3 Fractional Configuration .............................................................................................................................. 12
Kentrox Subrate Configuration......................................................................................................................... 12
Setting up the FPGA ................................................................................................................................................ 13
Programming the FPGA .................................................................................................................................... 13
dagrom ................................................................................................................................................................. 14
Loading new firmware images onto a DAG Card ......................................................................................... 15
Preparing the DAG card for use............................................................................................................................. 15
Configuring the DAG card...................................................................................................................................... 16
Display Current Configuration......................................................................................................................... 16
dagconfig tokens explained............................................................................................................................... 21
dagconfig options ............................................................................................................................................... 28
dagthree options ................................................................................................................................................. 29
Viewing the DAG card status ................................................................................................................................. 30
Interface Status.................................................................................................................................................... 30
Extended status ................................................................................................................................................... 30
Using your DAG card to capture data 31
Introduction .............................................................................................................................................................. 31
Basic data capture..................................................................................................................................................... 31
Starting a capture session .................................................................................................................................. 31
dagsnap ................................................................................................................................................................ 32
Capturing data at high speed............................................................................................................................ 33
Viewing captured data ............................................................................................................................................ 34
dagbits .................................................................................................................................................................. 34
Converting captured data ....................................................................................................................................... 36
Dagconvert........................................................................................................................................................... 37

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Using third party applications ............................................................................................................................... 38
Synchronizing Clock Time 39
Overview................................................................................................................................................................... 39
DUCK Configuration............................................................................................................................................... 39
Common Synchronization ...................................................................................................................................... 39
Network Time Protocol........................................................................................................................................... 40
Timestamps............................................................................................................................................................... 41
Example ............................................................................................................................................................... 41
Dagclock .................................................................................................................................................................... 42
Dagclock Statistics reset..................................................................................................................................... 43
Dagclock output explained ............................................................................................................................... 44
Card with Reference ................................................................................................................................................ 46
Overview ............................................................................................................................................................. 46
Pulse Signal from External Source ................................................................................................................... 46
Connecting the Time Distribution Server ....................................................................................................... 46
Testing the Signal ............................................................................................................................................... 46
Single Card No Reference....................................................................................................................................... 47
Two Cards No Reference ........................................................................................................................................ 48
Overview ............................................................................................................................................................. 48
Synchronizing with Each Other ....................................................................................................................... 48
Synchronizing with Host................................................................................................................................... 49
Connector Pin-outs .................................................................................................................................................. 50
Overview ............................................................................................................................................................. 50
Pin Assignments ................................................................................................................................................. 50
Data Formats 51
Overview................................................................................................................................................................... 51
Generic ERF Header ................................................................................................................................................ 52
ERF 1. TYPE_POS_HDLC....................................................................................................................................... 54
ERF 3. TYPE_ATM................................................................................................................................................... 55
Extension Headers (EH).......................................................................................................................................... 56
Introduction ........................................................................................................................................................ 56
Troubleshooting 57
Reporting Problems ................................................................................................................................................. 57
Version History 59

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Introduction
Overview
The Endace DAG 3.7D card provides the means to transfer data at the full speed of the
network into the memory of the host PC, with zero packet loss in even worst-case conditions.
Further, unlike a Network Interface Card (NIC), Endace products actively manage the
movement of network data into memory while only consuming a minimal amount of the
host computer's resources. The full attention of the CPU remains focused on the analysis of
incoming data without a constant stream of interruptions as new packets arrive from the
network. For a busy network link, this feature has a turbo-charging effect similar to that of
adding a second CPU to the system.
The DAG 3.7D is a two port. PCI card that allows capture and transmission of data. It
supports packet and cell capture for DS3/E3, ATM and HDLC networks. It has two
interfaces which may be used simultaneously to allow a single card to monitor either one or
both directions of a full duplex link.
Card Features
The following features are available on this DAG card. Note: Different firmware images
may be required. Not all features are available on each firmware image. For further
information on which feature is available in what firmware image, see Firmware images
11
(page ).
•DS3, E3, ATM and HDLC
•Frame Relay
•Kentrox Subrate
•Cisco Fractional
Purpose of this User Guide
The purpose of this User Guide is to provide you with an understanding of the DAG 3.7D
card architecture, functionality and to guide you through the following:
•Installing the card and associated software and firmware
•Configuring the card for your specific network requirements
•Running a data capture session
•Synchronizing clock time
•Data formats
You can also find additional information relating to functions and features of the DAG 3.7D
card in the following documents which are available from the Support section of the Endace
website at http://www.endace.com
•EDM04-01 DAG Software Installation Guide
:
•EDM04-03 dagflood User Manual
•EDM04-04 dagfwddemo User Guide
•EDM04-06 Daggen User Guide
•EDM04-08 Configuration and Status API Programming Guide
•EDM04-19 DAG Programming Guide
•EDM05-01 Time Distribution Server User Guide
•EDM11-01 ERF types
This User Guide and the EDM04-01 DAG Software Installation Guide are also available in PDF
format on the installation CD shipped with your DAG 3.7D card.

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System Requirements
General
The minimum system requirements for the DAG 3.7D card are:
•A computer, with at least a Intel Xeon 1.8GHz or faster and a minimum of 1GB RAM.
•At least one free PCI slot supporting 33 MHz operation.
•Software distribution requires 60MB free space.
•For details of the supported operating systems, see one of the following documents:
•EDM04-01 DAG Software Installation Guide
•Current release notes - See the Documentation CD or the Endace support website
at https://www.endace.com/support
.
Operating System
This document assumes you are installing the DAG 3.7D card in a computer which already
has an operating system installed. To install refer to EDM04-01 DAG Software Installation
Guide. All related documentation is included on the CD shipped with the DAG 3.7D card.
Other Systems
For advice on using an operating system that is substantially different from any of those

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Card Description
The DAG 3.7D card has two DS3/E3 co-axial interfaces each of which are able to receive and
transmit. It is capable of capturing 100% of traffic at full line rate over ATM, HDLC, frame
relay and channelized networks.
Note: Transmit is not currently supported on the DAG 3.7D card.
The DAG 3.7D supports Kentrox format subrate DS3 but requires a specific image to do so.
The DAG 3.7D card is shown below:
The key features of the card are:
•Four SMB format DS3/E3 network interfaces (2 x receive, 2 x transmit).
•100% capture into host memory of IP packets between 40 and 1500 bytes.
•Supports DSX-3 monitor mode.
•Full, header only, or variable length packet capture.
•Conditioned clock with 1-PPS input and local synchronization capability.
•32-bit 33MHz PCI 2.9 compliant bus interface with 3.3V signalling.
Battery removal – don’t do it!
Removing the battery from a DAG card voids your warranty.
Removing the battery from a DAG card will cause the loss of encryption key used to decode
the DAG card's firmware. Once the encryption key is lost the DAG card must be returned to
Endace for reprogramming.
The battery in this product is expected to last a minimum of 10 years.
Caution
Risk of explosion if the battery is replaced by an incorrect type.
Dispose of used batteries carefully.

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Card Architecture
Serial PDH data received by the two coaxial interfaces feeds into the dual DS3/E3 framer.
The network data is then directed to the Field Programmable Gate Array (FPGA). The FPGA
also contains the DAG Universal Clock Kit (DUCK) timestamp engine which provides high
resolution per-packet timestamps which can be accurately synchronized.
The close association of these two components means that packets or cells can be time-
stamped very accurately. The time stamped packet records are stored in the FIFO which
interfaces to the PCI bus via the FPGA.
Note: For further information on the DUCK and time synchronizing, see Synchronizing
Clock Time 39(page ).
All packet records are written to host PC memory during capture operations.
The diagram below shows the DAG 3.7D card's major components and flow of data:

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Line Types
It is important that you understand the physical characteristics of the network to which you
want to connect. If your configuration settings do not match your network, the DAG 3.7D
card will not function as expected.
There are various Ethernet line speeds and corresponding protocols which are identified
using the IEEE naming convention. Each line speed has a set of requirements associated with
it relating to the type of cable, maximum allowable distance, etc.
Note: If you are unsure about which of the options listed below to apply to your network,
please contact your Network Administrator for further information.
Supported Types
The line characteristics supported by the DAG 3.7D card are described below.
Line Types Description
DS3 Digital Signal 3 - North American digital standard 44.736Mbps (also referred to as
T3).
E3 European digital standard 34.38Mbps
Line Rate Description
Full The full speed of the network, either DS3 or E3 as described above.
Fractional A fraction of the full speed of the network. There are several proprietary fractional
rates available. Please contact your network provider for further details.
The DAG 3.7D supports fractional E3 only and the rate is represented as the
number of timeslots used out of a possible 95.
Data Type Description
ATM Asynchronous Transfer Mode which carries data in small fixed sized cells.
HDLC High-level Data Link Control which carries data in variable sized frames.
Encoding Type Description
B3ZS Bipolar with Three Zero Substitution (DS3 only)
HDB3 Hi-Density Bipolar Three Zeros (E3 only)


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Installation
Introduction
The DAG 3.7D card can be installed in any free 3.3V PCI slot.
Although the DAG driver supports up to sixteen DAG cards in one system, limitations on the
number of available slots in most computers means that it is not usually possible to support
more than 3-4 DAG cards in the same computer.
DAG Software package
The latest DAG Software package must be installed before you install the DAG 3.7D card
itself. See EDM04-01 DAG Software Installation Guide, which is included on the CD shipped
with the DAG 3.7D card.
Inserting the DAG Card
Caution:
It is very important to protect both the computer and the DAG 3.7D card from
damage by electro-static discharge (ESD). Failure to do so could cause damage to
components and subsequently cause the card to partially or completely fail.
1. Turn power to the computer OFF.
2. Remove the PCI bus slot screw and cover.
3. Using an approved ESD protection device attach the end with the strap to your wrist
and pull or clip firmly so there is firm contact with your wrist.
4. Securely attach the clip on the other end of the strap to a solid metal area on the
computer chassis as shown below.
5. Insert the DAG 3.7D card into PCI bus slot ensuring it is firmly seated.
6. If this DAG card requires an external power supply, complete the following steps:
a. Connect the supplied (or equivalent) power cable to the external power connector
on the DAG card.
b. Connect the cable to the appropriate power connector on your server's power
supply unit.
7. Check the free end of the card fits securely into the card-end bracket that supports the
weight of the card.
8. Secure the card with the bus slot cover screw.
9. Turn power to the computer ON.
10. Ensure the blue (FPGA successfully programmed) LED on the DAG card illuminates.

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Port Connectors
The DAG 3.7D has four coaxial SMB connectors consisting of two pairs. One connector in
each pair is used for the receive signal and the other connector of each pair is used for the
transmit signal as shown below:
Note: The DAG 3.7D firmware does not currently support transmission.
In addition there is an 8-pin RJ45 socket located below the port connectors which is available
to connect to a time synchronization source.
Caution: Never connect anything other than a PPS input to the time synchronization
sockets.

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Coaxial Transceivers
The input signal to the DAG card must be within the receiver's dynamic range. If it is slightly
outside of this range it will cause an increased bit error rate. If it is significantly outside of
this range the system will not be able to lock onto the signal.
The DAG 3.7D card supports industry standard SMB coaxial connectors. Endace
recommends that you use the 75Ω SMB to 75 Ω BNC 1m cables which are supplied with the
card.
Connecting to the Network
You can connect the DAG 3.7D to the network using either a router or a DXS-3 tap.
Depending upon which method you are using you will need to configure your connection as
shown below:
Note: If you are unsure of the method used to connect to the network please consult your
system administrator for more information.
Router
If you are connecting to the network via a router you must provide a complete circuit by
enabling facility loopback (fcl) on the card. In this configuration you should set monitor
mode to OFF.
For more information on configuring fcl and monitor mode please see Configuring the DAG
card 16(page ) later in this user guide.
DSX-3 Tap
If you are not connecting to the network via a router you can use a DSX-3 tap as shown
above. In this configuration the supports DSX-3 monitor mode so you should set monitor
mode to ON.
For more information on configuring monitor mode please see Configuring the DAG card
11
(page ) later in this user guide.


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Configuring the DAG card
Introduction
Configuring the DAG 3.7D card ready for capturing data requires the following steps:
•Setting up the FPGA 13(page )
•Preparing the DAG card for use 15(page )
•Configuring the DAG Card 16(page )
•Viewing the DAG card statistics 30(page )
Once the DAG 3.7D is configured you can start capturing data, see Using your DAG card to
capture data 31(page ) for details on capturing data.
Before configuring the DAG card
Before configuring the FPGA, you should ensure that:
•dagmem has been run and memory allocated to each installed DAG card.
•dagload has been run so that all DAG drivers have been installed.
Refer to the Installing the drivers section for the required Operating system in EDM04-01 DAG
Software Installation Guide for the further details.
Firmware images
The following lists the features available on each firmware image available on this DAG card.
FPGA image
(Software version string)
DS3 E3 Framed
Relay
Cisco
Fractional
Kentrox
Subrate
ATM HDLC
dag37dpci_erf.bit
(dag37dpci_erf_pci...)
dag37dpci_frace3.bit
(dag37dpci_fract3_pci...)
dag37dpci_kentrox.bit
(dag37dpci_kentrox_pci...)
The software version strings are displayed in the dagconfig output and when using the
dagrom -x command. They include a version number and creation date.
The FPGA image that you load on the card will depend upon the type of data you want to
capture. The DAG 3.7D card supports the following types of capture:
•DS3 framed full line rate ATM
•DS3 framed, full line rate HDLC
•E3 framed full line rate ATM
•E3 framed full line rate HDLC
•E3 framed HDLC Cisco fractional
•DS3 Kentrox subrate
There are two FPGA images shipped as standard with the DAG 3.7D card. One is for use
with full line rate capture and the other is for use with E3 fractional capture.
However the Kentrox subrate is a proprietary application. If you wish to use this you should
See
for further information on
obtaining the appropriate firmware image.
Full Line Rate Configuration 12(page ), Fractional Configuration 12(page ) and Kentrox
Subrate Configuration 12(page ) for detailed information on configuring the card for specific
applications.

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Full Line Rate Configuration
Configuring the DAG 3.7D card for full line rate capture will enable you to capture data at
the full speed of the network.
E3 Fractional Configuration
Configuring the DAG 3.7D card for fractional capture allows you to capture data from a
fractional E3 HDLC network. Fractional rate is a fraction of the full speed of the network. The
fractional rate supported by the DAG 3.7D is measured as the number of timeslots used to
carry data out of a possible 95.
There are a several proprietary fractional rates available. Please consult your network
provider if you are unsure of the fractional rate you are using.
Kentrox Subrate Configuration
Kentrox Subrate is one of several proprietary fractional rates which use a fraction of the full
speed of the network. Kentrox Subrate is available on DS3 HDLC networks only. Configuring
the DAG 3.7D card for Kentrox Subrate capture allows you to capture data from a Network if
you are using the proprietary Kentrox Subrate.
Note: The maximum line rate available for Kentrox Subrate is 35Mbps.

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Setting up the FPGA
All DAG cards have at least one Field-Programmable Gate Array (FPGA). The FPGA
contains the firmware for the DAG card. The firmware defines how the DAG card operates
when capturing data and contains the specific configuration.
Note: Some DAG cards have multiple FPGA's.
For each FPGA there are two firmware images:
•a factory image - contains fixed basic functionality for operating the DAG card.
•a user image - contains an upgradable version of the DAG card firmware. Additional
functionality for the DAG card is available via the user image. Different user images
may be available with different functionality, i.e. TERF, DSM etc.
Firmware images are loaded into DAG card flash ROM in the factory. The image is
programmed into the FPGA each time the DAG card is powered up. The user image can
then be programmed into the FPGA either manually or via a script.
Programming the FPGA
Before configuring the DAG card for capture, you must load and program the DAG card
with the appropriate FPGA image.
Note: For information about the dagrom options, see dagrom 14(page ).
Load the appropriate FPGA image using dagrom as follows:
For full line rate capture load the card with the FPGA image:
dagrom -d0 -rvp dag37dpci-erf.bit
For fractional rate capture load the card with the FPGA image:
dagrom -d0 -rvp dag37dpci-frace3.bit
For Kentrox Subrate capture you must load the card with the FPGA image:
dagrom -d0 -rvp dag37dpci-kentrox.bit
(where "0" is the device number of the DAG card you wish to capture data from). The
filename of the FPGA image may differ from the above depending on the version required.

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dagrom
dagrom is a software utility that enables you to configure the FPGA on Endace DAG cards.
The following is a list of options available in dagrom.
Option Description
-a,--alternate-half
Use alternate (stable) half. [Default is current half.] Factory / User.
-A,--entire-rom
Entire ROM. [Default is current half only.]
-b,--swid-rom-check
Check if there is a SWID on the ROM.
-c,--cpu-region <region>
Access CPU region: c=copro, b=boot, k=kernel, f=filesystem.
--continue
Continue on erase error.
-d,--device <device>
DAG device to use.
-e,--erase
Erase ROM. [Default is read.]
-F,--disable-cfi-fast
Disable fast program option for CFI mode.
-f,--file <filename>
File to be read when programming ROM. There are multiple FGPA images
per DAG card, covering the different versions, ERF, TERF DSM etc.
--force
Force loading firmware. Dangerous.
-g,--rom-number <rom>
Access specified ROM controller. [Default is 0.]
-h,--help
-?,--usage
This page.
-i,--halt-ixp
Halt the embedded IXP Processor (DAG 7.1S only).
--image-table-fpga
<image table fpga>
Specify the Power On image selection table FPGA number
--image-table-image
<image table image>
Specify the Power On image selection table Image number
-j,--swid-rom-check-key
<key>
Check the ROM SWID key with the one supplied.
-l,--hold-bus
Hold PBI bus from XScale (DAG 3.7T only).
-m,--swid-key <key>
Hexadecimal key for writing the Software ID (aka SWID).
-o,--swid-rom-read
Read SWID from ROM.
-p,--program-current
Program current User 1 Xilinx image into FPGA.
-q,--image-number
<image number>
Specify the image number to write or to program the card.[0 - 3]. 0 factory
image, 1 user image 1, 2 user image 2, 3 user image 3. (7.5G2/G4 only)
--swid-write <swid>
Write given SWID. The key must be supplied with the -m option, requires a
valid running XScale ROM Image. (3.7T, 3.7D, 3.8S and 7.1S only)
-r,--reprogram
Reprogram ROM (may imply erase and write).
--reset-method
<reprogram method>
Specify the method to reprogram the card.[1.Ringo 2.George 3.Dave]
-s,--swid-rom-write
<swid>
Write given SWID to ROM. The key must be supplied with the -m option.
-t,--swid-read-bytes
<bytes>
Read <bytes> of SWID, requires a valid running XScale ROM image (3.7T
only)
-u,--swid-erase
Erase SWID from ROM.
--unknown
Force loading firmware. Dangerous.
-v,--verbose
Increase verbosity.
-V,--version
Display version information.
-w,--write
Write ROM (implies erase). [Default is read.]
--write-out <filename>
Write the contents of the ROM to a file.
-x,--list-revisions
Display Xilinx revision strings (the default if no arguments are given).
-y,--verify
Verify write to ROM.
-z,--zero
Zero ROM. [Default is read.]
All commands apply to the current image portion of the ROM, unless one of the options -a,
-A, -c is specified.
Note: Not all commands are supported by all DAG cards.

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Loading new firmware images onto a DAG Card
New DAG card FPGA images are released regularly by Endace as part of software packages.
They can be downloaded from the Endace website at https://www.endace.com/support
The -r option invokes a comparison of images on the computer and in the DAG card. Newer
versions are automatically loaded onto the DAG card and programmed into the FPGA. See
.
Endace recommends you use the dagrom -r command when loading images from the
computer to the ROM on the DAG card.
dagrom 14(page ). This eliminates unnecessary reprogramming of the ROM and extends its
life.
Preparing the DAG card for use
Before configuring the DAG 3.7D card you must run the following dagconfig command to
set the default parameters in the DAG card. This ensures the DAG 3.7D card functions
correctly once you begin capturing data.
Note: Ensure you run this command each time the FPGA is reprogrammed.
dagconfig -d0 default
The current DAG 3.7D configuration displays and the firmware is verified as correctly
loaded. See dagconfig 28(page ) for more information.

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Configuring the DAG card
Display Current Configuration
Once you have loaded the FPGA image you should run the dagconfig tool without
arguments to display the current card configuration and verify the firmware has been loaded
correctly.
To display the current DAG card configuration, type the following:
dagconfig -d0 default
where "0" is the device number of the DAG card you wish to capture data from
A description of available tokens follows.
Note: If you are connected to the network via a Cisco Systems router, the relevant Cisco
commands are included in blue for your reference.
Not all tokens displayed in the following diagram.
dagthree has been depreciated from DAG Software release 3.2 onwards. It has been
replaced with dagconfig. Both are still valid. Endace recommends that new
customer use dagconfig.
DS3 Framed Full Line Rate ATM
You can display the default configuration using:
dagconfig -d0 default_ds3_atm
Note: Enabling the pre-amplifier using rx_monitor adds approx 20dB of linear
amplification for monitor applications where the signal has been reduced 20dB with
resistive tap circuits.
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