Freescale Semiconductor ColdFire MCF5275 User manual

MCF5275EVB User’s Manual
Devices Supported:
MCF5275
MCF5275L
MCF5274
MCF5274L
MCF5275EVBUM
Rev. 1.1
11/2008

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MCF5275EVBUM
Rev. 1.0
10/2004

EMC Information on M5275EVB
1. This product as shipped from the factory with associated power supplies and cables, has been
tested and meets with requirements of EN5022 and EN 50082-1: 1998 as a CLASS A product.
2. This product is designed and intended for use as a development platform for hardware or software
in an educational or professional laboratory.
3. In a domestic environment this product may cause radio interference in which case the user may
be required to take adequate measures.
4. Anti-static precautions must be adhered to when using this product.
5. Attaching additional cables or wiring to this product or modifying the products operation from the
factory default as shipped may effect its performance and also cause interference with other appa-
ratus in the immediate vicinity. If such interference is detected, suitable mitigating measures
should be taken.

WARNI N G
This board generates, uses, and can radiate radio frequency energy and, if not installed properly, may cause
interference to radio communications. As temporarily permitted by regulation, it has not been tested for
compliance with the limits for class a computing devices pursuant to Subpart J of Part 15 of FCC rules,
which are designed to provide reasonable protection against such interference. Operation of this product
in a residential area is likely to cause interference, in which case the user, at his/her own expense, will be
required to correct the interference.

CONTENTS
Paragraph
Number Title Page Number
Freescale Contents 1
Chapter 1
M5275EVB Introduction
1.1 MCF5275 Microprocessor.................................................................................. 1-3
1.2 System Memory.................................................................................................. 1-6
1.2.1 External Flash ................................................................................................. 1-6
1.2.2 SDRAM .......................................................................................................... 1-7
1.2.3 ASRAM .......................................................................................................... 1-7
1.2.4 Internal SRAM................................................................................................ 1-7
1.2.5 M5275EVB Memory Map.............................................................................. 1-7
1.2.5.1 Reset Vector Mapping ................................................................................ 1-8
1.3 Support Logic ..................................................................................................... 1-9
1.3.1 Reset Logic ..................................................................................................... 1-9
1.3.2 Clock Circuitry ............................................................................................. 1-11
1.3.3 Watchdog Timer ........................................................................................... 1-11
1.3.4 Exception Sources......................................................................................... 1-11
1.3.5 TA Generation .............................................................................................. 1-12
1.3.6 User’s Program ............................................................................................. 1-13
1.4 Communication Ports ....................................................................................... 1-13
1.4.1 UART0, UART1, UART2 Ports................................................................... 1-13
1.4.2 10/100T Ethernet Ports ................................................................................. 1-13
1.4.3 BDM/JTAG Port........................................................................................... 1-14
1.4.4 I2C ................................................................................................................ 1-15
1.4.5 QSPI.............................................................................................................. 1-16
1.5 Connectors and User Components.................................................................... 1-16
1.5.1 Daughter Card Expansion Connectors.......................................................... 1-16
1.5.2 Reset Switch (SW5)...................................................................................... 1-20
1.5.3 User LEDs..................................................................................................... 1-21
1.5.4 Other LEDs................................................................................................... 1-21
Chapter 2
Initialization and Setup
2.1 System Configuration ......................................................................................... 2-1
2.2 Installation and Setup.......................................................................................... 2-2

2M5275EVB User’s Manual Freescale
CONTENTS
Paragraph
Number Title Page Number
2.2.1 Unpacking....................................................................................................... 2-3
2.2.2 Preparing the Board for Use ........................................................................... 2-3
2.2.3 Providing Power to the Board......................................................................... 2-3
2.2.4 Power Switch (SW3) ...................................................................................... 2-4
2.2.5 Power Status LEDs and Fuse.......................................................................... 2-4
2.2.6 Selecting Terminal Baud Rate ........................................................................ 2-5
2.2.7 The Terminal Character Format ..................................................................... 2-5
2.2.8 Connecting the Terminal ................................................................................ 2-5
2.2.9 Using a Personal Computer as a Terminal...................................................... 2-5
2.3 System Power-up and Initial Operation.............................................................. 2-8
2.4 Using The BDM Port.......................................................................................... 2-8
Chapter 3
Using the Monitor/Debug Firmware
3.1 What Is dBUG?................................................................................................... 3-1
3.2 Operational Procedure ........................................................................................ 3-3
3.2.1 System Power-up ............................................................................................ 3-3
3.2.2 System Initialization ....................................................................................... 3-4
3.2.2.1 External RESET Button.............................................................................. 3-4
3.2.2.2 ABORT Button........................................................................................... 3-4
3.2.2.3 Software Reset Command .......................................................................... 3-4
3.3 Command Line Usage ........................................................................................ 3-5
3.4 Commands .......................................................................................................... 3-5
3.5 TRAP #15 Functions ........................................................................................ 3-40
3.5.1 OUT_CHAR ................................................................................................. 3-40
3.5.2 IN_CHAR ..................................................................................................... 3-41
3.5.3 CHAR_PRESENT ........................................................................................ 3-41
3.5.4 EXIT_TO_dBUG.......................................................................................... 3-42
Appendix A
Configuring dBUG for Network Downloads
A.1 Required Network Parameters ........................................................................... A-1
A.2 Configuring dBUG Network Parameters........................................................... A-2
A.3 Troubleshooting Network Problems.................................................................. A-3
Appendix B
Schematics
B.1 M5275EVB Schematics...................................................................................... B-1

CONTENTS
Paragraph
Number Title Page Number
Freescale Contents 3
Appendix C
M5275EVB BOM
C.1 M5275EVB BOM............................................................................................... C-1

4M5275EVB User’s Manual Freescale
CONTENTS
Paragraph
Number Title Page Number

Chapter 1. M5275EVB Introduction 1-1
Chapter 1
M5275EVB Introduction
This document details the setup and configuration of the ColdFire M5275EVB evaluation
board (hereafter referred to as the EVB). The EVB is intended to provide a mechanism for
easy customer evaluation of the MCF5274, MCF574L, MCF5275, and MCF5275L
ColdFire microprocessors and to facilitate hardware and software development. The EVB
can be used by software and hardware developers to test programs, tools, or circuits without
having to develop a complete microprocessor system themselves. All special features of the
MCF5274(L) and MCF5275(L) are supported.
The heart of the evaluation board is the MCF5275. The MCF5275L and MCF5274(L) have
a subset of the MCF5275 specification and can therefore be fully emulated using the
MCF5275 device. Table 1-1., “MCF5274/75 Product Family”. below details the two
devices.
All of the devices in the same package are pin compatible.
The EVB provides for low cost software testing with the use of a ROM resident debug
monitor, dBUG, programmed into the external Flash device. Operation allows the user to
load code in the on-board RAM, execute applications, set breakpoints, and display or
modify registers or memory. No additional hardware or software is required for basic
operation.
Specifications
Table 1-1. MCF5274/75 Product Family
Part Number Package FEC CRYPTO Max Core/Bus
speed
MCF5274LVM133 196 MAPBGA x1 No 133 / 66 MHz
MCF5274LVM166 196 MAPBGA x1 No 166 / 83 MHz
MCF5274VM133 256 MAPBGA x2 No 133 / 66 MHz
MCF5274VM166 256 MAPBGA x2 No 166 / 83 MHz
MCF5275LCVM133 196 MAPBGA x1 Yes 133 / 66 MHz
MCF5275LCVM166 196 MAPBGA x1 Yes 166 / 83 MHz
MCF5275CVM133 256 MAPBGA x2 Ye s 133 / 66 MHz
MCF5275CVM166 256 MAPBGA x2 Ye s 166 / 83 MHz

1-2 M5275EVB User’s Manual
• Motorola MCF5275 Microprocessor (166 MHz max core frequency)
• External Clock source: 25MHz
• Operating temperature: 0°C to +70°C
• Power requirement: 6 – 14V DC @ 1A Typical
• Power output: 5V, 3.3V, 2.5V and 1.5V regulated supplies
• Board Size: 10.00 x 5.40 inches, 8 layers
Memory Devices:
• 16-Mbyte DDR SDRAM
• 2-Mbyte (512K x 16) Page Mode Flash or 4-Mbyte (512K x 32) Page mode Flash
• 1-Mbyte ASRAM (footprint only)
• 64-Kbyte SRAM internal to MCF5275 device
Peripherals:
• FEC0 Ethernet port 10/100Mb/s (Dual-Speed Fast Ethernet Transceiver, with MII)
• FEC1 Ethernet port 10/100Mb/s (Dual-Speed Fast Ethernet Transceiver, with MII)
• USB 2.0 Full Speed (Device)
• UART0 (RS-232 serial port for dBUG firmware)
• UART1 (auxiliary RS-232 serial port)
• UART2 (auxiliary RS-232 serial port)
•I
2C interface
• QSPI interface
• BDM/JTAG interface
User Interface:
• Reset logic switch (debounced)
• Boot logic selectable (dip switch)
• Abort/IRQ7 logic switch (debounced)
• PLL Clocking options - Oscillator, Crystal or SMA for external clocking signals
• LEDs for power-up indication, general purpose I/O, and timer output signals
• Expansion connectors for daughter card
Software:
• Resident firmware package that provides a self-contained programming and
operating environment (dBUG)