Freescale Semiconductor TWR-LS1021A User manual

Freescale Semiconductor
Getting Started
© 2014 Freescale Semiconductor, Inc. All rights reserved.
1 Introduction
This document explains how to connect the QorIQ LS1021A
Tower System Module (TWR-LS1021A) board and verify its
basic operations like, the switches, connectors, jumpers,
push buttons and LED settings, and the instructions for
connecting the peripheral devices.
NOTE
It is assumed that you are familiar with the LS1021A device
and the content of the TWR-LS1021A Reference Manual
(TWR-LS1021ARM).
The following figures shows the main features of the
secondary and primary side of the TWR-LS1021A board.
Document Number: TWR-LS1021AGS
Rev. 1, 11/2014
Contents
1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1.Related documentation . . . . . . . . . . . . . . . . . . . . . . 2
2. Switches and jumpers configuration . . . . . . . . . . . . . . 3
3. Connecting USB UART . . . . . . . . . . . . . . . . . . . . . . . 6
4. Initial board power-up . . . . . . . . . . . . . . . . . . . . . . . . . 6
5. Board software configuration . . . . . . . . . . . . . . . . . . . 7
6. JTAG connectivity unit . . . . . . . . . . . . . . . . . . . . . . . . 8
6.1.Connecting JTAG using CodeWarrior TAP . . . . . . 9
6.2.Enabling CMSIS-DAP . . . . . . . . . . . . . . . . . . . . . . 9
7. TWR-LS1021A OOBE demo . . . . . . . . . . . . . . . . . . . 9
8. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
TWR-LS1021A Getting Started

TWR-LS1021A Getting Started, Rev. 1
2Freescale Semiconductor
Introduction
Figure 1. Primary side main features
Figure 2. Secondary side main features
1.1 Related documentation
The following table lists and explains the additional documents and resources that you can refer, for more
information on TWR-LS1021A board.
Some of the documents listed below may be available only under a non-disclosure agreement (NDA). To
request access to these documents, contact your local field applications engineer or sales representative.
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TWR-LS1021A Getting Started, Rev. 1
Freescale Semiconductor 3
Switches and jumpers configuration
2 Switches and jumpers configuration
The TWR-LS1021A board have two 8-way dual in line package (DIP) switch. The default DIP switch
positions provide working set up values for the board. Check the default positions and verify the board is
operational before changing the switches. Figure 3 shows the settings for the switches with their default
positions.
Figure 3. Default switch configuration
Table 2-2 lists and describes the default switch configuration for TWR-LS1021A board.
Table 1. Related documentation
Document Description
LS1021A QorIQ Advanced
Multicore Processor Data Sheet
Provides information about electrical characteristics, hardware design considerations, pin
assignments, package information, and ordering information.
LS1021A QorIQ Integrated
Multicore Processor Reference
Manual (LS1021ARM)
Provides a detailed description about LS1021A QorIQ multicore processor and its features,
such as memory map, serial interfaces, power supply, chip features, and clock information.
The SystemID Format for Power
Architecture™Development
Systems (AN3638)
Freescale Semiconductor Power Architecture™technology-based evaluation and
development platforms may optionally implement a “System ID” non-volatile memory
device. This device stores important configuration data about the board.
TWR-LS1021A Reference Manual
(TWR-LS1021ARM)
Provides a detailed description of the architecture, tower elevator connections, CPLD
system controller architecture, board configuration and debug support for TWR-LS1021A
QorIQ Tower System.
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TWR-LS1021A Getting Started, Rev. 1
4Freescale Semiconductor
Switches and jumpers configuration
Table 2-2. Default switch settings
Feature Settings
[OFF=0 ON=1] Option Comments
S2.1 ON RCW Source is NOR NOR RCW_SEL
0 : NOR disabled
»1 : NOR enabled(default)
S2.2 OFF Reserved Must be 0 [OFF]
S2.3 OFF RCW Source is SDHC SDHC RCW_SEL
»0 : SDHC disabled (default)
1 : SDHC enabled
S2.4 OFF RCW Source is QSPI QSPI RCW_SEL
»0 : QSPI disabled (default)
1 : QSPI enabled
S2.5 ON Bus select is NOR or QSPI IFC/QSPI Bus selection
0 : IFC disabled, QSPI enabled
»1 : IFC enabled, QSPI disabled
(default)
S2.6 ON LVDD&L1VDD selection is
2.5V or 3.3V
LVDD&L1VDD Voltage Selection
0 : 3.3V
»1 : 2.5V (default)
S2.7 ON IFC_CS1 or SPI1_PCS0
selection
IFC_CS1/SPI1_PCS0 Selection
0 : IFC_CS1 disabled, SPI1_PCS0
enabled
»1 : IFC_CS1 enabled, SPI1_PCS0
disabled (default)
S2.8 ON DIPSW_IN1 SDA_SWD_EN Control
0 : use K20 IO pin to control
SDA_SWD_EN
»1 : tied to high to disable CMSIS-DAP
connection (default)
S3.1 OFF 96MHz SYSCLK select or
not
96MHz SYSCLK Selection
»0 : Do not select 96MHz as
SYSCLK(default)
1 : Select 96MHz as SYSCLK
S3.2 ON TEST_SEL_DRV Drive TEST_SEL signal
0 : non-compliant mode to support
boundary scan.
» 1 : JTAG compliant mode(default)
S3.3 ON CLKGEN_FS0
System clock frequency
setting
CLKGEN_FS[0:1]
00 = 66.66MHz
01 = 80.00MHz
»10 = 100.00MHz (default)
11 = 83.33MHz
S3.4 OFF CLKGEN_FS1
System clock frequency
setting
S3.5 OFF NOR Bank Select
BANK_SEL
BANK_SEL
» 0 : Vbank0 (default)
1 : Vbank1

TWR-LS1021A Getting Started, Rev. 1
Freescale Semiconductor 5
Switches and jumpers configuration
Table 2-3 lists the jumper settings.
Figure 4 shows the jumper settings.
Figure 4. Jumper settings
S3.6 ON Signal multiplexed
selection
MUX_SEL
MUX_SEL
0 : PCIE1,SGMII1,PCIE2,SGMII2,
RGMII, CAN3&4, SAI1&2, 2D-ACE,
LPUART1
» 1 : PCIE1,SATA,PCIE2,SGMII2,
RGMII, CAN3&4, CAN1&2, UCC1&3
(default)
S3.7 OFF Reserved Must be 0 [OFF]
S3.8 ON Reserved Must be 1 [ON]
Table 2-3. Jumper settings
Jumper
Setting
UART1 console (default) LPUART1 console
J19 2-3 1-2
J20 2-3 1-2
Others Jumpers Open Open
Table 2-2. Default switch settings
Feature Settings
[OFF=0 ON=1] Option Comments
**

TWR-LS1021A Getting Started, Rev. 1
6Freescale Semiconductor
Connecting USB UART
3 Connecting USB UART
The TWR-LS1021A board comes preloaded with u-boot only. Serial connectivity for TWR-LS1021A
board is provided through the mini type B USB connector.
NOTE
You need to install the USB drivers on the host PC before using the serial
terminal. You can get the drivers from the USB memory stick available in
the box, or, you can download these drivers from,
https://mbed.org/handbook/Windows-serial-configuration
After installing the drivers, set up a serial terminal using a PC communication program such as hyper
terminal as follows:
• Data rate: 115200 bps
• Number of data bits: 8
• Parity: None
• Number of Stop bits: 1
• Flow Control: Hardware/None
Then, select the first COM port assigned to the Virtual COM port.
4 Initial board power-up
The TWR-LS1021A board is powered through a barrel connector. This barrel should be supplied by a 5V
@5A supply. See Figure 1.
NOTE
It is normal for heatsink on the TWR-LS1021A board to become hot under
standard operating conditions.
To perform initial board power-up and LED check, follow the steps listed below:
1. Power-up the board through barrel connector.
2. Check for the completion of the reset sequence indicated by the LEDs (see Figure 1 for locations).
Table 4-4 lists a full description of the LED operation.
3. On powering up the board:
a) The LED D1 turns ON to indicate 3V3 power is present.
b) D5 turns ON then OFF.
c) Any Ethernet activity is indicated by the LEDs on the RJ45 connector.
d) D2 indicates CMSIS-DAP USB driver is loaded. If it is blinking, than the serial port is not
available. You need to power up the board at J3, than insert the USB cable on board.
The following table lists the LED operations.

TWR-LS1021A Getting Started, Rev. 1
Freescale Semiconductor 7
Board software configuration
5 Board software configuration
The NOR flash on TWR-LS1021A board is divided into two banks. There are different images in each
banks that supports different functionality.
NOTE
TWR-LS1021A board comes pre-programmed with FLASH image.
The bank0 is programmed with RCW support for QE, and the bank1 is programmed with the RCW support
for 2D-ACE. The default is bank0.
Table 5-5 shows the TWR-LS1021A board’s switches and jumper settings for bank0 and bank1.
NOTE
If you enable the 2D-ACE, you have to use lpuart as console. The bootup
information displays on lpuart console by default. For more information on
how to enable the 2D-ACE output, refer to the 2D-ACE Display Device
Driver User Manual, available in the Yocto source ISO folder of the USB
flash drive shipped with the board.
You can also access the content available in the USB flash drive shipped
with the board, from the following location:
http://www.freescale.com/TWR-LS1021A
Figure 5 shows the settings for bank0 and bank1.
Table 4-4. LED operation
Description Ref Color LED On LED Off
3V3 Power D1 Green 3V3 Power ON 3V3 Power OFF
LS1021A ASLEEP D5 Green ASLEEP Out of asleep
CMSIS-DAP status D2 Green CMSIS-DAP driver is
loaded
CMSIS-DAP driver is not
loaded
Ethernet eTSEC1 P1 down Green/Orange ON – Link
Blink - Activity
No Link
Ethernet eTSEC2 P1 up Green/Orange ON – Link
Blink - Activity
No Link
Ethernet eTSEC3 U20 up (above
USB)
Green/Orange ON – Link
Blink - Activity
No Link
Table 5-5. Switches and jumper settings for NOR flash banks
SW2[1:8] SW3[1:8] J19 J20
BANK0
(default)
10001111 01100101 2-3 2-3
BANK1 10001111 01101001 1-2 1-2

TWR-LS1021A Getting Started, Rev. 1
8Freescale Semiconductor
JTAG connectivity unit
Figure 5. NOR Flash configurations on bank0 and bank1
Figure 6 shows the TWR-LS1021A block diagram.
Figure 6. TWR-LS1021A block diagram
6 JTAG connectivity unit
This section explains the following two method to configure the TWR-LS1021A board’s JTAG
connectivity unit supported by CodeWarrior Development Studio for QorIQ LS series:
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TWR-LS1021A Getting Started, Rev. 1
Freescale Semiconductor 9
TWR-LS1021A OOBE demo
6.1 Connecting JTAG using CodeWarrior TAP
To connect the JTAG using CodeWarrior TAP, perform these steps:
1. Connect the JTAG connectivity unit to the TWR-LS1021A JTAG connector J12. Pin 1 is marked
on the board.
2. Switch ON the power to the board.
3. Check for completion of the reset sequence (see Initial board power-up). Ensure D5 turns OFF.
4. Follow the on-screen instructions.
6.2 Enabling CMSIS-DAP
TWR-LS1021A board supports CMSIS-DAP interface. CMSIS-DAP provides a standard access to the
Coresight Debug Access Port (DAP) of the ARM Cortex microcontroller through USB.
TWR-LS1021A board is implemented with CMSIS-DAP as an on-board interface chip, that provides a
direct USB connection to the debugger running on your host machine on one end, and the JTAG connection
to the target device to access the Coresight DAP on the other end.
To enable the CMSIS-DAP on your TWR-LS1021A board:
1. You have to change, SW2[8] = 0.
2. Make sure that your CW TAP device is not plugged in.
3. Attach the micro USB cable to USB serial connector, J5.
This provides serial connectivity and CMSIS-DAP connection (optional).
For detailed setup procedure, refer to the CodeWarrior Development Studio for QorIQ LS series - ARM V7
ISA Getting Started Guide (CWARMV7GS) from the following location:
http://cache.freescale.com/files/soft_dev_tools/doc/quick_ref_guide/CWARMv7GS.pdf
7 TWR-LS1021A OOBE demo
OOBE is an out-of-box-experience demo program which shows wireless networking, graphics and audio
playing functionality of TWR-LS1021A. Image files for the demo are available in the SD card shipped
with the board. You need to insert the SD card into the board to run the demo.
For detailed instructions to run the demo, refer TWR-LS1021A OOBE Demo Quick Start Guide.pdf under
\OOBE-demo\ folder in the USB flash drive shipped with the board.
You can also access the content available in the USB flash drive shipped with the board, from the following
location:
http://www.freescale.com/TWR-LS1021A
8 Revision History
The table below provides revision history of this document.

TWR-LS1021A Getting Started, Rev. 1
10 Freescale Semiconductor
Revision History
Table 8-6. Revision history
Revision
number Date Topic cross-reference Change description
Rev. 1 11/2014 Figure 1 Primary side main features Update the figure for LED locations.
Figure 3 Default switch configuration Updated the figure for default settings on SW3[1:8].
Ta bl e 2 - 2 Default switch settings Updated the table for S3.6.
Section 3, “Connecting USB UART” Updated the section for serial terminal set up details.
Section 5, “Board software configuration” Updated the section for switches and jumper settings,
output device as 2D-ACE and two block diagrams,
Figure 5 NOR Flash configurations on bank0 and
bank1 and Figure 6 TWR-LS1021A block diagram.
Section 6, “JTAG connectivity unit” Updated the content to create sub-section,
Section 6.1, “Connecting JTAG using CodeWarrior
TA P ”.
Section 6.2, “Enabling CMSIS-DAP” Added as new sub-section to describe how to enable
CMSIS-DAP support.
Section 7, “TWR-LS1021A OOBE demo” Added as new section to introduce OOBE demo.
Rev. 0 09/2014 Initial public release.

Document Number:TWR-LS1021AGS REV 1
Agile Number: 926-28040
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