Fujitsu MPF3204AH User manual

C141-E106-01EN
MPF3xxxAH
DISK DRIVES
PRODUCT MANUAL

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C141-E106-01EN iii
MANUAL ORGANIZATION
MPF3xxxAH
DISK DRIVES
PRODUCT
MANUAL
(C141-E106)
<This manual>
• DEVICE OVERVIEW
• DEVICE CONFIGURATION
• INSTALLATION CONDITIONS
• THEORY OF DEVICE OPERATION
• INTERFACE
• OPERATIONS
MPF3xxxAH
DISK DRIVES
MAINTENANCE
MANUAL
(C141-F044)
• MAINTENANCE AND DIAGNOSIS
• REMOVAL AND REPLACEMENT PROCEDURE

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C141-E106-01EN v
PREFACE
This manual describes the MPF3xxxAH series, a 3.5-inch hard disk drive with a BUILT-IN controller that
is compatible with the ATA interface.
This manual explains, in detail, how to incorporate the hard disk drives into user systems.
This manual assumes that users have a basic knowledge of hard disk drives and their application in
computer systems.
This manual consists of the following six chapters:
Chapter 1 DEVICE OVERVIEW
Chapter 2 DEVICE CONFIGURATION
Chapter 3 INSTALLATION CONDITIONS
Chapter 4 THEORY OF DEVICE OPERATION
Chapter 5 INTERFACE
Chapter 6 OPERATIONS
In this manual, disk drives may be referred to as drives or devices.

vi C141-E106-01EN
Conventions for Alert Messages
This manual uses the following conventions to show the alert messages. An alert message consists of an
alert signal and alert statements. The alert signal consists of an alert symbol and a signal word or just a
signal word.
The following are the alert signals and their meanings:
This indicates a hazardous situation likely to result in serious personal
injury if the user does not perform the procedure correctly.
This indicates a hazardous situation could result in personal injury if the
user does not perform the procedure correctly.
This indicates a hazardous situation could result in minor or moderate
personal injury if the user does not perform the procedure correctly. This
alert signal also indicates that damages to the product or other property,
may occur if the user does not perform the procedure correctly.
This indicates information that could help the user use the product more
efficiently.
In the text, the alert signal is centered, followed below by the indented message. A wider line space
precedes and follows the alert message to show where the alert message begins and ends. The following is
an example:
(Example)
IMPORTANT
HA (host adapter) consists of address decoder, driver, and receiver.
ATA is an abbreviation of "AT attachment". The disk drive is
conformed to the ATA-4 interface
The main alert messages in the text are also listed in the “Important Alert Items.”

C141-E106-01EN vii
LIABILITY EXCEPTION
"Disk drive defects" refers to defects that involve adjustment, repair, or replacement.
Fujitsu is not liable for any other disk drive defects, such as those caused by user misoperation or
mishandling, inappropriate operating environments, defects in the power supply or cable, problems of the
host system, or other causes outside the disk drive.

This page is intentionally left blank.

C141-E106-01EN ix
CONTENTS
page
CHAPTER 1 DEVICE OVERVIEW .....................................................................................1 - 1
1.1 Features ...........................................................................................................................1 - 1
1.1.1 Functions and performance..............................................................................................1 - 1
1.1.2 Adaptability.....................................................................................................................1 - 2
1.1.3 Interface...........................................................................................................................1 - 2
1.2 Device Specifications.......................................................................................................1 - 4
1.2.1 Specifications summary....................................................................................................1 - 4
1.2.2 Model and product number ..............................................................................................1 - 5
1.3 Power Requirements.........................................................................................................1 - 5
1.4 Environmental Specifications...........................................................................................1 - 8
1.5 Acoustic Noise.................................................................................................................1 - 8
1.6 Shock and Vibration ........................................................................................................1 - 9
1.7 Reliability........................................................................................................................1 - 9
1.8 Error Rate........................................................................................................................1 - 10
1.9 Media Defects..................................................................................................................1 - 10
CHAPTER 2 DEVICE CONFIGURATION..........................................................................2 - 1
2.1 Device Configuration.......................................................................................................2 - 1
2.2 System Configuration.......................................................................................................2 - 3
2.2.1 ATA interface..................................................................................................................2 - 3
2.2.2 1 drive connection............................................................................................................2 - 3
2.2.3 2 drives connection ..........................................................................................................2 - 3
CHAPTER 3 INSTALLATION CONDITIONS....................................................................3 - 1
3.1 Dimensions......................................................................................................................3 - 1
3.2 Handling Cautions...........................................................................................................3 - 3
3.2.1 General notes...................................................................................................................3 - 3
3.2.2 Installation.......................................................................................................................3 - 3
3.2.3 Recommended equipments...............................................................................................3 - 3
3.3 Mounting.........................................................................................................................3 - 4
3.4 Cable Connections ...........................................................................................................3 - 8
3.4.1 Device connector..............................................................................................................3 - 8

C141-E106-01ENx
3.4.2 Cable connector specifications..........................................................................................3 - 9
3.4.3 Device connection............................................................................................................3 - 9
3.4.4 Power supply connector (CN1).........................................................................................3 - 10
3.4.5 System configuration for Ultra DMA................................................................................3 - 10
3.5 Jumper Settings................................................................................................................3 - 13
3.5.1 Location of setting jumpers ..............................................................................................3 - 13
3.5.2 Factory default setting......................................................................................................3 - 14
3.5.3 Jumper configuration .......................................................................................................3 - 14
CHAPTER 4 THEORY OF DEVICE OPERATION............................................................4 - 1
4.1 Outline.............................................................................................................................4 - 1
4.2 Subassemblies..................................................................................................................4 - 1
4.2.1 Disk.................................................................................................................................4 - 1
4.2.2 Head ................................................................................................................................4 - 2
4.2.3 Spindle.............................................................................................................................4 - 2
4.2.4 Actuator...........................................................................................................................4 - 2
4.2.5 Air filter...........................................................................................................................4 - 3
4.3 Circuit Configuration.......................................................................................................4 - 4
4.4 Power-on Sequence..........................................................................................................4 - 6
4.5 Self-calibration.................................................................................................................4 - 8
4.5.1 Self-calibration contents...................................................................................................4 - 8
4.5.2 Execution timing of self-calibration..................................................................................4 -9
4.5.3 Command processing during self-calibration....................................................................4 - 9
4.6 Read/write Circuit............................................................................................................4 - 10
4.6.1 Read/write preamplifier (PreAMP)...................................................................................4 - 10
4.6.2 Write circuit.....................................................................................................................4 - 10
4.6.3 Read circuit......................................................................................................................4 - 11
4.6.4 Synthesizer circuit............................................................................................................4 - 12
4.7 Servo Control...................................................................................................................4 - 12
4.7.1 Servo control circuit.........................................................................................................4 - 13
4.7.2 Data-surface servo format.................................................................................................4 - 16
4.7.3 Servo frame format ..........................................................................................................4 - 16
4.7.4 Actuator motor control.....................................................................................................4 - 18
4.7.5 Spindle motor control.......................................................................................................4 - 19

C141-E106-01EN xi
CHAPTER 5 INTERFACE ....................................................................................................5 - 1
5.1 Physical Interface.............................................................................................................5 - 2
5.1.1 Interface signals...............................................................................................................5 - 2
5.1.2 Signal assignment on the connector .................................................................................5 - 3
5.2 Logical Interface..............................................................................................................5 - 6
5.2.1 I/O registers.....................................................................................................................5 - 6
5.2.2 Command block registers.................................................................................................5 - 8
5.2.3 Control block registers.....................................................................................................5 - 13
5.3 Host Commands...............................................................................................................5 - 13
5.3.1 Command code and parameters........................................................................................5 - 14
5.3.2 Command descriptions.....................................................................................................5 - 16
5.3.3 Error posting....................................................................................................................5 - 66
5.4 Command Protocol...........................................................................................................5 - 67
5.4.1 Data transferring commands from device to host..............................................................5 - 67
5.4.2 Data transferring commands from host to device..............................................................5 - 69
5.4.3 Commands without data transfer......................................................................................5 - 71
5.4.4 Other commands..............................................................................................................5 - 72
5.4.5 DMA data transfer commands..........................................................................................5 - 72
5.5 Ultra DMA feature set......................................................................................................5 - 74
5.5.1 Overview..........................................................................................................................5 - 74
5.5.2 Phases of operation ..........................................................................................................5 - 75
5.5.3 Ultra DMA data in commands .........................................................................................5 - 75
5.5.3.1 Initiating an Ultra DMA data in burst..............................................................................5 - 75
5.5.3.2 The data in transfer..........................................................................................................5 - 76
5.5.3.3 Pausing an Ultra DMA data in burst ................................................................................5 - 76
5.5.3.4 Terminating an Ultra DMA data in burst .........................................................................5 - 77
5.5.4 Ultra DMA data out commands........................................................................................5 - 79
5.5.4.1 Initiating an Ultra DMA data out burst.............................................................................5 - 79
5.5.4.2 The data out transfer........................................................................................................5 - 80
5.5.4.3 Pausing an Ultra DMA data out burst...............................................................................5 - 80
5.5.4.4 Terminating an Ultra DMA data out burst........................................................................5 - 81
5.5.5 Ultra DMA CRC rules......................................................................................................5 - 83
5.5.6 Series termination required for Ultra DMA......................................................................5 - 84
5.6 Timing.............................................................................................................................5 - 85
5.6.1 PIO data transfer..............................................................................................................5 - 85
5.6.2 Multiword data transfer....................................................................................................5 - 86

C141-E106-01ENxii
5.6.3 Ultra DMA data transfer ..................................................................................................5 - 87
5.6.3.1 Initiating an Ultra DMA data in burst..............................................................................5 - 87
5.6.3.2 Ultra DMA data burst timing requirements......................................................................5 - 88
5.6.3.3 Sustained Ultra DMA data in burst ..................................................................................5 - 90
5.6.3.4 Host pausing an Ultra DMA data in burst.........................................................................5- 91
5.6.3.5 Device terminating an Ultra DMA data in burst...............................................................5 - 92
5.6.3.6 Host terminating an Ultra DMA data in burst...................................................................5 - 93
5.6.3.7 Initiating an Ultra DMA data out burst.............................................................................5 - 94
5.6.3.8 Sustained Ultra DMA data out burst.................................................................................5 - 95
5.6.3.9 Device pausing an Ultra DMA data out burst ...................................................................5 - 96
5.6.3.10 Host terminating an Ultra DMA data out burst.................................................................5 - 97
5.6.3.11 Device terminating an Ultra DMA data in burst...............................................................5 - 98
5.6.4 Power-on and reset...........................................................................................................5 - 99
CHAPTER 6 OPERATIONS..................................................................................................6 - 1
6.1 Device Response to the Reset ...........................................................................................6 - 1
6.1.1 Response to power-on.......................................................................................................6 - 2
6.1.2 Response to hardware reset ..............................................................................................6 - 3
6.1.3 Response to software reset................................................................................................6 - 4
6.1.4 Response to diagnostic command.....................................................................................6 - 5
6.2 Address Translation.........................................................................................................6 - 6
6.2.1 Default parameters...........................................................................................................6 - 6
6.2.2 Logical address................................................................................................................6 - 7
6.3 Power Save ......................................................................................................................6 - 8
6.3.1 Power save mode..............................................................................................................6 - 8
6.3.2 Power commands.............................................................................................................6 - 10
6.4 Defect Management .........................................................................................................6 - 10
6.4.1 Spare area........................................................................................................................6 - 11
6.4.2 Alternating defective sectors ............................................................................................6 - 11
6.5 Read-Ahead Cache...........................................................................................................6 - 13
6.5.1 Data buffer configuration .................................................................................................6 - 13
6.5.2 Caching operation............................................................................................................6 - 14
6.5.3 Usage of read segment......................................................................................................6 - 15
6.6 Write Cache.....................................................................................................................6 - 20

C141-E106-01EN xiii
FIGURES
page
1.1 Current fluctuation (Typ.) when power is turned on .........................................................1 - 7
2.1 Disk drive outerview........................................................................................................2 - 1
2.2 1 drive system configuration.............................................................................................2 - 3
2.3 2 drives configuration ......................................................................................................2 - 3
3.1 Dimensions......................................................................................................................3 - 2
3.2 Handling cautions............................................................................................................3 - 3
3.3 Direction..........................................................................................................................3 - 4
3.4 Limitation of side-mounting.............................................................................................3 - 5
3.5 Mounting frame structure.................................................................................................3 - 5
3.6 Surface temperature measurement points..........................................................................3 - 6
3.7 Service area......................................................................................................................3 - 7
3.8 Connector locations..........................................................................................................3 - 8
3.9 Cable connections............................................................................................................3 - 9
3.10 Power supply connector pins (CN1)..................................................................................3 - 10
3.11 Cable configuration..........................................................................................................3 - 11
3.12 Cable type detection using CBLID- signal
(Host sensing the condition of the CBLID- signal) ...........................................................3 - 12
3.13 Cable type detection using IDENTIFY DEVICE data
(Device sensing the condition of the CBLID- signal)........................................................3 - 12
3.14 Jumper location................................................................................................................3 - 13
3.15 Factory default setting......................................................................................................3 - 14
3.16 Jumper setting of master or slave device...........................................................................3 - 14
3.17 Jumper setting of Cable Select..........................................................................................3 - 15
3.18 Example (1) of Cable Select.............................................................................................3 - 15
3.19 Example (2) of Cable Select.............................................................................................3 - 15
4.1 Head structure..................................................................................................................4 - 2
4.2 MPE3xxxAH Block diagram............................................................................................4 - 5
4.3 Power-on operation sequence...........................................................................................4 - 7
4.4 Block diagram of servo control circuit..............................................................................4 - 13
4.5 Physical sector servo configuration on disk surface...........................................................4 - 14
4.6 72 servo frames in each track...........................................................................................4 - 17
5.1 Execution example of READ MULTIPLE command........................................................5 - 19
5.2 Read Sector(s) command protocol ....................................................................................5 - 68

C141-E106-01ENxiv
5.3 Protocol for command abort .............................................................................................5 - 69
5.4 WRITE SECTOR(S) command protocol ..........................................................................5 - 70
5.5 Protocol for the command execution without data transfer................................................5 - 71
5.6 Normal DMA data transfer ..............................................................................................5 - 73
5.7 Ultra DMA termination with pull-up or pull-down...........................................................5 - 84
5.8 PIO data transfer timing...................................................................................................5 - 85
5.9 Multiword DMA data transfer timing (mode 2)................................................................5 - 86
5.10 Initiating an Ultra DMA data in burst..............................................................................5 - 87
5.11 Sustained Ultra DMA data in burst ..................................................................................5 - 90
5.12 Host pausing an Ultra DMA data in burst.........................................................................5 - 91
5.13 Device terminating an Ultra DMA data in burst...............................................................5 - 92
5.14 Host terminating an Ultra DMA data in burst...................................................................5 - 93
5.15 Initiating an Ultra DMA data out burst.............................................................................5 - 94
5.16 Sustained Ultra DMA data out burst.................................................................................5 - 95
5.17 Device pausing an Ultra DMA data out burst ...................................................................5 - 96
5.18 Host terminating an Ultra DMA data out burst.................................................................5 - 97
5.19 Device terminating an Ultra DMA data out burst .............................................................5 - 98
5.20 Power-on Reset Timing....................................................................................................5 - 99
6.1 Response to power-on.......................................................................................................6 - 2
6.2 Response to hardware reset ..............................................................................................6 - 3
6.3 Response to software reset................................................................................................6 - 4
6.4 Response to diagnostic command.....................................................................................6 - 5
6.5 Address translation (example in CHS mode)....................................................................6 - 7
6.6 Address translation (example in LBA mode)....................................................................6 - 8
6.7 Sector slip processing.......................................................................................................6 - 11
6.8 Alternate cylinder assignment..........................................................................................6 - 12
6.9 Data buffer configuration .................................................................................................6 - 13

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C141-E106-01EN1 - 2
(4) Average positioning time
Use of a rotary voice coil motor in the head positioning mechanism greatly increases the
positioning speed. The average positioning time is 8.5 ms (at read).
1.1.2 Adaptability
(1) Power save mode
The power save mode feature for idle operation, stand by and sleep modes makes the disk drive
ideal for applications where power consumption is a factor.
(2) Wide temperature range
The disk drive can be used over a wide temperature range (5°C to 55°C).
(3) Low noise and vibration
In Ready status, the noise of the disk drive is only about 3.7 bels (MPF3204AH, Typical Sound
Power per ISO7779 and ISO9296).
1.1.3 Interface
(1) Connection to interface
With the built-in ATA interface controller, the disk drive can be connected to an ATA interface
of a personal computer.
(2) 2MB data buffer
The disk drive uses a 2MB data buffer to transfer data between the host and the disk media.
In combination with the read-ahead cache system described in item (3) and the write cache
described in item (6), the buffer contributes to efficient I/O processing.
(3) Read-ahead cache system
After the execution of a disk read command, the disk drive automatically reads the subsequent
data block and writes it to the data buffer (read ahead operation). This cache system enables fast
data access. The next disk read command would normally cause another disk access. But, if the
read ahead data corresponds to the data requested by the next read command, the data in the
buffer can be transferred instead.
(4) Master/slave
The disk drive can be connected to ATA interface as daisy chain configuration. Drive 0 is a
master device, drive 1 is a slave device.

C141-E106-01EN 1 - 3
(5) Error correction and retry by ECC
If a recoverable error occurs, the disk drive itself attempts error recovery. The 40 bytes ECC has
improved buffer error correction for correctable data errors.
(6) Write cache
When the disk drive receives a write command, the disk drive posts the command completion at
completion of transferring data to the data buffer completion of writing to the disk media. This
feature reduces the access time at writing.