HP HP 1660CP Series User manual

User’s Guide
Publication Number 01660-97023
First Edition, November 1997
For Safety Information, Warranties, and Regulatory Information, see the
pages at the end of this manual.
Copyright Hewlett-Packard Company 1991 - 1997
All Rights Reserved.
HP 1660CP-Series
Logic Analyzers

HP 1660CP-Series Logic Analyzers
The HP 1660CP-Series are 100-MHz State/500-MHz Timing Logic
Analyzers.
Logic Analyzer Features
•130 data channels and 6 clock/data channels in the HP 1660CP
•96 data channels and 6 clock/data channels in the HP 1661CP
•64 data channels and 4 clock/data channels in the HP 1662CP
•32 data channels and 2 clock/data channels in the HP 1663CP
•3.5-inch flexible disk drive and 540 MB hard disk drive
•HP-IB and RS-232-C controller and printer interface, Centronics
printer interface
•Variable setup/hold time
•4 K memory on all channels with 8 K in half-channel mode
•Marker measurements
•12 levels of trigger sequencing for state and 10 levels of trigger
sequencing for timing
•100 MHz time tagging and number-of-states tagging
•Full programmability
•DIN mouse and keyboard support
Pattern Generator Features
•16 output channels at 200 MHz
•32 output channels at 100 MHz
•258,048 vectors
•3-bit pattern-level sensing (clock pod)
Options include the Programmer’s Guide and the Service Guide.
ii

In This Book
This User’s Guide shows you how to use
the HP 1660CP-Series Logic Analyzer. It
contains measurement examples, field
and feature definitions, and a basic
service guide. Refer to this manual for
information on what the menu fields do
and how they are used. This manual
covers all HP 1660CP-series analyzers.
The User’s Guide is divided into four
parts. The first part, chapters 1 through
5, covers general product information you
need to use the logic analyzer. The
second part, chapters 6 and 7, contains
detailed examples to help you use your
analyzer in performing complex
measurements. The third part, chapters 8
through 10, contains reference
information on the hardware and
software, including the analyzer menus
and how they are used. There are
sections for each analyzer menu and a
separate chapter on System Performance
Analysis. The fourth part, chapters 11
through 13, provides a basic service guide.
1Logic Analyzer Overview
Connecting Peripherals
2
Using the Logic Analyzer
3
Triggering Examples
6
Using the Trigger Menu
4
File Management
7
Reference
8
System Performance Analysis
(SPA)Software
9
Concepts
10
Troubleshooting
11
Specifications
12
Operator’s Service
13
Glossary
Using the Pattern Generator
5
Index
iii

iv

Contents
1 Logic Analyzer Overview
To make a measurement 1–5
2 Connecting Peripherals
To connect a mouse 2–3
To connect a keyboard 2–4
To connect to an HP-IB printer 2–5
To connect to an RS-232-C printer 2–7
To connect to a parallel printer 2–8
To connect to a controller 2–9
3 Using the Logic Analyzer
Accessing the Menus 3–3
To access the System menus 3–4
To access the Analyzer menus 3–6
To access the Pattern Generator menus 3–8
Using the Analyzer Menus 3–9
To label channel groups 3–9
To create a symbol 3–11
To examine an analyzer waveform 3–13
To examine an analyzer listing 3–15
To compare two listings 3–17
The Inverse Assembler 3–19
To use an inverse assembler 3–19
v

4 Using the Trigger Menu
Specifying a Basic Trigger 4–3
To assign terms to an analyzer 4–4
To define a term 4–5
To change the trigger specification 4–6
Changing the Trigger Sequence 4–7
To add sequence levels 4–8
To change macros 4–9
Setting Up Time Correlation between Analyzers 4–10
To set up time correlation between two state analyzers 4–11
To set up time correlation between a timing and a state analyzer 4–11
Arming and Additional Instruments 4–12
To arm another instrument 4–12
To receive an arm signal from another instrument 4–13
Managing Memory 4–14
To selectively store branch conditions (State only) 4–15
To place the trigger in memory 4–16
To set the sampling rates (Timing only) 4–17
Contents
vi

5 Using the Pattern Generator
Setting Up the Proper Configurations 5–3
To set up the configuration 5–3
To build a label 5–5
Building Test Vectors and Macros 5–6
To build a main vector sequence 5–7
To build an initialization sequence 5–8
To edit a main or initialization sequence 5–8
To include hardware instructions in a sequence 5–9
To include software instructions in a sequence 5–10
To include a user macro in a sequence 5–11
To build a user macro 5–12
To modify a macro name 5–13
To edit a macro 5–13
To add, delete, or rename parameters 5–14
To place parameters in a vector 5–15
To enter or modify parameters 5–16
To build a User Symbol Table 5–17
To include symbols in a sequence 5–18
To include symbols in a macro 5–19
To store a configuration 5–20
To load a configuration 5–21
To use Autoroll 5–22
Pattern Generator Common Menus 5–23
The Format Menu 5–23
The Sequence Menu 5–26
The User Macros Menu 5–34
Contents
vii

Loading ASCII Files 5–36
ASCII File Commands 5–37
ASCDown Command 5–37
LABel 5–38
VECTor 5–39
FORMat:xxx 5–41
Loading an ASCII file over a bus (example) 5–42
Pattern Generator Probing System 5–44
Pod Numbering 5–44
Connecting Pods Directly to a PC Board 5–45
Output Pod Characteristics 5–46
6 Triggering Examples
Single-Machine Trigger Examples 6–3
To store and time the execution of a subroutine 6–4
To trigger on the nth iteration of a loop 6–6
To trigger on the nth recursive call of a recursive function 6–8
To trigger on entry to a function 6–10
To capture a write of known bad data to a particular variable 6–11
To trigger on a loop that occasionally runs too long 6–12
To verify correct return from a function call 6–13
To trigger after all status bus lines finish transitioning 6–14
To find the nth assertion of a chip select line 6–15
To verify that the chip select line is strobed after the address is stable 6–16
To trigger when expected data does not appear when requested 6–17
To test minimum and maximum pulse limits 6–18
To detect a handshake violation 6–20
To detect bus contention 6–21
Contents
viii

Cross-Arming Trigger Examples 6–22
To examine software execution when a timing violation occurs 6–23
To look at control and status signals during execution of a routine 6–24
To detect a glitch 6–25
To trigger timing analysis of a count-down on a set of data lines 6–26
To monitor two coprocessors in a target system 6–27
Special Displays 6–28
To interleave trace lists 6–29
To view trace lists and waveforms on the same display 6–30
7 File Management
Transferring Files Using the Flexible Disk Drive 7–3
To save a configuration 7–4
To load a configuration 7–6
To save a trace list in ASCII format 7–7
To save a screen’s image 7–8
To load additional software 7–9
8 Reference
Configuration Capabilities 8–3
Probing 8–5
General-purpose probing system description 8–8
Assembling the probing system 8–11
Keyboard Shortcuts 8–15
Moving the cursor 8–15
Entering data into a menu 8–16
Using the keyboard overlays 8–16
Contents
ix

Common Menu Fields 8–17
Print field 8–18
Run/Stop field 8–19
Roll fields 8–20
Disk Drive Operations 8–21
Disk operations 8–21
Autoload 8–23
Format 8–23
Pack 8–23
Load and Store 8–24
The RS-232-C, HP-IB, and Centronics Interfaces 8–25
The HP-IB interface 8–26
The RS-232-C interface 8–26
The Centronics interface 8–27
System Utilities 8–28
Real Time Clock Adjustments field 8–28
Update FLASH ROM field 8–28
Shade adjustments 8–30
The Analyzer Configuration Menu 8–31
Type field 8–31
Illegal configuration 8–31
Contents
x

The Analyzer Format Menu 8–32
Pod threshold field 8–32
State acquisition modes (state only) 8–33
Timing acquisition modes (timing only) 8–34
Clock Inputs Display 8–35
Pod clock field (State only) 8–35
Master and Slave Clock fields (State only) 8–38
Symbols field 8–41
Label fields 8–42
Label polarity fields 8–43
The Analyzer Trigger Menu 8–44
Trigger sequence levels 8–44
Modify Trigger field 8–44
Timing trigger macro library 8–45
State trigger macro library 8–47
Modifying the user macro 8–49
Resource terms 8–52
Arming Control field 8–55
Acquisition Control field 8–56
Count field (State only) 8–57
The Listing Menu 8–58
Markers 8–58
The Waveform Menu 8–60
sec/Div field 8–60
Accumulate field 8–60
Delay field 8–60
Waveform label field 8–61
Waveform display 8–62
Contents
xi

The Mixed Display Menu 8–63
Interleaving state listings 8–63
Time-correlated displays 8–64
Markers 8–64
The Chart Menu 8–65
Min and Max scaling fields 8–66
Markers/Range field 8–66
The Compare Menu 8–67
Reference Listing field 8–68
Difference Listing field 8–68
Copy Listing to Reference field 8–69
Find Error field 8–69
Compare Full/Compare Partial field 8–69
Mask field 8–70
Bit Editing field 8–70
9 System Performance Analysis (SPA) Software
System Performance Analysis Software 9–2
What is System Performance Analysis? 9–4
Getting started 9–6
SPA measurement processes 9–8
Using State Overview, State Histogram, and Time Interval 9–21
Using SPA with other features 9–30
Contents
xii

10 Concepts
The File System 10–3
Directories 10–4
File types 10–5
Transitional Mode Theory 10–7
125-MHz Transitional mode 10–7
250-MHz Transitional mode 10–8
Other transitional timing considerations 10–11
The Trigger Sequence 10–12
Trigger sequence specification 10–13
Analyzer resources 10–15
Timing analyzer 10–18
State analyzer 10–18
Configuration Translation Between HP Logic Analyzers 10–19
The Analyzer Hardware 10–21
HP 1660CP-series analyzer theory 10–22
Logic acquisition board theory 10–25
Pattern Generator board theory 10–28
Self-tests description 10–30
Contents
xiii

11 Troubleshooting
Analyzer Problems 11–3
Intermittent data errors 11–3
Unwanted triggers 11–3
No activity on activity indicators 11–4
Capacitive loading 11–4
No trace list display 11–4
Preprocessor Problems 11–5
Target system will not boot up 11–5
Slow clock 11–6
Erratic trace measurements 11–7
Inverse Assembler Problems 11–8
No inverse assembly or incorrect inverse assembly 11–8
Inverse assembler will not load or run 11–9
Error Messages 11–10
". . . Inverse Assembler Not Found" 11–10
"No Configuration File Loaded" 11–10
"Selected File is Incompatible" 11–10
"Slow or Missing Clock" 11–11
"Waiting for Trigger" 11–11
"Must have at least 1 edge specified" 11–12
"Time correlation of data is not possible" 11–12
"Maximum of 32 channels per label" 11–12
"Timer is off in sequence level n where it is used" 11–13
"Timer is specified in sequence, but never started" 11–13
"Inverse assembler not loaded - bad object code." 11–13
"Measurement Initialization Error" 11–14
"Warning: Run HALTED due to variable change" 11–14
Contents
xiv

12 Specifications
Accessories 12–2
Specifications (logic analyzer) 12–3
Characteristics (logic analyzer) 12–4
Characteristics (pattern generator) 12–4
Supplemental characteristics (logic analyzer) 12–5
13 Operator’s Service
Preparing For Use 13–3
To inspect the logic analyzer 13–4
To apply power 13–4
To set the line voltage 13–5
To degauss the display 13–6
To clean the logic analyzer 13–6
To test the logic analyzer 13–6
Troubleshooting 13–7
To use the flowcharts 13–8
To check the power-up tests 13–10
To run the self-tests 13–11
To test the auxiliary power 13–17
Contents
xv

xvi

1
Logic Analyzer Overview

HP 1660CP-Series Logic Analyzer
HP 1660CP-Series Logic Analyzer Front Panel
Select Key
The Select key action depends on the type of field currently highlighted. If
the field is an option field, the Select key brings up an option menu or, if
there are only two possible values, toggles the value in the field. If the
highlighted field performs a function, the Select key starts the function.
Done Key
The Done key saves assignments and closes pop-up menus. In some fields, its
action is the same as the Select key.
Shift Key
The shift key, which is blue, provides lowercase letters and access to the
functions in blue on some of the keys. You do not need to hold the shift key
down while pressing the other key — just press the shift key first, and then
the function key.
1-2

Knob
The knob can be used in some fields to change values. These fields are
indicated by a side view of the knob placed on top of the field when it is
selected. The knob also scrolls the display and moves the cursor within lists.
If you are using a mouse, you can do the same actions by holding down the
right button of the mouse while dragging.
HP 1660CP-Series Logic Analyzer Back Panel
Line Power Module
Permits selection of 110-120 or 220-240 Vac and contains the fuses for each
of these voltage ranges.
External Trigger BNCs
The External Trigger BNCs provide the "Port In" and "Port Out" connections
for the Arm In and Arm Out of the Trigger Arming Control menu.
Logic AnalyzerOverview
1-3

RS-232-C Connector
Standard DB-25 type connector for connecting an RS-232-C printer or
controller.
HP-IB Connector
Standard HP-IB connector for connecting an HP-IB printer or controller.
Parallel Printer Connector
Standard Centronics connector for connecting a parallel printer.
LAN Connectors
Connects the logic analyzer to your local ethernet network. The BNC
connector on top accepts 10Base2 ("thinlan"). The UTP connector below the
BNC connector accepts 10Base-T ("ethertwist").
Logic Analyzer Overview
1-4