Icom IC-R7100 User manual

WIDEBAND RECEIVER
IC R7100
•
Icom Inc.

INTRODUCTION
Thi s service manual describes the latest service infor-
m ation tor the IC-R7100 WIDEBAND RE CEIVER at Ihe
ti me of publ ic ation.
5verslons of th eIC-R7100 have been desi gn ed. This
serv ice manual co vers each versten.
VE RS I ON NO .VER
SION SYM BOL
#0 2U
.S .A . U SA
#03
Europe EUR
#04
Australia AU S
# 05 Germany F
RG
#06
Fran ce
FRA
To upgrade quality, all electrical or mechanicaI parts
and internal circuits are subject to change without
notlee or obligat io n.
DANGER
Use ONLY the speeified AC voltage des cr ibed on Ihe
AC powersoeket. Other voltages wil! causa receiver
d am age or personal injury.
DO
NOT louch Ihe REG UNIT after Ihe receiver is
connected to an AC eutlet. An insulated tooi must ba
used at all times.
DO NOT expose Ihe receiver to rain, snow or any liquids.
DO
NOT apply an RF signalo f m or e than 100 mW
(20 dBm)to Ihe antenna connector. This could damage
Ihe receiver's front-end.
ORDERING PARTS
Be sure 10 include Ihe following four points when ordering
r
eplac em ent parts:
1. 1
Q·dig it ord er numb er s
2. Component part nurnb
er -and name
3. Equipment model name and
unit name
4. Quantity re
cu lr ed
< SAMPLE ORDER >
111 0001 360 IC ~PC1 24 2H te- R7100 MA 1N UNIT 5 pre ces
881
0005 510 Screw FHM3 x6 ZKBS l e-R 71 00Top cov er 10pieces
Addr esses ar e prov id ed on Ihe inside back cover tor your
con venience.
.REPAIR NOTES
1. Make sure a probl em is internal bet ore disassembling
the receiver.
2.
DO NOT open the receiver until Ihe receiver is
disconnected trom a power source.
3.
USE an exlernal AC power supply 10 areceiver power
source during lesling.
4. DO
NOT force any of the variabie componenIs.Turn
Ihem slowly and sm
oo thly.
5.
DO NOT short any circuits or eleclron ic parts. An
insula te d tuning 1001 MUST be used lor all adlust-
rnents.
6. DO
NOT keep pow er ON tor a long Iime when the
receiver is detective.
7. READ
lh einsturelions of lest equipmenl Ihoroughly
betore connecting equipm
enl 10 Ihe receiver.

SECTION
SECTION
SECTION
1
2
3
TABLE OF CONTENTS
SPECIFICATIONS ...................... 1- 1
INSIDE VIEWS.....................................
.. ................. 2- 1- 2
ClRCUIT DESCRIPTION....
.. .. . .. . .... . .. .. . . .. . .. .. .. . .. . .. .. . . . . . . . 3 - 1 - 13
3 . 1 RECEIVER CIRCUITS . . . . . . . . . . . . . .. ........................................ 3- 1
3·2 PLL CIRCUITS................... .. ...... .. ...•............................ 3- 10
3·3 LOGIC CIRCUITS. . . . . . .. . . . .. . .. . . .. . . .... .................................. 3- 12
SECTION 4
MECHANICAL PARTS AND DISASSEMBLY. . _. . . . . . 4 - 1 - 6
4 . 1 FR ONT PANEL .
4 . 2 ACC ES SO RIES . . . . .. ........... .. . . . . . . .. ...... .. . . . .. . .. . . . . • .. ..........
4 • 3 CHASSIS UN ITS .
4 - 4 REAR PANEL ... .. .. . • . . . . . . . . . . . . . . . . . .. . •. •. .. . • . ...... ..... ..... . . . . .. ..
4-1
4-1
4 - 3
4- S
SECTION 5PARTS LIST .. ........................................................ 5 - 1
..... 18
SECTION 6ADJUSTMENT PROCEDURES 6 - 1 - 10
6 . 1
6'2
6 ·3
•
6·4
PREPARATION BEFORE SERVICING , .
PLL ADJUSTMENT .
LOCAL OSCILLATOR ADJUSTMENT .
RECEIVER ADJUSTMENT .
6 -1
6 -2
6 -2
6 -4
SECTION 7BOARD LAYOUTS , 7 - 1 - 15
7 . 1
7 · 2
7 - 3
7-4
7 -S
7 · 6
7 · 7
MAIN UNIT . . . . . . . .• . . .. ... .... . . . . . . . .. . . . . . . . . . .. ........... .. .... .. ....
AF UNIT .. . . .... • . . . .. .... .. . .. .. . . .... .........•.•....... .. ...... ... .. .. .
PLL UNIT .
CONV UNIT......•..•..
.. •. . ••. . .. . .. .•................. .. .... .. ....... .. .
•
LOG IC UNIT . .. ..............•...._........•. ... .. ..... ... ...... .. . . . . . . . .
R EG UNIT . . . • . . .... .. . . .. .... .• . .. . • • . . . . . . . . . . . .. ............... .. ......
DL -RE G UNIT . . . . . .. . .. ....• .. __ . . _ _ _ .
7 - 1
7- 2
7-S
7- 9
7 -1 1
7 - 14
7-1 S
SECTION
SECTION
8
9
BLOCK DIAGRAM ........................................................ 8- 1
VOLTAGE DIAGRAM
........ . .. .... .... 9 -1 - 2

• Us abI etemperature range
• Frequeney stability (in FM mode) :
• Fr eQu ency coverage
• Mode
•Number of memo ry channe ls
• Tuning step increments
•
An te nn a impedance
• Power
su p ply requ ir ement
• T
yp e of an ten na conn ector
•Current drain (at 13.8 V DG)
• D im ens ion s
• W
eight
• Rece iv e sy stem
•
In termediate fr equ en cies
• Sensitiv ity (typieal)
•Squeleh sensitivity (threshold)
• Selectiv ity
• Spur l ous re spon se rejec tion
• Aud io output power
•
Audio output impedance
•
•
•
•
•
•
•
•
VERSION FREOUENCY COVERAGE
U.SA
E ur ope
25. 0000 - 1999.9999 MHZ"
Austtaüa
Eranee 25
.0000- 87.5000 MHz
108. 0000 - 1999.9999 MHZ"
28 .0000- 29.7000 MHz
Germany 144.0000- 146.0000 MHz
4 30 .0000- 440.0000 MHz
1 240 .0000-1 300.0000 MHz
*Speelfleallons guaranteOO lor 25-1000 and 1 240-1300 MHz.
SSB (USB,
LSB ), AM (Normal, Narrow), WFM, FM (Normal, Narrow)
Memory chann e ls 900
Scan OOge ehannels 20
0
.1 ,1 ,5 , 10, 12.5, 20, 25 ,100 kHz, 1 MHz
50 0(Nominal)
117 V AC or 13.8 V
DC± 15 %(U.SA version)
240V AC or 13.8 V
DC±15 %(Europa, Australia and Franee verslons)
220 V AC (Germany version)
Type·N
Squelehed
1. 5 A
Max. audio output 1.9 A
+10 'C- + 60 'C (+14 ' F- 140 ' F)
25-250 MHz Less than ± 1.5 kHz
250-1000 MHz Less than ±5 ppm
1240-1300 MHz Less than ± 10 ppm
(0 '
C-+ 50 ' C; +32 ' F- + 122 oF)
241 (W) x 94 (H)x 239 (0) mm ; 9.5 (W) x 3.7 (H)x 9.4 ( 0) in
(Pr oj ec ti o ns not included)
6.0 kg (13.2 Ib)
SSB, AM, FM Triple-conversion superheterodyne system
WFM Double -c on vers ion su pe rheter odyn e sy stem
IF 25- 512 MHz 5 12-1 025 MHz
1st 778.700 MHz 266 .700 MHz
2nd 10.700 MHz 10.700
MHz
3rd' 455 kHz 455 kHz
*Exeept WFM (Crystal-eonverter system is adopted above 1025 MHz.)
SSB Less than 0.2 IlV lor 10 dB SIN
AM Less than 1.6
Il Vtor 10 dB SIN
WFM Less than 1.0
Il V tor 12 dB SINAO
FM Less than 0.35
Il V lor 12 dB SINAO
AM, FM Less tnan 0.35 IlV
SSB, WFM Less than 4.5 IlV
WFM (1240-1300 MHz) Less than 6.0 IlV
SSB More than 2.4 kHz/-6 dB
AM, FM (Narrow)More than 6.0
kHz/-6 dB
FM, AM (Wide) More than 15 kHz/- 6 dB
WFM More than 150 kH
z/ - 6 dB
More than 50 dB
More than 2.0 W* wilh an 8 0load
·More Ihan 1.0 W in FM narrow mode
4 -80
All stated specificatlons are subject to change without notice or obllgat lon.
1 - 1

•CONV AND REG UNITS
HPF U NIT--------
MIX IC :------ --,.
(ICI : CB34 6MIB )
Do
ubler UNIT-------
•MAIN UNIT
3rd mixer and 3rd IF clrcultsl----;
Na l ss blanker circult-------l
FM demodulator clrcu lt- - ---
WFM demodulator andl-----
WFM AGC circuits
Regulalor IC--------
(ICIO: NJM7809A)
AF power ampllf ler--- - --
(IC9: uPC1242H)
•
CONV UNIT
••
2-1
REG UNIT
c- - - - - - -- - Fuse
(F5: FGB 2A)
h---- - ----Tran sf ormer
[T2: TO·9)
----AC po we r voltage selec ter
~-+--= 4----- - Tr a n s f o r m er
(Tl :
Tp -59 (GeneraI))
: Tp·60 (FRG)
---- -BFO and SSB
demodulator circuits
'----- 5-meter squelch and
squetcn switch circuits
f-----Backup battery for clock
(BT!: CR2032)
f----Backup battery for memories
(BT2: CR2032)

• RF AND PLL UNITS
BPF1 circuit (25 -90 MHz)I----------------,
BPF2 circu it 190 -250 MHz )'----------
BPF3 circuit (250 -512 MHz)'-------~
BPF4 circuit (512 -1025 MHz)---~
RF UNIT--------
BPF centrel circuit ------
TRAP UNIT'--------
FIl2 UNIT--------
MI X2 UNIT--- ---=.----
Fll1 UNIT--------
MI X1 UNIT '--------
2-2
Pll UNIT
-------VCO UNIT
'------PLL mixer circuit
------ P DOUBl UNIT

3·1 RECEIVER CIRCUITS
3·1·1 RF CONVERTER CIRCUIT
(CONV, DOUBLER AND HPF UNITS)
The RF co nverter circuit co uverts the 1025-1999 .9999
MHz RF siçnats
to 25-1024 .9999 MHz RF signais.
The amplified signal is
ap p/ied to IC1 on the CONV UNIT
and is then mixed with RF signals coming trom ICt on the
HPF UNIT. The resulting 25- 1024.9999 MHz signais
are applied
to the RF UNIT through J2.
3·1·2 ATTENUATOR CIRCUIT (RF UNIT)
The high-pass filter attenuates the image signals bel ow
12 00 MHz and pr even ts 1 GHz (7 dBm ) LO signaIs from
en
te ring the antenna co nnector.
(2) 1025.0000
-1999.9999 MHz
RF signals trom the antenna co nnect or (J7) are appned
to a high·pass filter (strip fine. L3.
Cl - C6) on the HPF
UNIT through the 1 GHz converter swi
tc hing relay (RLt.
RL2).
(1 ) 25 .0000 -1024.9999 MHz
RF signals tr om an antenna connector (J7) pass t hr ough
the 1 GHz converter swi
tc hing relay (RL1, RL2) and
bypass Ihe RF converter circuit. The signals are applied
to the RF UNIT through J2.
02
RF UNIT
"TT CONT f-
ICS ,0 12
trom
LOOIC UNIT
IC5 (
pi n&4)
Tne attenua tor circuit attenua les Ihe signal strength 10
20
dB to proteet Ihe RF amplifier trom distortion when
excessively strong signals are re ce ived.
I CS switches Ihe power souree of tne attenuator circuit
ON or OFF by using an "A TT" signal trom the LOGIC
UNIT. Q21
an cDS2 p ro vide the converted and stabie
voltage
to IC5.
When the
[ATT] swi tc h is pushed, the CPU ( ICS. pin
64) on the LOGIC UNIT outputs a " HIGH" signal. The
"HIGH" signaI is app/ied to !C5 (pin
11 ) and activates the
attenu ato rcircuit ( R2 - R8).
The
fII tered signals are app lied la the atl enuator circuit
(
R2- R8) through a swi tc hing diode (D3). ca co rn-
pens ate sfor attenuati on when high f re quencies are
receiv
ed . The resulting signals are applied to the RF
circuit through a
sw itc hi ng di od e (D4).
When the CPU
(I CS, pin 64) on the LOGIC UNIT out-
puts a " LO W" signal, Q12 and R10G act as an inverter.
The inver
te r supp/ies a "THROUGH" signal to ICS (pin 10) ;
then, the filtered signals pass through a switchlng diode
(Dl ) and are
ap pfied to the RF circuit through another
switching diode (02).
The 2
5- 1024.9999 MHz signals are app /i ed to a band·
pass filter (strip
fi ne, L3, Cl - C6) to suppress out-ot-band
signaIs. The flltered signals either enter or bypass an
attenuat or circuit.
,
,
I
I Cl I
r-" I- ~ 6" "-< 'i ' J 1 OPF
(X l, t Ll---L..J
11 024.9999MHz
ISIQM !
I
I
,
,
,
,
I
,
I
I
I
I
I
I
CONV UNIT Fig. 1
500MH'
. 3
O.
166 .667MHz
.3
03
r-
~
0 "
1 55.555MHz
0 1 ""'-
02
OU " "/ \
AMP '--r -'
r----------,
L----o. ....... ~JIW HPF RF AMP I
_ " IC I
1025 ...... I
"..·.... .... '1 I
LHPF UNIT
----""'T-----;
I DO U BLER UNIT I
I I
, ' DOOMH' ,
, .. I----f'-----'
, Q1 ,
I I
LJ
\V
A 55 .555 MHz reierenee signal is produced by an
oscillator circuit
(X l , Ot) and is then muitiplied by three
at L2 and L3.
Th e resulting 166.666 MHz signaI is
a
mp /ified at Q3 and is then multiplied by three at Q4.
The resulting 500 MHz (0 dBm) signal is doubied
to
produce a 1 GHz (7 dBm) LO sig naion the OOUBLER
UNIT.
• RF CONVERTER AND ATIENUATOR CIRCUITS
The filter ed signaIs pass through a wide range RF
amplifier (IC
1) to provide 20 dB gain over a wide-band
trequen
cv range ano are then ap plled to a mixer circu it
(IC1) on the CONV UNIT. ICl employs a OBM (Double
Balanced Mixer). The signalsare mixed with the 1 GHz
LO signaI coming trom the OOUBLER UNIT.
3-1

3-1 -3 RF CIRCUIT (RF UNIT)
The RF circ uit ampUlies slgnals within the range ol
Irequency coverage and filters out-ot-band signaIs.
The RF ampliliers
(al -a4 ) employ gallium arsenic FIT s
(35K121). The combinatIon ol the RF amplifiers and
tuned bandpass filters expand the dynamic range and
enhance the sensitivity tor the high frequency. Each
tuned amplifier has a pp roxi ma tely 10 dB gain.
06 ...... 0 10 employ varactor diodes which arecontrolled
by the PLL loek voltage. The voltage is curr ent-ampüüed
at the OC am plil ier circuit (IC3a, ICl a) and is then applied
to the varactor diodes. These varactor diodes tune the
ce nter trequency of an RF passband tor wide bandwidth
receiving and 9000 image response rejection.
D50 prote ct sthe varactor diodes trom being charg ed
over their maximum voltag e.
1C4 lunetions as a comparator and is co ntrolled by the
BPF4 signal line. Pin 1 of 1C4 outputs positive voltage
in a frequency range of 5 12-1024 .9999 MHz, whiJ e pin 7
of 1 C4 outputs positive voltage In a frequ enc y range of
25 .oooo- 51 10 9999 MHz.
IC5 switches the power source of
BPF1 - B PF 4 ON
or OFF by using "Bl - B4" and "BH" signals from the
LOGI CUNIT. 0 21 and 05 2 pro vide the converted and
stabie voltage to
IC5 .
The 2
5- 1024.9999 MHz slgnals are applied to four
separate filters through switching diodes (
05 , 012, 019,
011, 0 18, 025) depending on the range of frequency
co verage. The relay circuit (RL1, RL 2) Is used instead
of switching diodes tor the
fr equencies above 512 MHz.
This device prevents a diode trom causing distortien
wh en r ece ivlng very strong signais.
(1) BPF1 (25.0000 -89 .9999 MHz)
The 25.oooo
-89 .9999 MHz signals pass through a parallel
resonant circuit (
06 , L 11 , C15) to suppress ha lf of the
reeeive freque ncy in terfer e nce signals an d are then
applied to an RF amplifier ( 01) via a tuned bandpass
filter (
07 , 08, L12 -L 14). The amplified signa!s are
applied to a 2nd RF amplifier (
07) through a tuned band-
pass filter (Dg, 010 , L16 -L1S ).
(2) BPF2 (90.0000
-249.9999 MHz)
The 90
.0000-2 49.9999 MHz signals pass Ihrough a
parallel resonan,circuit( 013, L22, C25) to suppress
half of the
recei ve freque ncy interference signaIs and are
the nappli ed to a series resona nt circuit (0 14, L70, C6 1)
to suppress streng signals in a frequency ran ge of BO-
110 MHz, sueh as FM and TV broadcasting stations.
The signals are applied to an RF amplifier ( 02) via a
tuned bandpass lilter (015, L23
-L2 5, C 11 9). The ampli-
li ed signaIs are applied to a 2nd RF amplifier (07)
through another tuned bandpass filler (0
17, L27- L2 9,
C1 20).
013
-015 and 0 17 employ varactor diodes whlchare
controlled by the PLL lock voltage. The voltage is
current·amplified at lhe OC amplifier circuit (IC3a, ICl b)
and is then applied to the varac tor diodes. These varactor
diod es tune the c enter Ir equen cy of an RF passband lor
w id eban dw idth reeeiving and goOO image response
re jection .
0 51 protect s varae tor diodes Ir om being negatively
charged.
oRF CIRCUIT
10
FIL1
fFll 2
UN I
_,
25.0000 89 9999MHz
-•
..
,.
1\
Ql
AF "'""
I
~!
IICB Iomp
OB- ""!'
r-, i% I
r-,
I
~
• 34 II
l-;;.
«,III
L __ .
__ .J
I178.1
....,
I
1291 .1MHz
BPFZ II
9O. 0000 - 2I 9.9999MHz
••Q' II
,DI1
LPF CONT I
'"~ LD
I
I C3b
II \~ OB
I
II
BPF 3cv lI
ne
L_
___ ....J
trom
2SO .0000-511.9999MHz VCO
UNIT
••
Q3
••
l LD
p:(I ~
Uoe
024 'rom
P' OOU BL
UN IT
N:1C CONT
AGC II n.
0
20
' rom
BPF 4
MAIN UN IT
512.. ~ .9999M HZ
\"'&0/
AF UN IT
. PFCONT CVllne
IC1,1C2 "
om
VCO UN IT
',om
ATT
clrcu ll
FIg. 2
3-2

(3) BPF3 (250.0000 -511.9999 MHz)
The 250.0000
-5 11.9999 MHz signals pass through a
high-pass filter (L32, L69, C34, C35. C51, C133) to sup-
press the interference signaIs in low frequencies. The
filter cuts out the 240 MHz frequencies. The filtered
signals are applied to an
RF amplifier (a3 )via a tuned
bandpass filter (D21. D22, L33. L34). The amplified
signaIs are applied to a 2nd RF amplifier (
07 )through
another tuned bandpass filter (D23, D24, L36, L37).
D21 ---D24 employ varactor diodes which are controlled
by the PLL Joek voltage. The voltaçe is current-amplified
at the DC amplifier circuit (IC3a. IC
2a ) and is then
appüed 10 Ihe varactor diodes. These varactor diodes
tuneIhe center frequency of an RF passband tor wide
bandwidth receiving and goed image response rejection.
(4) BPF4 (512.0000
-1024.9999 MHz)
RF relays are used instead of a diode swi tc hing system
tor signals above 512 MHz. To drive these relays, Q14
and 015 are used as current amplifiers.
The 512.0000 -10 24.9999 MHz signals pass through a
parallel resonant circuit (D26, L39, C45) to suppress half
of Ihe receive frequen
cy interference signaIs and are
then a
pp lied to an RF circuit (0 4) via a tuned bandpass
filter. The amplified signaIs are applied to a 2nd RF
amp lifier ( 07 )through a tuned bandpass filter. The tuned
bandpass filtersconsist of a strip line and 0 27
-03 0and
ensure stabie operation at high frequencies.
The voltage is current-amplified at the De amplifier circuit
(/C3a. IC3b) and is then applied to the varactor diode
s.
These varactor diodes tune the center frequency of an RF
passband tor wide bandwidth receiving and goed image
response rejection.
The signaIs from the tuned notch
circu it are applied to a
low-pass fiiter (strip line, C78, C82, C85. C89,
CI 3?) to
suppress high harmonie components
of the 1st LO signa !.
The filtered signals are applied to a 1st mixer circuit.
3·1·5 TUNED CONTROL CIRCUIT (RF UNIT)
The tuned control cir cuit converts the PLL loek voltage to
tuned voltage tor the BPFI- BPF4 on the
RF UNIT and
the tuned notch
circ uit on the TRAP UNIT.
Fig. 3 shows the relation between the PLL loek voltage
and each tuned voltage. in the
BPF1 -BPF4 on the RF
UNIT and tuned notch
circu it on the TRAP UNIT.
•PLL LOeK VOLTAGE AND TUNED VOLTAGE
D27 -0 30 employ varaetor diodes which are controlled
by the PLL loek voltage. The voltage is eurrent-amplified
at tne DC amplifier circuit (IC3a, IC2b) and is then applied
to the varactor diodes. These varactor diodes tune the
center frequeney
of an RF passband for wide bandwidth
reeeiving and good image response re
je ction.
(5) 2nd RF AMPLIFIER
The 2nd RF amplifier (07) employs a wide frequency
band amplifier with approximately 10 dB gain.
The 25.0000
-1024 .9999 MHz signaIs from tour separate
filters are applied to the 2nd RF amplifier
(07 ). The 2nd
RF amplifier has a feedback
cir cu it (L42, C67, R47) to
obtain stable gain in the wide frequency range. The
amplified signaIs are then applied 10 a tuned notch circuit.
3·1·4 TUNED NOTCH CIRCUIT (TRAP UNIn
The luned notch circu il prevents the 1st Lü signal from
enlering the antenna connector.
This circuit consists
of a strip !ine and 031 -034 .The
noten frequency is adjusted to mateh the 1st
Lü frequency
by acontrol voltage coming from IC 3b (pin 1) .
D31--D 34 employ varaeter diodeswhich are eontrolled
by the PLL lock voltage.
The PLL lock voltage
(CV) passes through the DC amplifier
(IC3a) to convert the impedance and Is then applied to
the operational amplifiers (ICl a, ICI b, IC2a, IC2b, IC3b).
Pin 1
of ICI a supplies a tuned voltage to BPF1 . R68
and R66 control the gain and offset voltage
of ICl a
respeetively.
Pin 7
of IC1b supplles atuned voitage to BPF2. D53
and R157 adjust the gain voltage
of tCIb to fit the
characteristl
cs of BPF2.
Pin 1
of IC2a supplies a tuned voltage to BPF3.
•
3-3

Pin 7 ol lC2b supplies atuned voltage to BPF4. Q9 and
010. switch Ihe gain and ortset vollage ol IC2b ON or OFF
and convert the varlalions
of 2 PLL loek voltages lnto a
continuous tuned voltage.
Tabla 2 shows Ihe retatlon between receive frequency
and 1st IF Irequency.
Pin 1
ol IC3b supplies aluned vollage to Ihe luned neten
clrcuil on Ihe TRAP UNIT.
011 swilches Ihe offset voltage
ol IC3b ON or OFF and
converts the variations
of 2 Pll loek voltages into a
continuous luned voltage.
RECEIVE FREOUENCY [MHz] 1
et IF FREOUENCY [MHz]
25- 89 .9999
778 .7 (FI1)
90- 249 .9999
778 .7 (Fll)
250- 511 .9999
778 .7 (FI1)
512 -1024.9999
266 .7 (FI2)
Tabl.2
Fig. 4 shows the character isties of the 1st IF filter.
3·1·6 1st MIXER CIRCUIT (MIX1 UNIT)
'lST IF FILTER CHARACTERISTICS
I
I
I
I
I
I
I
I
I
I
'0. Frequency
Fig. 4
I, -21 .4
MHz
c
o
äi
"
;-
_co
->
<o!!
The 1st mixer circuit converts Ihe received signailo a
IIxed Irequency ol the 1st IF signal wilh a PLL output
frequency. By changing the PLL frequency, only the
desired Irequency will pass Ihrough the
FIL1 UNIT or
FIL2 UNIT al the next stage of Ihe 1st mixer.
A778 .7-1291 .7 MHz (0 dBm) lst LO signal is applied
la abandpass 111Ier (strlp line. L78. Cl34 . C59. C77. C53-
C55) on tne MIXl UNIT to suppress unwanted signals
Ihrough
Pl from Ihe PLL UNIT. The filtered slgnal is
amplified at Ihe 1st LO amplifiers
(05. 06). The 1 st LO
amplifiers
(05, 06) employ wide frequency band amplifiers
wlth approximalely 10
dB gain and amplify the 1st LO
signaI
la approxlmalely 10 dBm.
The
25.0000-1024.9999 MHz slgnals are mixed al ICS
with Ihe 1st LO signal la produce a266.7 or 778.7 MHz
1st IF signal. ICS employs a DBM (Double Balanced
Mixer).
Tabla 1shows Ihe relation between receive frequency and
1sI LO frequency.
(1) FIL1
CIRCUIT (25-511.9999 MHz)
The 778.7
MHz 1st IF signal is applied to an inductlve \
bandpass
li lter (Fll) to suppressout-of-band signais. Fll
sets Ihe center frequency at 778.7 MHz and covers a
5MHz bandwldlh. The fillered signal is applied to a noten
filter (L51. C79)
la suppress Ihe image interference signal
(757.3 MHz).
RECEIVE FREOUENCY [MHz] 1
st lO FREOUENCY [MHz]
25 -
89 .9999
803 .7 - 868 .6999
90- 249 .9999
868 .7 -1028 .6999
2
50 - 511 .9999 1 02 8.7- 1 290 .6 999
512-1024 .9999 778.7-1291.6999
roble 1
3·1·7 1 st IF CIRCUIT
(RF, FIL1AND FIL2 UNITS)
(2) FIL2 CIRCUIT (512-1024.9999 MHz)
The 266.7 MHz 1st IF slgnal Is applied
la ahelical
lilter (L46. L47) to suppress out-of-band signa ls Ihrough
a series resonant circu
it (L73.C66). The helical filler
sets the
center frequency at 266.7 MHz and covers a
5MHz
bandw ldlh . The filtered slgnal passes Ihrough a
nolch fliler (L67. L68. CS8) la suppress Ihe image inler·
ference slgnal (245.3 MHz) and is then applied to series
resonant clrcults (L74. C90). The series resonant circuits
atlenuate out-ot-band signais.
The 1st IF signal (226.7
or 778.7 MHz) Is applied to a
1
st IF amp lilier (08) providing approxlmalely 10 dB gain
over a wideband frequency range.The 1st IF amplifier
emp loys afeedback circuit (L43. C72. R56) la oblain
stabie gain in
Ihe wlde Irequency range. The 2nd IF
slgnal is applied 10 t\Yo separate filters depending on Ihe
receive frequency.
The 266.7
or 778.7 MHz 1st IF signal Is applied la alow-
pass filter (str ip line. C139-C141) la suppress tne high
harmonie components on t he RF UNIT.
3-4

3·1·8 2nd MIXER CIRCUIT (MIX2 UNIT)
The 2nd mixer circuit converts Ihe 1 st IF signal to a 2nd
IF signa I.
A256 or 768 MHz (0 dBm) 2nd LO signaI is applied 10 a
1 GHz cutott
lew -pass filter (strip line, Cl04, C105, C146)
on the MIX2 UNIT 10 suppress
Ihe high harmonie com-
ponents through P3 from the PLL UNIT.
The filtered signal is ampllfied
al Ihe 2nd LO amplifiers
(016 , Q17). The 2nd LO amplifiers (Q16, 017) employ
wide frequency band amplifiers with approximately 10 JB
gain and amplify Ihe 2nd LO signal to approximately 10
dBm . The amplified signal is applled 10 an attenuator
circuit (R116, R118).
3·1·9 AGC BUFFER AMPLIFIER CIRCUIT
(RF UNIT)
The AGC voltage shifts from approximately 4V 10 0V.
The AGC buffer amplifier (020) shifts approximalely 1.5 V
to the minus voltage thaI Ihe RF amplifiers (01-04)
require .
3·1·10 2nd IF CIRCUIT (RF AND MAIN UNITS)
The 10.7 MHz 2nd IF signal is applled 10 a low-pass filter
which cuts off Ihe frequencies around 400 MHz. The
filter consists of a strip line and C142 -C144 and
prevents Ihe
high harmoniecomponents from entering
tne 2nd mixer (IC7) on Ihe MIX2 UNIT_
The 266.7 or 778.7 MHz 1sI IF signal is mixed
al IC7 wlth
the 2nd LO signaI to produce a
10_7 MHz 2nd IF signal.
The 10.7
MHz 2nd fF signaI is output trom IC? (pin 1) and
is Ihen applled 10 Ihe RF UNIT_
IC7 employs a OBM
(Double Balanced Mixer).
Tabla 3 shows Ihe relation between reeerve frequency
and 2nd LO Irequency.
The filtered signaIpassesIhrough a2nd IF amplifier (018)
wilh approximalely 20 dB gain and is Ihen applled to the
MAIN UNIT Ihrough J4.
Aportion
of Ihe 2nd IF signal output from IC7 passes
through abuffer-amplifier (019) and is then applied to a
20 MHz cutoft low-pass filler (L60,
Cl14 -C116 ). The
fillered signal is applied 10 Ihe [IF OUn jack on the rear
panel.
RECEIVE FREOUENCY [MHz] 2nd LO FREOUENCY [MHz]
25-
89.9999 768
90- 249.9999 768
250-511.9999 768
512
-10 24.9999 256
Tabla 3
In WFM mode, lhe 10.7 MHz 2nd IF signal passes Ihrough
Ihe IF amplltiers (1.1, 055) and is then applied to a high·
quality
eerarme filler (Fll) coverlng the 230 kHz (3 dB)
bandwidth. The filtered signal is amplified
al 014 and
is then re-amplifled at
iCl1 . 014 and IC11 provide
appro xlmately 40 dB gain in WFM mode. The ampllfied
signal passes through another hiqh-quallty ceramlc filter
(F12) covering the 230 kHz (3 dB) bandwidth and is Ihen
applied 10 Ihe WFM demodulalor circuit.
• IF CIRCUIT
In other modes, the 10.7 MHz 2nd IF signaI is applied 10
apair of crystal filters (FI3) covering a ±7 .5 kHz (3 dB)
bandwidth
in order to obtain wide selectIon capability
and to pass only desired signaIs. The fil1ered signal is
applied 10 021.
FILZ UNIT
MAIN UNIT
I.
r----I<f--
WFM
circuit
I.
'----I<f--FM .AM .SS8
circuit
I
I
I
I
I
I
I
I
I
I
I
AGC I
IIM
I
I
l~ I
MAIN UNIT I
I
I
I
I
'""
LO
IIM
r-;;';;;-;;;;;-l
IIC7 I
I • 10 .7~z
I X •
I I
I768MHZ I
I ~ I
I2!>6MHz I
I ,.dLO I
I/ \ ~ 017 1
L_I- __ ...J
Fit /
7787Mz
(RX IntQ :2S ...... S11 .9999MHz)
r-------...,
I
I
I I
I I
r--------...,
I" .lM"' I
I\ F' / I
I I
L __ ~~~: __ J
(RX IreQ :S1 2- 1024.9999MHz)
RF UNIT
,,~
pu. UNIT Buller
r:
L......1
V
>- - ---+
0'9
IIF OUT)
JACK
Fig. 5
3-5

3·1·11 NOISE BLANKER CIRCUIT
(MAJN UNIT)
The noise blanker circ ui t effec tive ly reduces in terference
trom pulse-type norse sucn as car ign it ion systems and
functions in only SSB and AM modes.
A port ion of the 2n d IF signal output (drain of 021) Is
appli
ed 10 the noise amp lifier (IC14) and is then detected
at the noise detector circuit (046, 047 ). The detected
voltage is applied
to a noise blanker switch (027).
The threshold level of lhe noise blanker swi
tc h (027)
is set at approximately 0.3 Vhigher than thaI of 0 26 to
avoid malfunctions when the operating frequency or mode
is changed. When the detecled voltage exceeds the
tnresnold level, Q 28 output s a blanki ng siçnal to activate
the
no ise blanker gate circuit (030- 0 32).
Aportion of the detected voltage is a pp lie d la a nolse
bianker AGC circuit (026) . The Ihr eshold level of the
no ise blanker AGC circuit (026) is set at 0.6 V. The
nolse components are led back
la the norse amplifier
(IC14) throu gh a OC amplifier (0 25). The time constant
of the naise blanker
AGC circuit is determ in ed by R206.
R209 and C129. This AGC circuit does not det
ect putse-
type norse.
The filter ed signal is ap plied to the 3rd IF amplifier circuit
(022 . 023) and is then applied 10 the demodulator circuits,
3·1·13 WFM DEMODULATOR CIRCUIT
(MAIN UNIT)
The 10.7 MHz 2nd IF signal output from FI2 is applied to
pin 1 of IC12
to demodula te tne 2nd IF signaI into an AF
signa!.
IC12 contains a
li miter amplifier, a filter, an FM detector
and asignal meter circ
ui t.
Input signaIfrom IC12 (pin 1) passes the limiter amplif
ier
an d the filter sections of IC12. Tha filtered signal is
demodulated into an AF signa! by using the FM detect or
sect ion of IC1 2and the other components (Xl, L2 .R128,
C72. C73. 026).
A varactor diode (
026) adjusts the distortion of the center
frequency in a ce ramic discriminator (X l) by changing its
voltage.
The AF signal is output from IC1 2 (pin 6) and is then
applied
to the buff er amplifier (016) for AF signaI switching
and AF signal level adjustment in other modes.
WF M9
• WFM DEMODULATOR CIRCUIT
046 turns Ihe noise blanker circuit ON or OFF. While
pulse-type signals a
re received, Q46 tu rn s Q28 ON.
Therefore. tne naise blanker gate circuit (0
30- D32) is
r
ever se·bias ed to cut OFF the 2nd IF signa!.
3-1 -12 3rd MIXER AND 3rd IF CIRCUITS
(MAIN UNIT)
The 3rd mixer circuit couverts the 2nd IF signal to a 3rd
IF signal wit h the 3rd LO signal.
The signal output from the noise blanker gate circuit
( 03 0- 032) enters the 3rd mixer circu it (IC13). IC13 is
a OBM (Double Balanced Mixer).
2 ncl 1 1"
""'"
'"
9
Vc<
,
~
"FILTER FM
DE T. •
-,AMP
«
•
ONO
~ l
,, ,
L2 X j ~
... ...,0
R128
~
A 10.245 MHz 3rd LO signaI is oscillated by (029 , X2)
and is then applied to the 3rd mixer circuit to produce a
455 kHz 3rd IF signal. C132 provides frequen cy control.
The
455 kHz 3r d IF signaI output fro m IC13 (pin 3) passes
through an impedance converterC L7. C97) and is then
applied to three separate, high-quality
ce ramic fi lters
(FI4- FI6) depending on the mode.
(1) SSB MODE
The 455 kHz 3rd IF signal is applied to FI4 covering
2.6 kHz of bandwidth in SSB mode.
(2) AM/FMN MODES
The 455 kHz 3r d IF signal is app lied to FIS co verin
6.0 kHz
of bandw idth in AM or FMN mode.
(3) FM/AMW MODES
The 455 kHz 3r d IF signal is applied to FI6 covering 15.0
kHz
of bandwidth in FM or AMW mode.
3
-6
Ag . 6
3·1·14 WFM AGC CIRCUIT (MAIN UNIT)
The AGC (Automat ic Gain Control) circui t reduces signal
fad in g and keeps the audio output level constant.
The strength of the 2nd IF signal is de tecte d at the s ignal
meter circuit section of IC12. The detected voltage is
ou tput from pin 3 of I C1 2depending on the signaI strenglh
of the input voltage (IC12. pin 1).
0 15 is a
oe buffer amplifier. When the input voltage ol
IC12 (pin 1) becomes stronç, the base
vo ltage of Qf6
increases. Therefore, 0 15 turns Q16 ON to cut olf the
AGC vo ltage.
01 9 and 0 20 are OC buff er amp lifiers providing gai n
con
tr ol to pin 1 of IC11. 05 6provides gain conlrol to
0 55 and 01 4 by changing its voltage.

3·1·15 BFO AND SSB DEMODULATOR
CIRCUITS (MAIN UNIT) 3·1·17 AM DEMODULATOR CIRCUIT (MAIN UNIT)
The BFO (Beat Frequency O sc illator) circuit consists of
Q
41 a nd Q42. The os ci llato r p ro vides a beat fre qu en cy
signaI to the SSB demodulator circuit (
039- 042) lor
de modulating the 3rd IF signal into an AF signal. The
BFO freque
ncy is adjusted at L4 in SSB mode.
In LSB mode, the CPU (IC5, pin 74) on the LOGIC UNIT
outputs a "HIG
H" signa I. The "HIGH" signal furns 040
ON. Therefore, the capacitance of
CI80 and C181 is
added to L14, C182 and C183 to increase the BFO
oscillatlon by 3 kHz.
The 3rd IF signal o
utp ut from 023 is buffer-amplified
at 0 30 and is th en applied to an AM de modulator circu it
(C168, 057) to be cemod u ta ted into an AF signal.
The AF signal is applied to a bufferamplifier (039) to rAF
sig nal sw it ching and AF s ig nal level adjustment in ather
modes.
3·1·18 AM/SSB/FMN AGC CIRCUIT
(MAIN UNIT)
The AF signaI outputfrom Ihe SSB demoduiator circuit
(
039- 04 1) Is applied to abuffer amplifier ( 02 4) for AF
signa1switching and AF signal level adjustment in ether
modes.
3·1·16 FM DEMODULATOR CIRCUIT
(MAIN UNIT)
A portion of the 3rd IF signal output from 0 30 is applied
to an
AGC detec to r ci rc u it. Th e AGC voltage is detected
at
056 and is then applied to a OC amplifier ( 03 8).
In AM or SSB mode, the
"A M9" or "SSB9" line becomes
"HIGH
." The "HI GH" signaI turns 0 34 and 035 ON.
Th erefore, R246 shortene th e time co nst ant. C 161 end
R247 are connected in
pa rallel with the AG C t im e
constant line 10 obtain an appropriate ti me constant.
The 3rd IF signal output trom 023 Is buffer-a mp lified
at
030 and is then appl ied 10 alimiter amplifier (ICIS) to
elimlnate the AM signal components.
The signaIoutput f
ro m IC15 is a pp ll ed to a ce ramie
dis cr iminator (X3) to be demodulated into an AF signal.
The AF signal is appliedto an
ac tive filter circuit (03 1,
0 32) to suppress the signaIs below 300 Hz.
In FM
mo de, Ihe "F M9" line becomes "LOW." Th e
"L OW" signaIturns 035 OFF. Therefore, C162 and
R246 are connec
ted in par all el wi th the AGC ti me co n-
stant line 10 obtaln a reold AGC release time.
R248 and R249 offset the AGC voltage to approximateiy
4V when receiving no signa
!.
When the scan is in eperation. the CPU (IC5, pin 91) on
the LOGIC UNIT outputs a "H iGH" signal tor 35 msec. on
the
"IFB K" signal line. The "HIG H" signal turns 0 36
and
037 ON to reset the AGC circuit.
oDEMODULATOR AND AGC CIRCUITS
>IX DET
015,01610 ~-l---ê~;}---[:;~~
RF
U NI T
r-----r------1
AF. mp
028
c.nt
.Ignal
o
Xl
10. 7MH:
0.1 BuHer
MIX
IC13
Fi'
r---------l
I lF omp I
o
AF."",
~
::- -K~J f- 1 FM DETE CTOR 018
?
:- --j ~~ LJ - 1 LIM ITER f-~-1 ; >- -l +- _ . WFM
I C1 2l Ignai
IF amp IF Imp
A ,. r eu
IF .m p
055
029 I
~ i"
r-,
~ .
sso
IV"/ NB SW 455k
H:
SS8 DE TIlgl'Ill
I030
..... 032 I
'X
"V
03a ..... 0. 2
-
~2
/'
0"
.SSO II
OF O
II. 56.5 Of
453 .5kH:
A OC
Noll e amp WI
DTH 2.8MH: ACe
Isignai
~ ,.
Icsc
sl N. "" IIM
"V
0 29 11 0
I
'- VIè
1\ FI.
II• IFI~
&.l il .,
IW
IOT H e .O MH:
02 2,
~O
I1
NolS8 b lanker circuIt IFIS /
L _________ .
.2
VV
10 . 2. ~ Hz
W IOTH 15.0 MHz
FIO /
AF.mp
030
N<
l-
N< DE T
r-"
IlgMI
ACe
AOC DET
OOT
V0 ..
.~.,.,
IIM 0
5& ,038
limit"
M- Imp
•N C15
FM DEr 1'!1.31,O32
050
FM
/'
X3,, 048.04a V
.I gro ll
10 .7MHz
WFM
'l g ~ '-+l H
from 025
RF
UNIT
~
FM,AM
Iignal
FIg. 7
3-7

3·1 ·19 AF AMPLIFIER CIRCUIT
(MAIN AND
LOG IC UNITS)
The AF signaIoutput trom Ihe demodulator c ircu its is
amplified al Q49. The amplified signal passes through
asquetcn sw i lch (al) and is then applied la I CS (pin 2).
Pin 8 of Ica is connected with tne "AFUD " signal line
from Ihe LOGIC UNIT . The audio outpul level Is var ied
by the [AF GAIN] control (Rl) on Ihe VR UNIT and is
Ihen applied la IC21 (pin 7) on tne LOGIC UNIT through
Ihe
"AFG" signaIune. The signaI is applied to IC8 (pin
8) on Ihe MAIN UNIT. The AF signal is output trom
ICS (pin 3) and is theil power-amplified at an AF power
ampl ifier(IC9) 10 dri ve aspea ker .
The amplified signal passes Ihrough a voltage limiter
circui t (Oa, 09, R49) and is Ihen applied 10 acomparator
(IC3b, pin 5). The noise sque
lch relerenee voltage is
applied la pin 6ot IC3b and is varied by tne (SOUELCH]
control on Ihe VR UNIT. R5t adjusts tne input level of
IC3b (pin 6).
The noise souelch is
oulpul from IC3b (pin 7) and is then
applied
la Ihe base ol 047 Ihrough 010 . 051 sno rt-
c ircuits tne output Irom IC3b (pin 7) in SSB mode.
3·1·21 S·METER SaUELCH AND S·METER
CIRCUITS (MAIN UNIT)
The AF amp lif ier (011) amplil ies Ihe "VOIC" signal Irom
I he optional UT ·36 VO ICE SYNTHESIZ ER UNIT on the
SPEECH UNIT.
The s-meter squelchrunenons in any mode. The AGC
voltage is inverted and amplified at 1C4 a. The siçnal
outp ut Irom lC4a (pin 1) passes Ihrough 0 11 and is Ihen
applied la a
comparator (lC4b, pin 6). The "ADSM"
v oltage line Irom 011 is applied la IC15 ( pi n 5).
3·1·20 NOISE SaUELCH CIRCUIT
(MAIN UNIT)
The noise soue ren fu nctia ns in AM or FMN mode. Some
naise
components in the AF signa! trom the ceram ic
discrim inator (X3) are applied to an active filter (IC17 ).
The active filter (lC17) amplifies naise camponents of
frequencie s 20 kHz and above, and outputs the resulting
signals from pin 1. Output signals are rectified at tne
doubler circu il (059. 060 )and are then converted la OC
voltage .The rect ified notse voltage passes through a
differenlial ci rc uit (C179, R266) and is then applied to a
OC amplifier (IC3a, pin 3).
When the scan is in operalion ,the CPU (IC5. pin 91) on
Ihe LOGIC UNIT
outputs a "HIGH " signal lor 35 msec . on
Ihe "IFBK " signal line. The "HIGH "signal lurns 036
and 037 ON to deactivate the squetch circuit. The
pu lse-type signaI Is applied to C179 thro ugh 055 to r rapid
charging .
•
5-METER SQUELCH CIRCUIT
The s-rneter squelch retere nce voltage passes thraugh a
OC ampli
lie r (07) and Is Ihen applled la Ihe comparator
(IC4b.pin 5) Ihrough
016 and is varied by Ihe [SOUELCH]
con
tr ol on the VR UNIT. R66 adjusts Ihe input level ot
lC4b (p in 5). Th is re ference vollage is added to the S-
meier vollage and is Ihen applled la the (S.METER] on
Ihe FRONT PANEL Ihrough 0 15 to indi cate Ihe s -me rer
sque lch threshold level.
The s-rneter squelch is
outpui Irom lC4b (pin 7) and is
Ihen app lied to the base of 047 Ihrough 017 .
3 -1 ·22 SaUELCH SWITCH CIRCUIT
(MAIN UNIT)
047 switches 02 ON or OFF depending on Ihe output
le vell rom Ihe cornoarators (IC3b. lC4b ). 03 controts
Ih e ga te vo l lage of 0 1 by using Ihe collec lo rvoltage of 0 2.
Q1 cuts out the AF signaI when the sq
uelc h is closed.
02 outputs a " BUSY" signal la Ihe LOGIC UN IT and lighlS
up the (BUSYI in di calor on Ihe FRONT PANEL when the
squelch is open.
]
I
1
"
SOUEIDi
CONT
11gna'
0"
02 .03
from uxnc UNIT
Rzg2 070
AD SM 1I~
t-
.03
•
-
"
IC' •«
• e 2
N:lÇ
-
~"
IC 4b
lino ,
.,.
e-."
~1?
,.7
çJ; RSi
•,.
•
•«
«N
Ir -
0
.73
•
S 'mele,
."
nee
~1S
0,.
.70
'7'
J.
fil·
~
-
•
~
««
•
I.
•
:t
~7
SOl2
<:
"""
FRON l PANEL
[SOUELCH) VOL
gV Ilne FI
g. 8
3 - 8

3·1·23 VSC CIRCUIT (MAIN UNIT)
The VSC (Voice Scanning Contral) dele ct s the AF signal
dUling scanning and skips undesired signaIs such as
unmodulated signaIs. beal signaIs and
nor se component
signa/s.
The AF signal outpul Irom Ihe squelch switch (0 1) passes
Ihrough an
acli ve lilter circu il (ICl a, R6 -R13 , CG- Cl 0)
which a lte nuates the components of frequencies 1 kHz
and above. The filtered signa' is amplified sulticiently
al
ICl b and is Ihen detecled at 02. Tbe detected voltage
is charged at
elS and is then applied to a comparator
(IC2b). Pin 7 of IC
2b outputsa"HIGH" signaI only when
receiving AF signaIs.
e15 and R22 set the charge time. The release time is
se tal R23.
04, OS and OS2 control a relay circuit (R L1 ) lor the
[REC REMOTE] jack on
Ihe REAR PANEL. RL1 Is turned
ON by the " M
O" signal Ir om Ihe LOGIC UNIT when
receiving AF siqnals.
VS Coperation is given priority even
when the squelch is open. When the
VSC function is
a
cli vated, RL1 is turned OFF by the "M O" signal trom
tne LOGIC UNIT.
3·1 ·24 CENTER DETECTOR AND CENTER
METER CIRCUITS (MAIN UNIT)
The centerdetector circuit adjusts the center frequencies
ol Ihe IF signaIs in the WFM and FM demodulator
circuits.
R2 24 adjusts the mismatch of the center frequencies by
using tne offset vollage fr
om R224, R 22S and R229.
The center signaI passes through a
De amplifier (Q1 7or
04 3). The amplilied signal is inverted and amplilied at
IC
2a .
•CENTER DETECTOR CIRCUIT
The resu
l1 ing signaI is outputtrom IC2a (pin 1) and IS
Ihen applied la I C1S (pin 4).
The center signaI is applied
la awindowce rn parator
(ICSa, ICSb).
R76 adjusts tne
olfsel vollage 10 0Voutput from I CS
when Ihe receive trequency is mat ched with the center
frequency.When the receive frequency is not matebeo
with the center Irequency, Ihe
ca thodes ol 016 and 0 19
become " HIGH
." The scanning control circuit prevents
malfunction caused by adjacent channels and spurious
emissions.
3·1·25 SCANNING CONTROL CIRCUIT
,
(MAIN UNIT)
Output signaIs from tne sque lc h and center delector
circuits are applied to the base of 0 9. 0 9 turns OFF only
when bath
of them are "LOW." In otner words, 0 9 turns
OFF when the squelch is open in the center frequency.
The coltector of
09 provides the "STOP" signal la Ihe
LOGIC UNIT. The "STOP" signaI becomes
"H IGH" when
the scanning tunetion stops. When the scan is in
operatlon, Ihe CP U (IC S, pin 9 1) on tne LOGIC UNIT out-
puts a "H IGH" signal tor 35 msec. on the "IF BK" signal
line. The "HIG
H" signaI is applied to D66 and turns
Q9 ON 10 deactivate the scanning circuit. Q6 and D20
turn OFF the output from the center detector
circ uit in
SSB mode.
3-1-26 IF FILTER SWITCHING CIRCUIT
(MAIN UNIT)
The mode signaIs Ir om Ihe LOGIC UNIT select tne IF
filters in the separate modes by using the diode matrix
(OSl, OS2 , 067 , D66), tne mode voltage switching circuit
(033, 046, OS3, OS4 )and avoltage buffer (I CG). The
voltage buffer (I
CS ) co nv erts Ihe mode signals la the
needed l
ev els to dr ive each mode.
W FM9
IC12 -
........
AF s lgnal
'"
X;
M
10.7MHz RI38 a:
WFM
)
DET R137
-0
fl 1
'"
R320 10
11 1
ö1
CENTE
r
C'RCU
455kHz
R22 0
R2
l9
WFM9
M
M
'"
AF slgnal
~l
'"
0 43
Cl" 1a: R228 0
61
,çi
SOl.
h
"I~ '" R276 slgnal
119
•
03 01"
'"
'"
-;~
o '"
'"
FM DET a: 0
!;>
.....
X3
~
0>
'"
R218 0>
LimIter
..
'"
~
R222 R225 0a:
r::
-'"
'"
0>
'"
°l
l~
a:
C137
"-' C15
,d,. a:
:!l
0>
M+0>
'"
°l
:l!~
..
15
1
'" -
0a: 9V
R
IT
FIg. 9
3-9

3·1·27 TIMER CONTROL CIRCUIT
(MAJN UNIT)
013 controts a relay circuil (RL2) for Ihe timer function.
The CPU (ICS, pin 34) on
Ihe LOGIC UNIT outputs a
"HIGH" signal w~en the [TIMER] switch is pushed
OUT. The " HIGH" signaI is applied 10
013 through Ihe
"POC" line and lurns RL2" ON.
3·1 ·28 REGULATOR CIRCUIT (MAIN UNIT)
ICtO is avoltage regu lator prov id ing a sla bj e 9 V 10 tne
MAIN and RF UNITs.
3·2 PLL CIRCUITS
3·2 -1 GENERAL
The PLL circuit oscillales a 1st LO frequency (778.7000
-1291 .6999 MHz) tor Ihe lsl mixer circuil on Ihe MIX1
UNIT and a 2nd LO frequency (2S6 or 768 MHz) tor Ihe
2nd mi xer c ircuil on Ihe MIX2 UNIT. The IC-R7100
uses a helerodyne down conv erter PLL system. The
heterodyne down converter PLL system employs a mixer
circuit in Ihe PLL loop circu it to cut oft Ihe h igh tre-
quency components by mix ing Ihe frequencies when
the VCO frequency exceeds Ihe maximum frequency
that the PLL IC can divide.
•PLL CIRCUIT
389.35 -645 .84995MHz
I C6
r---------,
Iv
coi
389.35_ 514 .3995 I
1I,I
1 v- 05 I
I 01 ,02 1
15,16 CHARGE I- -l LOOP FILTER 1-- ..., 1 ,..., H
1--,
PUMP I I
I
VCQ2
02,03 IC2.0",OS. 06 514 .35 -645 .84995 I
I "" I
I DW I
I
03 .0' I
IVCO UNIT - I
1 ...J
P.o
" N
•
I C'
10kHz
I
PRE-
SCA LEA I- __ ~~~ :=; ~== ~
1164.1/65
"
10.n
ose
3<3.2 ~
J.43 .20995 MHz
12 .8MHz
11 .
IC6
IC10
r-----j
L_ -
-f I- 01 I
IX2 i
I IC10,02 I
I 01 ,02
36 .000- 1~ ~ ~ ~J
36..'MHZ ...1..
• - ( "'~ - - ~ 1 2 M H Z. DIA COl1YeI'tet'
xr
151 ro
!S lgnal
178 .7 .....
1291 .6999MHz
307 .2MHz
X3
017
ose
""
016
r- __ .::;'53 .8MHZ
I I"!!:"lo'
V
010
X2
01'
X5
0 20
768 .tltr.lHI.
X3
022
Fig. 10
3
-10

3-2-2 REFERENCE OSCILLATOR CIRCUIT
(PLL UNIT)
The IC-R7100 employs tw o reference oscillator c ir cuits.
The 51.2 MHz reference oscillator circuit consists of
Q16 and
X2 . The 51 .2 MHz reference frequen cy is
appli ed to a bu lter amplifier ( 02 8). The amplitied signal
enters a buffer amplifier (0 13) or atripier ( 017) or a 2nd
l O circuit.
The output signal
hom the V OO circuit either passes
Ihrough a three-stage le w-pass filter (L59 -L 61, C147-
C152) and is Ihen applied 10 tne P OOUBL UNIT or is
amplifi
ed al IC3 and is Ihen applied 10 ICS to be mixed
with a reference treouency trom 1C9 .
The resultîng signal trom Ica is applied 10 alow -pa ss filter
circuit (114,
US ) 10 elimina te spurious signals and is tnen
buffer-amplified al 0 15. The amplified signal is applied
10 Ihe PLL IC (I CI. pin 8).
The reference frequency trom the buffer-amplifier (0 13)
is Ihen divided by 4 al I CS aOO applied 10 Ihe PLL IC
(IC1, pin 1).
The 51.2 MHz refere
nce frequency Irom Ihe tripter (0 17)
is
app lied 10 a fil1er circuil (L2 5-L2 7) 10 elim inale
spurious signaIs and is then buffer·amplilied at 0 18. The
amplified signaI passes through the doubler (0 19) and is
app lied 10 a helical bandpass fi l1 er (L31. L32) 10 elimina le
spurious signaIs. The filtered signal is mixed with a
reference freque ncy trom Xl and 0 14.
Th e 12.0 MHz re ier enee oscillator circuit consists of
XI and Q4.
The 12.0 MHz reierenee trequency is
genera le d at xr and is then multiplied by 3 at Q 14 . The
resulting signal is applied to ICIO
10 be mixed with a
reference freque ncy trom X2 anc 0 16.
3·2·5 DOUBLER CIRCUIT (P DOUBLE UNIT)
The VCO oscillation (389.35- 645.84995 MHz) is butter-
amplifi ed at IG lO and is tnen applied 10 alew-pass filter
(strip line. CI68-C 172). The fil1 ered signal is butter-
amplified at Q2 and Ihen applied 10 a doubler circuit
(01 .02 , L5). The amplitied signal passes Ihrough aband·
pass filter (strip fine. C
113-C 115, C175. C195, CI 96)
and a
lew -pass fi l1er (stripline, C I88-C I 92) 10 sup pr ess
u
nw a nted signaIs. The resulting 778.7 -129 1.7 MHz 1si
LO signal is applied
10 Ihe MI X1 UNIT 10 produce a 266.7
or 778.7 MHz 1sI IF signa!.
3-2·6 PROGRAMMABLE DIVIDER AND
PHASE DETECTOR CIRCUITS
(PLL UNIT)
The resulting signal trom ICt 0 is butter-amplified at
ICg and is then applied 10 L19 10 eliminate the spurious
signals
and then to ICS to be mixed with ve ooutput from
Ih e VCO UNIT.
The programmabie divider shifts the dividing ratio with a
prescaier depending on the operating Irequen
cy and
determines
Ihe VCO oscill al ing frequency.
3·2-3 2nd LO CIRCUIT (PLL UNIT)
The phase detector cir cu it de tects the off-phase com-
po nents ol the V OO frequency using a stabie reference
Irequency.
ICl is a one -chip Pll Ie that contains a two-modulus
pres
ca ler, a swallow counter, aprogrammabie divider and
a phase detector.
ICl accepts up to 5 20 MHz inputs.
3·2·7 CHARGE PUMP AND LOOP FILTER
CIRCUITS (VCO
AND PLL UNITS)
The phase·detected signal ( pul se signal) from ICI (pins 15
aOO 16) passes through Ihe charge pump ( 02, 03 ) and is
Ihen
app lied 10 an aclive loop filter (04-06). The pulse
signal is converted 10
oe voltage (PLL voltage) 10 control
oscillation from Ihe
VCO UNIT. A charge pump ( 02 . 03)
is used 10 expand Ih e range of the PLL loek voltage. Th e
PLL loek voltage changes
Ihe reaetanee of Ihe varactor
diodes (0
1- 04, 06 -0 9) in Ihe VCO circuit.
The Inpul signal from PLL IC (IC
l. pin 8) passes through
the
tw o-modulus prescai er and tne programmabie counter
sec
lion s of IC I. A 10 kHz reference tr eq uency is applied
10 ICI (pin 1) aOO passes Ihrough a programmabie
reference
cou nter sec lio n of ICL Bath of the divided
sfgnals are compared at tne phase detector sec
Uon of
ICI. The phase-del ecled slgnal (pulse signal) is OUlpUI
from IC1 (pins 15 and 16).
The 51.2 MHz retere
nc e signaI is multiplied by 5 at
020 and is Ihen applied 10 a filter circuit (L36 -L38 )10
eliminate spurious signaIs. The filtered signal iS then
buffer -amplified at Q21 and applied 10 the two separate
amplifier circu
it s.
(1 )256 .0 MHz 2nd LO
The amp lified signal tr om 021 is re-amplified al 024 to
obtain a 256.0 MHz
200 LO signa!.
(2) 768 .0 MHz 2nd LO
The ampl if ied signal from 0 21 is multiptled by 3 at 0 22
an d is Ihen applied 10 ahelical bandpass filter (L42) 10
eliminate spurlous signaIs. The filtered slgnal Is bu ff er-
amplil ied at 023 10 obta in a 768.0 MHz 2nd LO signa !.
3·2-4 VCO CIRCUIT (VCO UNIT)
The VCO circuit co nsists of two VCO 's on Ihe VCO UNIT.
V
COI (0 1. 02 , 01 -04 ) genera les Ihe 389.35- 514.3995
1st LO frequency, while the V
C0 2 ( 03. 04 , 06 -0 9)
ge nerates Ih e 514 .35- -645.84995 MHz 1sI LO signa !.
The varac tor diodes (01-04 , 06 -09) provide frequency
controt. 3 - 11
Eilher a 256.0 MHz
or a 768.0 MHz 2nd LO slgnal is
app lied to Ihe 2nd mixer circuit (IC7) on Ihe MIX2 UNIT
10 produce a 10.7 MHz 2nd IF signa!.

3·3 LOGIC CIRCUITS 3·3·4 BAND SELECTION DATA (LOGIC
UN I
The LOGIC circuit consists ol a one ch ip a-bit CPU (ICS),
an
1/0 expander (1C4 )controlling the input level lrom tne
key matri x, a 84 k-bit CMOS RAM (ICll) and a CI·Y circuit.
The 64 k·bi\
CM05 RAM (ICll) contains 900 memory
channe ls which can ba div id ed in to 9 ba nks an d 20 inde-
pendent. pr
ogr am channels. The CI·V ci rcuit contro ts
frequency, mode , memory channels etc.. by connecling
the receiver with an optional CT·17 CI·Y LEVEL CON·
YERTER
to apersonal computer equipped with an
RS·232C port.
3·3·1 RESET CIRCU IT (LOGIC UNIT)
The reset circuit resets the CPU (ICS), the LCD driv er s
(1C8, IC9) and the 1/0 expander (1C4) when the three-
terminal voltage regulator (IC13) dete
ct s S V and outputs
S Y. The leading edge voltage is applied
to a time con-
sta nt (R24, C22). The " LO W" pulse-type signal is
output trom the time cons tant dur i ng Ihe delay time.
The s
ign al Is inverted at 06 and is Ihen applied to a
Sch mi tl trigger circuit (IC7) to tune the pulse-type signaI.
The reset signal is applied to the resetports ol the CPU
(I
CS) ,the LCD driv er s (ICa, IC9) and the 1/0 expand er
(1C4 ). 0 14 discharges the voltage of C22.
3·3·2 DIMMER CIRCUIT (LOGIC UNIT)
The band control signaIs are changed depending on .
receive
treq uencies. The CPU (IC S) outputs the lollow
signals for the RF UNIT, PLL UNIT and MAIN UNIT.
R
EC E IV ERF B
AN D PLL
FREQU ENCY
CON V
Bl B2 B3 84 BH SS VS
25.0000-H L L L L L HL
89.9999
MHz
90.0000-LH L L L L H L
249.9999 MHz
250 .0000-
L L H L H L L L
511.9999 MHz
512. 0000-
L L L H L H H L
761 . 9999 MHz
762.0000- LLL H HH L L
1024.9999 MHz
1025 .0000- H L L L L L H H
1089.9999
MHz
1090 .0000-L H L L L L H H
1249 .9999 MHz
1250 .0000-
L L H L H L L H
1511.9999 MHz
1512 . 0000-
L L L H L H H H
1761 .9999 MHz
1762 .0000- L L L H HH L H
1999.9999 MHz
Ths dimmer circu it cons ists of 02 . 03 and 0 16 and drives
ba cklights (0 54 - 057), ensuring tnat brightness does not
change even w ith a change of pow er s uppl y. When tne
[DIMMER] swi tc h is ON, the CPU ( ICS, pin 56) outp ut s a
" LOW" signal
to decr ease the base voltage of 03 .
• DIMMER CIRCUIT
3·3·3 REGULATOR CIRCUIT (LOGIC UNIT)
IC23 is a S Y three-terminal regulat or .The "LHV" line
is converted trom me "HV" li ne and pa ss es through a
resi stor ( R29l) on the MAIN UNIT.Then, the voltage
li
ne is applied to IC23. The time const ant consists of
R 29l on the MAIN UNIT and C 7l on the LOGIC UNIT
and pro tsc ts Ihe 5 V line trom any drastic changes.
3·3·S CPU (I CS) PORT ALLOCATJONS
(LOGIC UNIT)
PORT PO RT PIN
DES CRIPTION
NUIoABER NAME
NUIoABER
POO-
B 'l -r- 1
4- 18 Ou t pu ts the ba nd con tr ol si gnals
P04
84 , BH for the RF UN IT.
See the table
sh own In th e BAND SELECTlON
DA TA (3 -3- 4) .
P05 CONV 19
Output s a ban d cont rol signal fo r
the MAIN UNIT. See the tabla
sho wn in the BAND SELECTl ON
DATA (3- 3-4 ).
POS.
VS, SS 20 ,21
Outpu ts the ba nd c ontr ol signa ls ,
P 07 lor th e PLL U NIT . See th e tabla
shown in the BAND SEL EC TION
DATA (3 '3-4) .
PlO D IM
56
Be comes · ·LOW " when the
(D IMM ER] switch is ON .
Pl l SS
TB 57
Out pu ts a strobe s ig nal t or an
optiona l UT·36 VO IC E
SYNTH ES IZE R UN IT .
P12 PSTB
SB
Outpu ts a strobe s ignal lor a PLl
IC (IC1 )on the PL L UN IT.
P13
EXSTB 59
Outputs a st rot>e s ig nal lor a D IA
contro l IC ( IC14 ) on th e PLL U NI T.
P 14
REML 61
Output s an indicato r s lg nal tor I hs
(AEMOTE] indicator on the Ironl
panel.
Th is pon be comes
"HIGH" when the CPU e nters 1 he
remale conditi on via the CIN
system .•
DS ' DS '
FIg. 11
".
({(
'"'IJ
I)
RU
RU
••
f,
•
e••
•0
••
Ru
Ru
r'
J.
J.
R '"
"
...
, ...
UC 3l
..
DO
3- 12

,
P ORT P ORT PIN DESCRIPTION
N
UMBE R N AME N UM BER
PI S MO 62
Outputs a con trol signal ter the
[REC R EMOTE] jack. Th is port
be comes "H IGH " whe nthe epu
dr ives a tape recorder 10 re cord
re ce fve audio.
P16 NB 63 Beoomes "HIGH" when the
[NB· AFC] switch is ON,
P17
AD
64 Becomes "HIGH" w
hen Ihe [Am
switch Is ON.
P20 LBUSY 75 Inpuls "
SUSY "stçnats 10r LCD
d:;ve rs ( 1C8 . IC9) on the LOGIC
UNIT,
P21 S
TO P 76 Wh
en Ihe po rt becomes "l OW,"
the ep u Is changed to Ihe backup
mode.
P22 DCK 77
Input port Ier the ma in d ial c lock
pulses .
P23 DUP 79 Input port
for tbe maln d ial UP
sl gnal.
P24 D DN
80
In put po rt lor the mam dia! DOWN
slgnal.
P24 SO LS 81
Detec ts asquejch signa !.
When Ihe s ignal is "LOW." t he
equeicb ope ns.
P25 VSC
82 D
el ects a ves stqnat.
Thia port becornes "H IGH" when
the VSC ci rcui tde tects an aud io
s ig nal.
P27 ADI 83 Inputs serlat data hom Ihe AIO
converter.
P30 CI VRX 85
Inp ut port for CI·V data.
P 31 crvrx 86 Outputs CI-V data.
P32 CK B7 Ou tput sserlat crock signa Is .
P33 D
AT A BB
Outp uts serlal data.
P34 POC
89 Becomes "HIGH" when the tlmet
functlon t urns the rece iver ON.
P35 BEEP
90
Outputs 1 kHz or 500 Hz SQu a re
waves used Ie rbeep tones.
P36 BKIF 91
Ou tpu ts a "HIGH" pul se 01
35 msec. width during scanning
when the [ LOCK] swi tch is ON.
P37
LCDCD 92
Outputs command/dala selector
s
ignals for the LCD dr iv ers (I CS ,
1C9 ) on the LOG IC UNI T,
P40- A DO- 49 -4 2In
put and ou tpu tports for address
P47 AD7
bu s data.
P SO -
AB -40- 36 Output porta fo r th e ad dr ess bus.
P 54
A12
P55 A13 34 Nol
used .
P56, A1 4, 33, 32 Ou
tputs se lecte rs ignals 10r th e
P57
AIS RAM IC (IC11)on Ihe L OG IC
UNIT,
P60
EXCS 30 Out p uts selecter sl gna ls f or Ihe
11 0 exp a nde r IC (1C4) on the
LOG IC UNIT.
P61
TMCS 29 Output ssel ec ter si gn als for the
rea l time clock IC (IC12) on the
LOGIC UNIT ,
PO RT
PO RT
PI N
DE SCRIPTI ON
N UMBER NAME NUMBER
P62 , A DCO,
28,27
Outp uts ch an nel select er s ign a ls
P63 ADCI ter ttte N O
con verter IC (IC15) on
the LOGIC UNIT,
P64
RD
26
Ou tput s as tr Obe signal ter
memo ry reading.
P65 WR 25
Ou tputs a str obe si gnal ter
memory writl ng .
P66 ,LCS1, 24 ,23 Outcuts ch ip selecter sign a ls lor
P67
LCS2 ttte LCD dri
vers (I CS , IC9) on tne
LOGIC UNIT.
P70 FIL W 67 Becomes "HIGH'· w hen FM or
AMW
mode is selected.
P 71 ADCS
6B
Output s chi pse rae ter signaIs tor
the Al O conve rter IC ( IC 15) on
'he L OG IC UNIT,
P72
SS B 69 Becomes ·'HIGH"
when SSB mode
is selected.
P73 AM 71 Becomes "HIGH" whenAMW or
AM mode is setected.
P74
FM 72 Becomes "HIGH"
whe n FM or
FMN mod e is se lec ted.
P 7S
WFM 73 Becomes "HIGH" when WFM
mode is se lected.
P7 6 U IL 74 Becomes ·
·LOW ·· whe n US8 mode
is selecteet
Th is port becomes
"HIGH" in o
ther modes.
PTO V BUSY 93 I
nputs a "BUSY" sl gna l for an
optlo nal UT·36 VO IC E
SY NTH ESIZ ER UNIT.
Th is POrt te eomes "HIGH" wh ile
synthesizinq.
PT 1 --
-94, Not us
ed .
P TI
'-6
3 -13

4·1 FRONT PANEL
U _El ORDER NO. DESCRIPTION
DTV .
UBEL
ORDER NO. DESCRIPTION
DTV .
lW ilB ER
NItM BER
<D
8610004760 Knob Nl 04
(A) [MAIN DIA LJ 1@2260001260 Swit ch SW" 'B (SODFA3) (POW ER ],
®8930013940
610 Knob seat 1@8810002160 Screw FH M3 )( 57
@Button
K121 (A) @8010009931 843 SUB chassis-t ,
8610006570[S
SB . AM /W. WFM. FM/NI 4@0010001560 Bu lt on K42 [P OW ER]
,
CD
88 10006560 Button K153 (SPCH. MHz, TS] 3@8930000720Thread spaeer (V )5
@Button K1S4 (0) @88'0003850 Button K9B
[TI M ER]
,
8610006630 (MEMO
RY -C H (DOWN)] ,@
22 3ססoo 290 Switch SPPH22039A [Ne ·F C. ATT] 2
CD
8610006640 Button Kl 54 (E) (ME M OR Y -CH (U P)]
,@
223ססoo550 Switch SPPH23079A [TIMER] 1
(J) 8930018010 843 VFO sponge 6@
55'ססOO370
MeIer ME·29 (5.M ET ER) 1
®8810006610 Button K, 54 (B) (M
-C L] ,@8810001320 Screw PH
Bl M2.6 x 6 NI 4
®8810006820 Button
K'54 (C) [MW] 1@8810003160 Setscrew A M3 x 6 1
@I 88 100075 50 Bu tt on K1S 4 (G) [BANK] 1@8010005530 504 Beneeter plate 1
(jj) 86100075 40
Button KI54 (F) (M- SEn 1@893002" 50 868 Shield ptate 1
@8810005470 Screw PH M2.6 )C 14 ZK ,@2260000070
Sw itch SKHHAK013A
@4
8810000220
$c rew PH M3x 5 ,[M
-S ET. BANK. M- Cl . MWI
Cili
8610004150 Knob N120 [AF GAIN. SQUE lC H] 2 @2260000060 Switch SKHHAJ025A 9
@8810006550 Button K155 [NS·FC.
ATT]
2[S
SB . AM/W, WF M, etc.]
Cili
8210006260 843 Front panel
(A) 1@8930017660 ln sut ate plpe (F) 2
@8310021760 843 Window plate (A) 1®8610002540 Button
K66 (A) 9
@8810002160 Screw FH M3 x 5 4
[WI NDOW . V SC . SKIP. etc .j
@8930018001 843 SSB secree- t ,@2230000530 Switch SPPH23078A 9
@l 8930017960 Spring 2
[WI ND OW, VSC . SK IP. etc.]
e8930018410 Plate 1®5030000620 LCD LD-BU5214JZ 1
@8930018020 843 S
PC H sponge 1 IFUN
CTI ON DISPLAY] (E·5338)
@8810000220 Screw
PH M3 x 5 1 @8930018490 Beüector plate ,
@8930013990 610 Brake plate ,®8810005
51 0 Screw FH M3 x6 ZK as 12
@8930014030 610 Brake pad ,@8110004430 868 Top cover 1
@8850001040 Insulate flat washer (I) ,e8810003
11 0 Screw FH M3 )( 11 ZK BS 3
@8310020270 Keyboard seal 1@2510000040 Speaker
CO SPEAKE R6 5K12 1081 0 1
@8010010940 Keyboard (0) 1@8930006320 Speaker holder (B) 1
@881000
17 10
scre w PH BONO.0-3 Ml .4 x3 .5 ZK 6 @J
8930002900 Rubber laat (A)
SK 1912A 2
@8810002160 Screw FH M3x 5 4
<!.iJ
8810005540 Screw PH Bl M4x 10 2
®Rotary sneeeer
EC2 4 BSOB0013
@8110002210 Bottom cover 1
7600000100 1
IMAIN DIAL] @8930005790
CoUa r fooi ( A)
,
@VariabIe restster RV-2D5(RK0971210) @88
'000 5520 Screw PH
Bl M3x BZK 4
7210001960 10KB x 2 [SQUELCHI 1@8010001520 Stand (C) ,
@
Va riabie restster AV ·t66 (RK09?t l 1)
@J 8930005800 Co llar toet ( B)
,
7210001780 ,OKB lAF GAIN] ,
@
645ססoo 8 10
Connector HL..J 4306·01·30 7Q
[PHONES] ,
Screw abbrevlatlons PH: Pan head FH: Flat head ZK: Blaek
FH: Flat he
ad
PH: Pan head
Screw abbreviatIons
UBa
ORDER NO. DESCRIPTION DTV .
NUMBER
<D
6510013440 AeA plugs Tp·M60 2
AC power cable O?c.034(U SA ) 1
®Optlonal product
N; power ceble OPC-04 8 B 1
(EUR. FRG. FAAl
AC power cab 1e OPC- 085 (AUS) ,
®
561 0000020 Pin plugs AP313 3.5 41 CS plug 4
®Optlonal product oe power cable
OPC -023 C ,
CV
5210000050 Fuse FGB 3A (USA. EUR, AUS, FAA) 2
®5210000040 Fuse FGB
2A 2
5 21 0ססoo3 0
Fuse FGB 1A ( USA)
,
(J)
52'0ססoo2 0
Fuse FGB O.5A (EU R, AUS, FRA )2
521ססoo 17 0
Fuse FGMT4 O. SA (FAG) ,
®8810005500 Screw FH Bl M4
)( 12 CA 2
®8810001650 Screw
PH FT M3 x 6 4
®
'if'if'ifi
®
ii
®
@
4·2 ACCESSORIES
4-1