Icom IC-F210 User manual
UHF TRANSCEIVER
iF210
iF211
iF221
SERVICE
MANUAL
INTRODUCTION
This service manual describes the latest service information
for the IC-F210, F211 and F221 UHF MOBILE TRANSCEIV-
ER at the time of publication.
DANGER
NEVER connect the transceiver to an AC outlet or to a DC
power supply that uses more than 16 V. This will ruin the
transceiver.
DO NOT expose the transceiver to rain, snow or any liquids.
DO NOT reverse the polarities of the power supply when con-
necting the transceiver.
DO NOT apply an RF signal of more than 20 dBm (100 mW)
to the antenna connector. This could damage the transceiv-
er’s front end.
ORDERING PARTS
Be sure to include the following four points when ordering
replacement parts:
1. 10-digit order numbers
2. Component part number and name
3. Equipment model name and unit name
4. Quantity required
<SAMPLE ORDER>
1110003490 S.IC TA31136FN IC-F210 MAIN UNIT 5 pieces
8810009990 Screw
PH BT M3×8 ZK
IC-F210 Bottom cover 10 pieces
Addresses are provided on the inside back cover for your
convenience.
REPAIR NOTES
1. Make sure a problem is internal before disassembling the
transceiver.
2. DO NOT open the transceiver until the transceiver is
disconnected from its power source.
3. DO NOT force any of the variable components. Turn
them slowly and smoothly.
4. DO NOT short any circuits or electronic parts. An insu-
lated tuning tool MUST be used for all adjustments.
5. DO NOT keep power ON for a long time when the trans-
ceiver is defective.
6. DO NOT transmit power into a signal generator or a
sweep generator.
7. ALWAYS connect a 40 dB to 50 dB attenuator between
the transceiver and a deviation meter or spectrum ana-
lyzer when using such test equipment.
8. READ the instructions of test equipment thoroughly
before connecting equipment to the transceiver.
To upgrade quality, any electrical or mechanical parts and
internal circuits are subject to change without notice or
obligation.
MODEL
IC-F210
IC-F211
IC-F221
VERSION
Europe
General
General
U.S.A.
SYMBOL
EUR
GEN
GEN
USA
TABLE OF CONTENTS
SECTION 1 SPECIFICATIONS
SECTION 2 INSIDE VIEW
SECTION 3 DISASSEMBLY INSTRUCTIONS
SECTION 4 CIRCUIT DESCRIPTION
4 - 1 RECEIVER CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 - 1
4 - 2 TRANSMITTER CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 - 2
4 - 3 PLL CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 - 3
4 - 4 POWER SUPPLY CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 - 4
4 - 5 PORT ALLOCATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 - 4
SECTION 5 ADJUSTMENT PROCEDURES
5 - 1 PREPARATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 - 1
5 - 2 PLL ADJUSTMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 - 4
5 - 3 SOFTWARE ADJUSTMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 - 5
5 - 4 TRIMMER ADJUSTMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 - 7
SECTION 6 PARTS LIST
SECTION 7 MECHANICAL PARTS AND DISASSEMBLY
SECTION 8 SEMI-CONDUCTOR INFORMATION
SECTION 9 BOARD LAYOUTS
9 - 1 FRONT UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 - 1
9 - 2 MAIN UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 - 3
SECTION 10 BLOCK DIAGRAM
SECTION 11 VOLTAGE DIAGRAMS
11 - 1 FRONT UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 - 1
11 - 2 MAIN UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 2
EXPLICIT DEFINITIONS
CHANNEL SPACING
Wide/Narrow-type
Middle/Narrow-type
12.5 kHz/ 25.0 kHz
12.5 kHz/ 20.0 kHz
400
-
430 MHz
440
-
490 MHz
FREQUENCY COVERAGE
Low band
Middle band
1 - 1
SECTION 1 SPECIFICATIONS
All stated specifications are subject to change without notice or obligation.
Measurement method
Frequency coverage*1
Type of emission
Number of conventional channels
Antenna impedance
Power supply voltage (negative ground)
Current drain (approx.)
Usable temperature range
Dimensions (proj. not included)
Weight
RF output power
Modulation system
Maximum permissible deviation
Frequency error
Spurious emissions
Adjacent channel power
Audio frequency response
Audio hormonic distortion
FM hum and noise (typical)
(without CCITT filter)
Residual modulation (typical)
(with CCITT filter)
Limitting charact of modulator
Microphone connector
Receive system
Intermediate frequencies
Sensitivity (typical)
Squelch sensitivity (at threshold)
Hum and noise*2
Adjcent channel selectivity
Spurious response
Intermoduration
Audio output power
External SP connector
[GEN], [USA] [EUR]
RECEIVER TRANSMITTER GENERAL
EIA-152-C/204D or TIA-603 ETS 300 086
400.000–430.000 MHz or 440.000–490 MHz
N/W: (12.5 kHz; Narrow/25 kHz; Wide): 8K50F3E/16K0F3E [EUR]
(12.5 kHz; Narrow/25 kHz; Wide): 8K50F3E/16K0F3E [USA], [GEN]
N/M (12.5 kHz; Narrow/20 kHz; Middle): 8K50F3E/14K0F3E [EUR]
maximum 128 channels
50 Ωnominal (SO-239)
13.6 V DC nominal 13.2 V DC nominal
TX; 7.0 A (at 25 W), 13.0 A (at 45 W)
Rx; 1200 mA (maximum audio)
300 mA (stand-by)
–30˚C to +60˚C (–22˚F to +140˚F) –25˚C to +55˚C
150(W) ×40(H) ×117.5(D) mm; 529⁄32(W) ×49⁄16(H) ×45⁄8(D) inch [25 W]
150(W) ×40(H) ×167.5(D) mm; 529⁄32(W) ×49⁄16(H) ×619⁄32(D) inch [45 W]
0.8 kg; 1 lb 12 oz [25 W], 1.1 kg; 2 lb 7 oz [45 W]
High/Low2/Low1: 25 W/10 W/2.5 W [25 W]
High/Low2/Low1: 45 W/25 W/ 5 W [45 W]
Variable reactance frequency modulation
±2.5 kHz [Narrow], ±4.0 kHz [Middle], ±5.0 kHz [Wide]
±2.5 ppm ±1.5 kHz
70 dB (typical) 0.25 µW ≤1GHz, 1.0 µW >1 GHz
60 dB minimum [Narrow]; 70 dB minimum [Middle], [Wide]
+2 dB to –5 dB of 6 dB/octave
Range from 300 Hz to 2550 Hz [Narrow] / 3000 Hz [Middle], [Wide]
3% typical at 1 kHz (40% deviation)
34 dB (min.), 40 dB (typ.) [Narrow] —
40 dB (min.), 46 dB (typ.) [Wide]
40 dB (min.), 50 dB (typ.) [Narrow]
–43 dB (min.), 53 dB (typ.) [Middle]
45 dB (min.), 55 dB (typ.) [Wide]
70 –100% of maximum deviation
8-pin modular (impedance: 600 Ω)
Double-conversion superheterodyne system
1st: 46.35 MHz, 2nd: 450 kHz
0.25 µV typical at 12 dB SINAD –4 dBµV (emf) typical at 20 dB SINAD
0.25 µV typical –4 dBµV (emf) typical
34 dB (min.), 40 dB (typ.) [Narrow] 40 dB (min.), 50 dB (typ.) [Narrow]
40 dB (min.), 45 dB (typ.) [Wide] 43 dB (min.), 53 dB (typ.) [Middle]
45 dB (min.), 55 dB (typ.) [Wide]
60 dB (min.), 65 dB (typ.) [Narrow]
70 dB (min.), 75 dB (typ.) [Middle]/[Wide]
75 dB
70 dB (min.), 75 dB (typ.) 65 dB (min.), 67 dB (typ.)
4.0 W typical at 10% distortion with a 4 Ωload
2-conductor 3.5 (d) mm (1⁄8")/impedance: 4 Ω
*1: depended on versions.
*2: [EUR] is measured with CCITT filter, [USA] and [GEN] are measured without CCITT filter.
2 - 1
SECTION 2 INSIDE VIEW
Antenna switch/
Low-pass filter circuit
Mixer*
(Q3: 3SK299)
2nd IF filter*
(FI2: ALFYM450F=K)
D/A converter*
(IC6: M62363FP-650C)
IF IC
(IC1:TA31136FN)
1st IF filter
(FI1: FL-335)
* Located under side of the point.
Final FET module
IC3
: RA30H4452M-21[25W-M]
: RA30H4047M-21[25W-L]
: RA45H4452M-21[45W-M]
: RA45H4047M-21[45W-L]
CPU 5V regurator*
(IC10: AN78L05M)
8V regurator
(IC9:TA7808F)
VCO circuit
AF amplifier
(IC8: LA4425A)
Reference crystal oscillator*
(X2: CR-741 15.3 MHz)
PLL IC
(IC4: MB15A02PFV-1)
3 - 1
SECTION 3 DISASSEMBLY INSTRUCTIONS
• Opening case and removing the front unit
qUnscrew 4 screws A, and remove the bottom cover.
wDisconnect the flat cable Bfrom J2.
eDisconnect the cable Cfrom J7.
rUnscrew 2 screws D, and remove the front unit.
B
C
D
A
J2 J7
uUnscrew 8 screws H.
iRemove the filter case I.
oUnscrew the screw J.
!0 Unsolder 3 points Kfrom the antenna connector.
!1 Unsolder 4 points Lfrom IC3.
H
I
J
KL
!2 Lift up the front portion of the main unit and remove it.
OPC-617
J1 J6
UT-105
UT-108
UT-109
UT-110
UT-111
tUnsolder 4 points E, and remove the plate F.
yUnsolder the point G.
G FE E
• Installation location
UT-105 SmarTrank 2 logic board
UT-108 DTMF decoder unit
UT-109 Voice scrambler unit
UT-110
UT-111 Trunking unit
OPC-617 ACC cable (for external terminal connection)
SECTION 4 CIRCUIT DESCRIPTION
4 - 1
4-1 RECEIVER CIRCUITS
4-1-1 ANTENNA SWITCHING CIRCUIT
(MAIN UNIT)
The antenna switching circuit functions as a low-pass filter
while receiving and as resonator circuit while transmitting.
This circuit does not allow transmit signals to enter the
receiver circuits.
Received signals enter the antenna connector and pass
through the low-pass filters (L1–L3, C1, C2, C6–8). The fil-
tered signals are then applied to the RF circuit passed
through the λ⁄4type antenna switching circuit (D5–D7, D48,
L4, L6).
4-1-2 RF CIRCUIT (MAIN UNIT)
The RF circuit amplifies signals within the range of frequen-
cy coverage and filters out-of-band signals.
The signals from the antenna switching circuit pass through
the two-stage tunable bandpass filters (D8, D4). The filtered
signals are amplified at the RF amplifier (Q2) and then enter
other two-stage bandpass filters (D9, D10) to suppress
unwanted signals. The filtered signals are applied to the 1st
mixer circuit (Q3).
The tunable bandpass filters (D4, D8–D10) employ varactor
diodes to tune the center frequency of the RF passband for
wide bandwidth receiving and good image response rejec-
tion. These diodes are controlled by the CPU (FRONT unit;
IC1) via the D/A converter (IC6).
The gate control circuit reduces RF amplifier gain and atten-
uates RF signal to keep the audio output at a constant level.
The receiver gain is determined by the voltage on the “RSSI”
line from the FM IF IC (IC1, pin 12). The gate control circuit
(Q1) supplies control voltage to the RF amplifier (Q2) and
sets the receiver gain.
When receiving strong signals, the “RSSI”voltage increases
and the gate control voltage decreases. As the gate control
voltage is used for the bias voltage of the RF amplifier (Q2),
then the RF amplifier gain is decreased.
4-1-3 1ST MIXER AND 1ST IF CIRCUITS
(MAIN UNIT)
The 1st mixer circuit converts the received signals to a fixed
frequency of the 1st IF signal with the PLL output frequency.
By changing the PLL frequency, only the desired frequency
will pass through a MCF (Monolithic Crystal Filter; FI1) at the
next stage of the 1st mixer.
The RF signals from the bandpass filter are applied to the
1st mixer circuit (Q3). The applied signals are mixed with the
1st LO signal coming from the RX VCO circuit (Q14) to pro-
duce a 46.35 MHz 1st IF signal. The 1st IF signal passes
through a MCF (Monolithic Crystal Filter; FI1) to suppress
out-of-band signals. The filtered signal is amplified at the 1st
IF amplifier (Q4) and applied to the 2nd IF circuit.
4-1-4 2ND IF AND DEMODULATOR CIRCUITS
(MAIN UNIT)
The 2nd mixer circuit converts the 1st IF signal to a 2nd IF
signal. A double-conversion superheterodyne system
improves the image rejection ratio and obtains stable receiv-
er gain.
The 1st IF signal from the 1st IF amplifier (Q4) is applied to
the 2nd mixer section of the FM IF IC (IC1, pin 16) and is
then mixed with the 2nd LO signal for conversion to a 450
kHz 2nd IF signal.
IC1 contains the 2nd mixer, limiter amplifier, quadrature
detector, active filter and noise amplifier circuits, etc. A
tripled frequency from the PLL reference oscillator is used
for the 2nd LO signal (45.9 MHz).
The 2nd IF signal from the 2nd mixer (IC1, pin 3) passes
through a ceramic filter (FI2) to remove unwanted hetero-
dyned frequencies. It is then amplified at the limiter amplifi-
er section (IC1, pin 5) and applied to the quadrature detec-
tor section (IC1, pins 10, 11 and X1) to demodulate the 2nd
IF signal into AF signals.
The AF signals are output from pin 9 (IC1) and are then
applied to the AF amplifier circuit.
FI2
2nd IF filter
450 kHz
Noise
detector
Q34
Limiter
amp.
FM
detector
Active
filter
AF signals
("DET" signal)
"SQLIN" signal from
the D/A converter IC
(IC6, pin 2)
5V
X1 Discriminator
RSSI
Mixer
45.9 MHz
1st IF from the IF amplifier (Q4)
"RSSI" signal to the CPU
"NOIS" signal to the CPU
875
BPF
32
3
1612 1311109
IC1
TA31136FN
X2
15.3 MHz
• 2ND IF AND DEMODULATOR CIRCUIT
4 - 2
4-1-5 AF AMPLIFIER CIRCUIT (MAIN UNIT)
The AF amplifier circuit amplifies the demodulated AF sig-
nals to drive a speaker.
The AF signals from the FM IF IC (IC1, pin 9) are applied to
the active filter circuit (IC16). The active filter circuit (high-
pass filter) removes CTCSS or DTCS signals.
The filtered AF signals are output from pin 14 (IC16) and are
applied to the de-emphasis circuit (R117, C378) with fre-
quency characteristics of –6 dB/octave, and then passed
through the analog switch (IC14, pins 1–3) and low-pass fil-
ter (IC5). The filtered signal is applied to the electronic vol-
ume controller (IC6, pin 9).
The output AF signals from the electronic volume controller
(IC6, pin 10) are passed through the analog switch (IC14
pins 9–11) and are applied to the AF amplifier (IC15) and AF
power amplifier (IC8) to drive the speaker.
4-1-6 RECEIVER MUTE CIRCUITS
(MAIN AND FRONT UNITS)
•NOISE SQUELCH
The noise squelch circuit cuts out AF signals when no RF
signals are received. By detecting noise components in the
AF signals, the squelch circuit switches the AF mute switch.
Some noise components in the AF signals from the FM IF IC
(IC1, pin 9) are passed through the level controller (IC6, pins
1, 2). The level controlled signals are applied to the active fil-
ter section in the FM IF IC (IC1, pin 8). Noise components
about 10 kHz are amplified and output from pin 7.
The filtered signals are converted to the pulse-type signals
at the noise detector section and output from pin 13 (NOIS).
The NOIS signal from the FM IF IC is applied to the CPU
(FRONT unit; IC1, pin 53). The CPU then analyzes the noise
condition and controls the AF mute signal via “AFON”line
(D44, D45) to the AF mute circuit (Q35, Q36, D29, D30).
•CTCSS AND DTCS
The tone squelch circuit detects AF signals and opens the
squelch only when receiving a signal containing a matching
subaudible tone (CTCSS or DTCS). When tone squelch is in
use, and a signal with a mismatched or no subaudible tone
is received, the tone squelch circuit mutes the AF signals
even when noise squelch is open.
A portion of the AF signals from the FM IF IC (IC1, pin 9)
passes through the low-pass filter (IC16) to remove AF
(voice) signals and is applied to the CTCSS or DTCS
decoder inside the CPU (FRONT unit; IC1, pin 60) via the
“CDEC”line to control the AF mute switch.
4-2 TRANSMITTER CIRCUITS
4-2-1 MICROPHONE AMPLIFIER CIRCUIT
(MAIN AND FRONT UNITS)
The microphone amplifier circuit amplifies audio signals
within +6 dB/octave pre-emphasis characteristics from the
microphone to a level needed for the modulation circuit.
The AF signals (MIC) from the MIC jack (FRONT unit; J1)
are amplified at the AF amplifier (FRONT unit; IC5) and
applied to the MAIN unit via J2 (pin 28). The AF signal are
applied to the limiter amplifier (IC5, pin 5).
The entered signals are pre-emphasized with +6dB/octave
at a limiter amplifier, then passed through the analog switch
(IC14, pins 2–4) and splatter filter (IC5, pins 2, 1). The out-
put signals from the splatter filter are applied to the level
controller (IC6, pin 9).
The deviation level controlled signals are then applied to the
modulation circuit (D18) as the “MOD”signal after being
passed through the analog switch (IC14, pins 9, 8).
4-2-2 MODULATION CIRCUIT
(MAIN AND FRONT UNITS
The modulation circuit modulates the VCO oscillating signal
(RF signal) using the microphone audio signals.
The AF signals from the analog switch (IC14, pin 8) change
the reactance of varactor diode (D18) to modulate the oscil-
lated signal at the TX VCO circuit (Q13, D16, D31). The
modulated VCO signal is amplified at the buffer amplifiers
(Q11, Q10) and is then applied to the drive amplifier circuit
via the T/R switch (D14).
The CTCSS/DTCS signals from the CPU (FRONT unit; IC1,
pins 22–24) are passed through the low-pass filter (FRONT
unit; IC5), and mixer and splatter filter (IC5), and are then
applied to the VCO circuit.
4-2-3 DRIVE AMPLIFIER CIRCUIT (MAIN UNIT)
The drive amplifier circuit amplifies the VCO oscillating sig-
nal to the level needed at the power amplifier.
The RF signal from the buffer amplifier (Q10) passes
through the T/R switch (D14) and is amplified at the drive
amplifier circuit (Q8). The amplified signal is applied to the
power amplifier circuit.
4 - 3
4-2-4 POWER AMPLIFIER CIRCUIT (MAIN UNIT)
The power amplifier circuit amplifies the driver signal to an
output power level.
The RF signal from the drive amplifier (Q8) is passed
through the low-pass filter circuit (L18, L43, C89, C90, C92,
C380, C381, C510) and applied to the power module (IC3)
to obtain 25 W or 50 W of RF power.
The amplified signal is passed through the antenna switch-
ing circuit (D2), low-pass filter and APC detector, and is then
applied to the antenna connector.
Control voltage for the power amplifier (IC3, pin 2) comes
from the APC amplifier (IC2) to stabilize the output power.
The transmit mute switch (D28) controls the APC amplifier
when transmit mute is necessary.
4-2-5 APC CIRCUIT (MAIN UNIT)
The APC circuit protects the power amplifier from a mis-
matched output load and stabilizes the output power.
The APC detector circuit detects forward signals and reflec-
tion signals at D1 and D11 respectively. The combined volt-
age is at minimum level when the antenna impedance is
matched at 50 Ω, and is increased when it is mismatched.
The detected voltage is applied to the APC amplifier (IC2,
pin 3), and the power setting “T2”signal from the D/A con-
verter (IC6, pin 22), controlled by the CPU (FRONT unit;
IC1), is applied to the other input for reference. When anten-
na impedance is mismatched, the detected voltage exceeds
the power setting voltage. Then the output voltage of the
APC amplifier (IC2, pin 4) controls the input current of the
drive amplifier (Q8) and power module (IC3) to reduce the
output power.
4-3 PLL CIRCUITS
4-3-1 PLL CIRCUIT (MAIN UNIT)
A PLL circuit provides stable oscillation of the transmit fre-
quency and receive 1st LO frequency. The PLL output com-
pares the phase of the divided VCO frequency to the refer-
ence frequency. The PLL output frequency is controlled by
the divided ratio (N-data) of a programable divider.
The PLL circuit contains the TX/RX VCO circuit (Q13, Q14).
The oscillated signal is amplified at the buffer amplifiers
(Q11, Q12) and then applied to the PLL IC (IC4, pin 8) via
the low-pass filter (L32, C298–C300).
The PLL IC contains a prescaler, programable counter, pro-
gramable divider and phase detector, etc. The entered sig-
nal is divided at the prescaler and programable counter sec-
tion by the N-data ratio from the CPU. The reference signal
is generated at the reference oscillator (X2) and is also
applied to the PLL IC. The PLL IC detects the out-of-step
phase using the reference frequency, and outputs it from
pin 5. The output signal is passed through the loop filter
(R97/C149, R96/C147), and is then applied to the VCO cir-
cuit as the lock voltage.
If the oscillated signal drifts, its phase changes from that of
the reference frequency, causing a lock voltage change to
compensate for the drift in the oscillated frequency.
4-3-2 VCO CIRCUIT (MAIN UNIT)
The VCO circuit contains a separate RX VCO (Q14, D33,
D34) and TX VCO (Q13, D16, D18, D31). The oscillated sig-
nal is amplified at the buffer amplifiers (Q11, Q10) and is
then applied to the T/R switch circuit (D14, D15). Then the
receive 1st LO (Rx) signal is applied to the 1st mixer (Q3)
and the transmit (Tx) signal to the drive amplifier circuit (Q8).
A portion of the signal from the buffer amplifier (Q11) is fed
back to the PLL IC (IC4, pin 8) via the buffer amplifier (Q12)
and low-pass filter (L32, C298–C300) as the comparison
signal.
Shift register
×3
Prescaler
Phase
detector
Loop
filter
Programmable
counter
Programmable
divider
X2
15.3 MHz
2nd LO signal to
the FM IF IC
45.9 MHz
1
Buffer
Q11
Buffer
Q10
Buffer
Q12
Tripler 9
10
11
SCK
SO
PLST
to transmitter circuit
to 1st mixer circuit
D14
D15
58
Q34
IC4 MB15A02PFV1
Q13, D16, D31
TX VCO
Q14, D33, D34
RX VCO
•PLL CIRCUIT
4 - 4
Description
The voltage from a DC power supply.
The same voltage as the HV line which is con-
trolled by the power switching circuit (Q23, Q24).
When the [POWER] switch is pushed, the CPU
outputs the “PWON”control signal to the power
switching circuit to turn the circuit ON.
Common 5 V for the CPU converted from the HV
line by the CPU5V regulator circuit (IC10). The
circuit outputs the voltage regardless of the
power ON/OFF condition.
Common 8 V converted from the VCC line by the
8V regulator circuit (IC9).
Common 5 V converted from the 8 V and CPU5
lines by the 5V regulator circuit (Q27, Q28).
Receive 8 V controlled by the R8 regulator circuit
(Q26, Q30) using the “RXC”signal from the
expander IC (IC17, pin 4).
Transmit 8 V controlled by the T8 regulator circuit
(Q25, Q29, D23) using the “TMUT”signal from
the expander IC (IC17, pin 13).
Line
HV
VCC
CPU5V
8V
5V
R8V
T8V
Input port for the internal temperature.
Input port for the low voltage detection
from the connected power supply.
Input port for reset signal.
Output ports for 5/2 tone and DTMF
signals.
Outputs the CPU clock shift signal.
Outputs cut-off frequency control signal
to the low-pass filter (MAIN unit; IC5)
for CTCSS/DTCS switching.
Input port for the key matrix.
Output ports for 5/2 tone and DTMF
signals.
Input port for the PLL unlock signal
from the PLL IC (MAIN unit; IC4).
Input port for the key matrix.
Output ports for CTCSS/DTCS signals.
Input ports for the key matrix.
Outputs the clock signal to the PLL IC
(MAIN unit; IC4), D/A converter (MAIN
unit; IC6), LED driver (IC4) and option-
al board (connect to MAIN unit; J1).
Outputs the data signal to the PLL IC
(MAIN unit; IC4), D/A converter (MAIN
unit; IC6) and optional board (connect
to MAIN unit; J1).
Output port for beep sound signal.
I/O port for the data signal for the EEP-
ROM (IC3)
Outputs the clock signal for the EEP-
ROM (IC3).
Outputs the clock signal for the LCD
driver (IC6, pin 17).
Outputs the data signal for the LCD dri-
ver (IC6, pin 48).
Outputs the strobe signal for the PLL
IC (MAIN unit; IC4).
Outputs the strobe signal for the D/A
converter IC (MAIN unit; IC6).
Outputs the strobe signal for the
expander IC (IC17).
Outputs the control signal for the LCD
driver IC (IC6).
Outputs the control signal for the power
switching circuit (MAIN unit; Q24,
Q23).
1
2
7
13, 14
15
16
17, 18
19–20
21
22
23–25
26, 27
28
29
30
31
32
33
34
36
37
38
39
41
TEMP
BATV
RES
SENC0–
SENC1
CSFT
DUSE
KS0, KS1
SENC2–
SENC3
UNLK
KR0
CENO0–
CENO2
KR1, KR2
SCK
SO
BEEP
ESDA
ESCL
LSCK
LSO
PLST
DAST
EXST
EXOE
PWON
Pin Port Description
number name
4-4 POWER SUPPLY CIRCUITS
4-4-1 VOLTAGE LINES (MAIN UNIT)
4-5 PORT ALLOCATIONS
4-5-1 CPU (FRONT UNIT; IC1)
Outputs dimmer control signal.
High: Dimmter is ON.
Outputs backlight control signal.
High: Backlight is ON.
Output LCD segment signals.
Output LCD common signals.
4 - 5
I/O ports for the optional board control
signals.
Input port for the clock sigal from the
optional board via J1.
Input port for the cloning signal.
Output port for the cloning signal.
Input port for the POWER switch.
•Input port for the remote power con-
trol signal from the external connec-
tor.(J6)
•Input port for the dimmer control.
Input port for the “NOIS”signal from
the FM IF IC (MAIN unit; IC1) for noise
squelch operation.
Input port for interruption signal from
the optional board via J1.
Outputs chip select signal for the
optional board via J1.
Input port for the PTT switch from
microphone.
Input port for the PTT switch from the
external connector (J6).
Low : External PTT switch is ON.
Input port for the microphone hanger
detection signal.
Low : Microphone on hook.
Input port for the AF volume control
signal (R14).
High : [VOL] is maximum clockwise.
Input port for the CTCSS/DTCS decod-
ing signals.
Input port for the single tone decoding
signal.
Input port for the optional board detec-
tion signal.
Input port for receiving signal strength
level detection.
Input port for the PLL lock voltage.
44–46
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
OPT3–
OPT1
SI
CLI
CLO
POSW
IGSW
NOIS
CIRQ
CCS
PTT
EPTT
HANG
AFVI
CDEC
SDEC
OV12
RSSI
LVIN
Pin Port Description
number name
Outputs transmit/receive control signal.
High: While receiving.
Outputs audio output control signal.
High: While receiving.
Outputs wide/narrow control signal.
High: Wide is selected.
Outputs receiving mute control signal.
Low: While receiving is muting.
Outputs busy detecting signal to the
optional unit.
Outputs transmitting mute control sig-
nal.
Low: While transmitting is muting.
Outputs the microphone mute control
signal.
Low: While the microphone is muting.
4
5
6
7
11
13
14
RXC
AFON
NWC
RMUT
BUSY
TMUT
MMUT
Pin Port Description
number name
1
2
3–34
35–38
LIGT1
LIGT2
SEG32–
SEG1
COM4–
COM1
Pin Port Description
number name
4-5-3 LCD DRIVER (FRONT UNIT; IC6)
4-5-2 OUTPUT EXPANDER (MAIN UNIT; IC17)CPU-Continued
Outputs the detection level control sig-
nal for the squelch circuit.
Outputs the TENC level control signal.
Outputs the modulation balance con-
trol signal.
Outputs the tuning voltage for band-
pass filters
•Outputs the tuning voltage for band-
pass filters.
•Outputs transmitting power control
signal.
Outputs the reference oscillator cor-
recting voltage.
2
4
11
14
22
23
SQIN
TENC
BAL
T1
T2
REF
Pin Port Description
number name
4-5-4 D/A CONVERTER IC (MAIN UNIT; IC6)
5 - 1
SECTION 5 ADJUSTMENT PROCEDURES
+Audio generator
300 Hz to 3 kHz
AC
millivoltmeter
MICE
MIC
PTT
PTT switch
PTTE
Add a jumper wire here
Electrolytic
capacitor
47 F
OPC-1122
(Cloning cable)
5-1 PREPARATION
When you adjust the contents on pages 5-5 and 5-6, SOFT-
WARE ADJUSTMENT, the optional CS-F100 ADJ ADJUST-
MENT SOFTWARE (Rev. 1.0 or later), *OPC-1122 JIG CABLE
(modified OPC-1122 CLONING CABLE; see illustration below)
are required.
■SYSTEM REQUIREMENTS
•IBM PC compatible computer with an RS-232C serial port
(38400 bps or faster).
•Microsoft Windows 95/98 or Windows ME
•Intel Pentium 100 MHz processor or faster
•At least 16 MB RAM and 10 MB of hard disk space
•640×480 pixel display (800×600 pixel display recommend-
ed)
■ADJUSTMENT SOFTWARE INSTALLATION
qBoot up Windows.
- Quit all applications when Windows is running.
wInsert the ‘CS-F100’into the appropriate CD drive.
eSelect ‘Run’from the [Start] menu.
rType the setup program name using the full path name,
then push [Enter] key.
(ex. D:\CSF100ADJ\Setup.exe)
tFollow the prompts.
yProgram group ‘CS-F100 ADJ’appears in the ‘Programs’
folder of the [Start] menu.
■STARTING SOFTWARE ADJUSTMENT
qConnect IC-F210/F211/F221 and PC with *OPC-1122 JIG
CABLE.
wTurn the transceiver power ON.
eBoot up Windows, and click the program group ‘CS-F100
ADJ’in the ‘Programs’folder of the [Start] menu, then
CS-F100 ADJ’s window appears.
rClick ‘Connect’on the CS-F100 ADJ’s window, then
appears IC-F210/F211/F221’s up-to-date condition.
tSet or modify adjustment data as desired.
IBM is a registered trademark of International Bussiness
Machines Corporation in the U.S.A. and other countries.
Microsoft and Windows are registered trademarks of
Microsoft Corporation in the U.S.A. and other countries.
Screen shots produced with permission from Microsoft
Corporation. All other products or brands are registered
trademarks or trademarks of their respective holders.
•*OPC-1122 (JIG CABLE)
5 - 2
Personal
computer
to the MIC
connector
to an RS-232C port
DB9 female plug
RS-232C cable
(straight) *OPC-1122
(JIG CABLE)
AC millivoltmeter
Audio generator
FM deviation meter
(DC measurable)
Attenuator
40 dB or 50 dB
to the antenna connector
to DC cable
Standard signal generator
127 to 17 dBm
(0.1 V to 32 mV)
CAUTION:
DO NOT transmit while
the SSG is connected to
the antenna connector.
RF power meter
50 / 1 50 W
DC power supply
13.2 V / 15 A
Frequency
counter
•CONNECTIONS
■REQUIRED TEST EQUIPMENT
EQUIPMENT
DC power supply
RF power meter
(terminated type)
Frequency counter
FM deviation meter
DC voltmeter
GRADE AND RANGE
Output voltage : 13.2 V DC
Current capacity : 15 A or more
Measuring range : 1–100 W
Frequency range : 300–600 MHz
Impedance : 50 Ω
SWR : Less than 1.2 : 1
Frequency range : 0.1–600 MHz
Frequency accuracy : ±1 ppm or better
Sensitivity : 100 mV or better
Frequency range : DC–600 MHz
Measuring range : 0 to ±10 kHz
Input impedance : 50 kΩ/V DC or better
EQUIPMENT
Audio generator
Standard signal
generator (SSG)
Oscilloscope
AC millivoltmeter
External speaker
Attenuator
GRADE AND RANGE
Frequency range : 300–3000 Hz
Measuring range : 1–500 mV
Frequency range : 0.1–600 MHz
Output level : 0.1 µV–32 mV
(–127 to –17 dBm)
Frequency range : DC–20 MHz
Measuring range : 0.01–20 V
Measuring range : 10 mV–10 V
Input impedance : 4 Ω
Capacity : 7 W or more
Power attenuation : 40 or 50 dB
Capacity : 50 W or more
5 - 3
CS-F100 ADJ Rev.1.0
File
COM 1: OPEN
Option
Connect Reload (F5) Disp para
[A / D]
VIN : 178 : B2h : 19.96 V
TEMPS : 177 : B1h : 26.44 ’C
LVIN : 176 : B0h : 3.45 V
SD : 23 : 17h : 0.45 V
Power (Hi) : 198 [ # # # # # # # # # # # # # # # # # ]
Power (L2) : 115 [ # # # # # # # # # ]
Power (L1) : 52 [ # # # # ]
BAL W : 155 [ # # # # # # # # # # # ]
BAL Ratio : 128 [ # # # # # # # # # ]
MOD W : 212 [ # # # # # # # # # # # # # # # # # ]
MOD Ratio : 132 [ # # # # # # # # # ]
CTCS/DTCS : 186 [ # # # # # ]
SQL : 0 [ # # # # # # # # # # # # # # # ]
BPF ALL : [Enter] to sweep
BPF T1 : 21 [ # # # # # # # # # # # ] [Enter] to sweep
BPF T2 : 4 [ # # # # # # # # # ] [Enter] to sweep
TXF : [Enter] to start
S-Meter : [Enter] to start
[D / A]
BPF T1 : 197 : 32h : 0.98 V
T2/POW : 172 : 32h : 0.98 V
REF : 125 : 2Dh : 0.88 V
MOD BAL : 149 : 36h : 21.18
Dev : 0 : 00h : 0.00 V
CTCSS : 174 : AEh : 3.41 V
SQL Lev : 0 : 00h : 0.00
AGC : 255 : FFh : 5.00 V
CH No. : 01 RX Freq = 136.200000, TX Freq = < RF Power: High Mode: Wide
: Transceiver’s connection state
: Reload adjustment data
: Receive sensitivity measurement
: Connected DC voltage
: PLL lock voltage
: Operating channel select
: RF output power
: Modulation balance
NOTE:
1
5
4
6
10
11
12
9
14
15
16
1
2
3
4
5
6
9
10
7
8
11
12
13
: FM deviation
: CTCSS/DTCS deviation
: Squelch level
: Receive sensitivity (automatically)
: Receive sensitivity (manually)
: Reference frequency
: S-meter
: Adjustment items
14
15
16
The above values for settings are example only.
Each transceiver has its own specific values for each setting.
3
2
8
7
13
•SCREEN DISPLAY EXAMPLE
LV
PLL lock voltage
check point
C133
PLL lock voltage
adjustment for TX
C134
PLL lock voltage
adjustment for RX
DC power supply
13.2 V / 15 A
5 - 4
5-2 PLL ADJUSTMENT
PLL LOCK
VOLTAGE
1
2
3
4
•Operating freq. : 400.000 MHz A
440.000 MHz B
•Receiving
•Output power : Low1
•Transmitting
•Operating freq. : 430.000 MHz A
490.000 MHz B
•Receiving
•Output power : Low1
•Transmitting
MAIN Connect a digital multi-
meter or an oscillo-
scope to the check
point, “LV”.
1.0 V
1.1 V
3.3–4.5 V
3.3–4.5 V
MAIN C133
C134
Verify
ADJUSTMENT ADJUSTMENT CONDITIONS
UNIT LOCATION
VALUE
UNIT ADJUST
MEASUREMENT ADJUSTMENT
A: 400–430 MHz version for [F210], [F211] B: 440–490 MHz version for [F210], [F211], [F221]
5 - 5
5-3 SOFTWARE ADJUSTMENT
Select an operation using [↑] / [↓] keys, then set specified value using [←] / [→] keys on the connected computer keyboard.
1
1
2
3
1
2
1
2
1
•Operating freq. : 430.000 MHz A
490.000 MHz B
•Output power : Low1
•Connect the RF power meter or 50 Ω
dummy load to the antenna connector.
•Transmitting
•Operating freq. : 430.000 MHz A
490.000 MHz B
•Output power : High
•Transmitting
•Output power : Low2
•Transmitting
•Output power : Low1
•Transmitting
•Operating freq. : 415.000 MHz A
465.000 MHz B
•Output power : Low1
•IF bandwidth : Wide
•Connect an audio generator to the [MIC]
jack through the JIG cable and set as:
1.0 kHz/40 mVrms
•Set an FM deviation meter as:
HPF : OFF
LPF : 20 kHz
De-emphasis: OFF
Detector : (P–P)/2
•Transmitting
•IF bandwidth : Narrow
•Transmitting
•Operating freq. : 415.000 MHz A
465.000 MHz B
•Set to the DTCS set channel, and push
[Connect] on the Adjustment software.
•Operating freq. : 155.000 MHz
•Output power : Low1
•Transmitting
•IF bandwidth : Narrow
•Transmitting
•Operating freq. : 430.000 MHz A
490.000 MHz B
•Output power : Low1
•IF bandwidth : Wide
•CTCSS : 67 Hz
•DTCS code : 007
•Set the FM deviation meter as:
HPF : OFF
LPF : 20 kHz
De-emphasis: OFF
Detector : (P–P)/2
•No audio applied to the [MIC] connector.
•Transmitting
REFERENCE
FREQUENCY
[TXF]
OUTPUT
POWER
[Power (Hi)]
[Power (L2)]
[Power (L1)]
FM
DEVIATION
[MOD W]
[MOD Ratio]
MODULATION
BALLANCE
[BAL W]
[BAL Ratio]
CTCSS/DTCS
DEVIATON
[CTCS/DTCS]
Rear
panel
Rear
panel
Rear
panel
Rear
panel
Rear
panel
Loosely couple a frequnecy
counter to the antenna connec-
tor.
Connect an RF power meter to
the antenna connector.
Connect an FM deviation meter
to the antenna connector
through the attenuator.
Connect an FM deviation meter
with an oscilloscope to the
antenna connector through an
attenuator.
Connect an FM deviation meter
to the antenna connector
through the attenuator.
430.0000 MHz A
490.0000 MHz B
25.0 W [25 W]
45.0 W [45 W]
10.0 W [25 W]
25.0 W [45 W]
2.5 W [25 W]
4.5 W [45 W]
±4.1 kHz [N/W]
±3.3 kHz [N/M]
±2.1 kHz
±0.8 kHz [N/W]
±0.64 kHz [N/W]
ADJUSTMENT ADJUSTMENT CONDITION MEASUREMENT VALUE
UNIT LOCATION
Set to square wave
form
A: 400–430 MHz version for [F210], [F211] B: 440–490 MHz version for [F210], [F211], [F221]
5 - 6
*The output level of the standard signal generator (SSG) is indicated as the SSG’s open circuit.
SOFTWARE ADJUSTMENT – continued
Select an operation using [↑] / [↓] keys, then set specified value using [←] / [→] keys on the connected computer keyboard.
Minimum distortion
level
Set “SQL level”to
close squelch.
Then set “SQL level”
at the point where
the audio signals
just appears.
1
1
1
2
•Operating freq. : 400.000 MHz A
440.000 MHz B
•IF bandwidth : Wide
•Connect a standard signal generator to
the antenna connector and set as:
Frequency : 400.000 MHz A
440.000 MHz B
Level : 10 µV* (–87 dBm)
Modulation : 1 kHz
Deviation : ±3.5 kHz [N/W]
±2.8 kHz [N/M]
•Receiving
•Operating freq. : 415.000 MHz A
465.000 MHz B
•IF bandwidth : Narrow
•Connect an SSG to the antenna con-
nector and set as:
Frequency : 415.000 MHz A
465.000 MHz B
Level : 0.2 µV* (–121 dBm)
Modulation : 1 kHz
Deviation : ±1.75 kHz
•Receiving
•Operating freq. : 400.000 MHz A
440.000 MHz B
•IF bandwidth : Wide
•Connect an SSG to the antenna con-
nector and set as:
Frequency : 400.000 MHz A
440.000 MHz B
Level : 14 µV* (–84 dBm)
Modulation : 1 kHz
Deviation : ±3.5 kHz [N/W]
±2.8 kHz [N/M]
•Receiving
•Set an SSG as:
Level : 0.45 µV* (–114 dBm)
RX
SENSITIVITY
[BPF T1],
[BPF T2]
SQUELCH
LEVEL
[SQL]
S-METER
[S-METER]
(S3 LEVEL)
(S1 LEVEL)
MAIN
Rear
panel
Connect a SINAD meter with a
4Ωload to the external [SP]
jack.
Connect a SINAD meter with a
4Ωload to the external [SP]
jack.
ADJUSTMENT ADJUSTMENT CONDITION
MEASUREMENT
VALUE
UNIT LOCATION
CONVENIENT:
The BPF T1–BPF T2 can be adjusted automatically.
q-1: Set the cursol to “BPF ALL”on the adjustment program and then push [ENTER] key.
q-2: The connected PC tunes BPF T1, BPF T2 to peak levels.
or
w-1: Set the cursol to BPF T1 or BPF T2 as desired.
w-2: Push [ENTER] key to start tuning.
w-3: Repeat w-1 and w-2 to perform additional BPF tuning.
•Adjusting S3 and S1’s S-meter level automatically when
push the return key on the key board.
A: 400–430 MHz version for [F210], [F211] B: 440–490 MHz version for [F210], [F211], [F221]
5 - 7
R59
Beep volume adjustment
5-4 TRIMMER ADJUSTMENT
• Make this adjustment if necessary (For example, when beep sound is too loud or too soft).
• BE CAREFUL!: 5-tone calling beep sound becomes loud or soft when beep volume adjusts to loud or soft.
BEEP
VOLUME
1•Operating freq. : Any
•Receiving
FRONT
Push any button except [POWER]
switch, then verify the beep volume
level.
FRONT
R59
ADJUSTMENT ADJUSTMENT CONDITIONS
UNIT LOCATION UNIT ADJUST
MEASUREMENT ADJUSTMENT
• FRONT PANEL
[FRONT UNIT][FRONT UNIT]
IC1 1140011260 S.IC HD6433687A11FP (FX-2622A)
IC2 1110005770 S.IC S-80942CNMC-G9C-T2
IC3 1140008650 S.IC HN58X2464TI
IC5 1110005340 S.IC NJM12902V-TE1
IC6 1130009090 S.IC LC75834W
Q1 1530002850 S.TRANSISTOR 2SC4116-BL (TE85R)
Q2 1590001050 S.TRANSISTOR DTC114TUA T106
Q3 1590000430 S.TRANSISTOR DTC144EUA T106
Q5 1590001050 S.TRANSISTOR DTC114TUA T106
D1 1790000950 S.ZENER MA8056-M (TX)
D2 1790000950 S.ZENER MA8056-M (TX)
D3 1790000950 S.ZENER MA8056-M (TX)
D4 1790000620 S.DIODE MA77 (TX)
D5 1790001250 S.DIODE MA2S111-(TX)
X1 6050009520 S.XTAL CR-520 (19.6608 MHz+)
L1 6200003640 S.COIL MLF1608E 100K-T
L2 6200001980 S.COIL NL 252018T-1R0J
R7 7030009160 S.RESISTOR ERJ2GEJ 181 X (180 Ω)
R8 7030009160 S.RESISTOR ERJ2GEJ 181 X (180 Ω)
R9 7030005000 S.RESISTOR ERJ2GEJ 471 X (470 Ω)
R11 7030009280 S.RESISTOR ERJ2GE
R12 7030009140 S.RESISTOR ERJ2GEJ 272 X (2.7 kΩ)
R14 7210003020 VARIABLE EVU-F2KFK1 B14 (10KB)
R15 7030005120 S.RESISTOR ERJ2GEJ 102 X (1 kΩ)
R16 7030005120 S.RESISTOR ERJ2GEJ 102 X (1 kΩ)
R18 7030005090 S.RESISTOR ERJ2GEJ 104 X (100 kΩ)
R19 7030005090 S.RESISTOR ERJ2GEJ 104 X (100 kΩ)
R20 7030008300 S.RESISTOR ERJ2GEJ 184 X (180 kΩ)
R21 7030005720 S.RESISTOR ERJ2GEJ 563 X (56 kΩ)
R22 7030005220 S.RESISTOR ERJ2GEJ 223 X (22 kΩ)
R23 7030005240 S.RESISTOR ERJ2GEJ 473 X (47 kΩ)
R24 7030005240 S.RESISTOR ERJ2GEJ 473 X (47 kΩ)
R25 7030005220 S.RESISTOR ERJ2GEJ 223 X (22 kΩ)
R26 7030005240 S.RESISTOR ERJ2GEJ 473 X (47 kΩ)
R27 7030005240 S.RESISTOR ERJ2GEJ 473 X (47 kΩ)
R28 7030005040 S.RESISTOR ERJ2GEJ 472 X (4.7 kΩ)
R29 7030008290 S.RESISTOR ERJ2GEJ 183 X (18 kΩ)
R30 7030005110 S.RESISTOR ERJ2GEJ 224 X (220 kΩ)
R31 7030005090 S.RESISTOR ERJ2GEJ 104 X (100 kΩ)
R32 7030005240 S.RESISTOR ERJ2GEJ 473 X (47 kΩ)
R33 7030005220 S.RESISTOR ERJ2GEJ 223 X (22 kΩ)
R34 7030005220 S.RESISTOR ERJ2GEJ 223 X (22 kΩ)
R35 7030005070 S.RESISTOR ERJ2GEJ 683 X (68 kΩ)
R36 7030005070 S.RESISTOR ERJ2GEJ 683 X (68 kΩ)
R37 7030005070 S.RESISTOR ERJ2GEJ 683 X (68 kΩ)
R38 7030005070 S.RESISTOR ERJ2GEJ 683 X (68 kΩ)
R39 7030005070 S.RESISTOR ERJ2GEJ 683 X (68 kΩ)
R40 7030005240 S.RESISTOR ERJ2GEJ 473 X (47 kΩ)
R41 7030005050 S.RESISTOR ERJ2GEJ 103 X (10 kΩ)
R42 7030007350 S.RESISTOR ERJ2GEJ 393 X (39 kΩ)
R43 7030005060 S.RESISTOR ERJ2GEJ 333 X (33 kΩ)
R44 7030005100 S.RESISTOR ERJ2GEJ 154 X (150 kΩ)
R45 7030005530 S.RESISTOR ERJ2GEJ 100 X (10 Ω)
R46 7030005160 S.RESISTOR ERJ2GEJ 105 X (1 MΩ)
R47 7030008010 S.RESISTOR ERJ2GEJ 123 X (12 kΩ)
R48 7030008010 S.RESISTOR ERJ2GEJ 123 X (12 kΩ)
R49 7030008010 S.RESISTOR ERJ2GEJ 123 X (12 kΩ)
R50 7410001130 S.ARRAY EXB28V102JX
R51 7030005090 S.RESISTOR ERJ2GEJ 104 X (100 kΩ)
R52 7030005120 S.RESISTOR ERJ2GEJ 102 X (1 kΩ)
R54 7410001130 S.ARRAY EXB28V102JX
R55 7410000770 S.ARRAY EXB-V4V 102JV (1 kΩ)
S.=Surface mount
R56 7410001130 S.ARRAY EXB28V102JX
R57 7030005160 S.RESISTOR ERJ2GEJ 105 X (1 MΩ)
R58 7030005050 S.RESISTOR ERJ2GEJ 103 X (10 kΩ)
R59 7310002740 S.TRIMMER RV-150 (RH03A3A14X0FC) 103
R60 7030005090 S.RESISTOR ERJ2GEJ 104 X (100 kΩ)
R65 7030005120 S.RESISTOR ERJ2GEJ 102 X (1 kΩ)
R67 7030005050 S.RESISTOR ERJ2GEJ 103 X (10 kΩ)
R68 7030005050 S.RESISTOR ERJ2GEJ 103 X (10 kΩ)
R73 7030005050 S.RESISTOR ERJ2GEJ 103 X (10 kΩ)
R74 7030005050 S.RESISTOR ERJ2GEJ 103 X (10 kΩ)
R75 7030005050 S.RESISTOR ERJ2GEJ 103 X (10 kΩ)
R76 7030005120 S.RESISTOR ERJ2GEJ 102 X (1 kΩ)
R77 7030005030 S.RESISTOR ERJ2GEJ 152 X (1.5 kΩ)
R78 7030005240 S.RESISTOR ERJ2GEJ 473 X (47 kΩ)
R79 7410000770 S.ARRAY EXB-V4V 102JV (1 kΩ)
R80 7030005090 S.RESISTOR ERJ2GEJ 104 X (100 kΩ)
R81 7030005090 S.RESISTOR ERJ2GEJ 104 X (100 kΩ)
R82 7030005090 S.RESISTOR ERJ2GEJ 104 X (100 kΩ)
R83 7030005090 S.RESISTOR ERJ2GEJ 104 X (100 kΩ)
R84 7030005090 S.RESISTOR ERJ2GEJ 104 X (100 kΩ)
R85 7030005090 S.RESISTOR ERJ2GEJ 104 X (100 kΩ)
R86 7030005090 S.RESISTOR ERJ2GEJ 104 X (100 kΩ)
R87 7030005090 S.RESISTOR ERJ2GEJ 104 X (100 kΩ)
R88 7030005090 S.RESISTOR ERJ2GEJ 104 X (100 kΩ)
R89 7030005090 S.RESISTOR ERJ2GEJ 104 X (100 kΩ)
R90 7030006610 S.RESISTOR ERJ2GEJ 394 X (390 kΩ)
C1 4030018100 S.CERAMIC ECJ0EB1H681K
C2 4030017420 S.CERAMIC ECJ0EC1H470J
C3 4030017420 S.CERAMIC ECJ0EC1H470J
C4 4030017420 S.CERAMIC ECJ0EC1H470J
C5 4030017420 S.CERAMIC ECJ0EC1H470J
C6 4030017420 S.CERAMIC ECJ0EC1H470J
C7 4030017420 S.CERAMIC ECJ0EC1H470J
C8 4030017460 S.CERAMIC ECJ0EB1E102K
C9 4030017460 S.CERAMIC ECJ0EB1E102K
C10 4030017460 S.CERAMIC ECJ0EB1E102K
C11 4030017420 S.CERAMIC ECJ0EC1H470J
C12 4030017460 S.CERAMIC ECJ0EB1E102K
C14 4030017460 S.CERAMIC ECJ0EB1E102K
C15 4030016960 S.CERAMIC ECJ0EB1C183K
C16 4030016930 S.CERAMIC ECJ0EB1A104K
C17 4030017740 S.CERAMIC ECJ0EB1E821K
C19 4030016930 S.CERAMIC ECJ0EB1A104K
C20 4030018110 S.CERAMIC ECJ0EB1H272K
C21 4030018240 S.CERAMIC ECJ0EB1E562K
C22 4030017710 S.CERAMIC ECJ0EC1H181J
C23 4030018090 S.CERAMIC ECJ0EB1C822K
C24 4030017510 S.CERAMIC ECJ0EC1H680J
C25 4030016790 S.CERAMIC ECJ0EB1C103K
C26 4030016930 S.CERAMIC ECJ0EB1A104K
C27 4030017450 S.CERAMIC ECJ0EB1E271K
C28 4030016930 S.CERAMIC ECJ0EB1A104K
C29 4550006050 S.TANTALUM TEMSVA 0J 106M8L
C30 4030017030 S.CERAMIC ECJ0EB1A273K
C31 4030017400 S.CERAMIC ECJ0EC1H220J
C32 4030017640 S.CERAMIC ECJ0EC1H150J
C33 4030017510 S.CERAMIC ECJ0EC1H680J
C34 4030017730 S.CERAMIC ECJ0EB1E471K
C35 4030016930 S.CERAMIC ECJ0EB1A104K
C36 4030016930 S.CERAMIC ECJ0EB1A104K
C37 4030017420 S.CERAMIC ECJ0EC1H470J
C38 4030017420 S.CERAMIC ECJ0EC1H470J
C41 4030017460 S.CERAMIC ECJ0EB1E102K
C50 4030017420 S.CERAMIC ECJ0EC1H470J
C54 4030017420 S.CERAMIC ECJ0EC1H470J
C69 4030017420 S.CERAMIC ECJ0EC1H470J
C74 4030017420 S.CERAMIC ECJ0EC1H470J
C75 4030016930 S.CERAMIC ECJ0EB1A104K
C76 4030016930 S.CERAMIC ECJ0EB1A104K
C77 4030016950 S.CERAMIC ECJ0EB1A473K
6 - 1
SECTION 6 PARTS LIST
REF ORDER DESCRIPTION
NO. NO.
REF ORDER DESCRIPTION
NO. NO.
A: 440–490 MHz for [F210] B: 440–490 MHz for [F211] C: 400–430 MHz for [F210] D: 400–430 MHz for [F211] E: [F221] and [F211]
F: [F210] G: 440–490 MHz H: 400–430 MHz I: Wide/Narrow J: Middle/Narrow K: [F221]
S.=Surface mount
[MAIN UNIT][FRONT UNIT]
C78 4030017460 S.CERAMIC ECJ0EB1E102K
C79 4030016930 S.CERAMIC ECJ0EB1A104K
C80 4030016930 S.CERAMIC ECJ0EB1A104K
C81 4030017460 S.CERAMIC ECJ0EB1E102K
C82 4030017420 S.CERAMIC ECJ0EC1H470J
C83 4030017420 S.CERAMIC ECJ0EC1H470J
C84 4030017420 S.CERAMIC ECJ0EC1H470J
C85 4030017420 S.CERAMIC ECJ0EC1H470J
J1 6450002210 CONNECTOR 3017-8821 <KIN>
J2 6510022470 S.CONNECTOR 40FLT-SM1-TB
DS1 5040002310 S.LED SML-311YTT86
DS2 5040002310 S.LED SML-311YTT86
DS3 5040002310 S.LED SML-311YTT86
DS4 5040002310 S.LED SML-311YTT86
DS5 5040002310 S.LED SML-311YTT86
DS6 5040002310 S.LED SML-311YTT86
DS7 5040002310 S.LED SML-311YTT86
DS8 5040002310 S.LED SML-311YTT86
DS9 5040002310 S.LED SML-311YTT86
DS11 5030002510 LCD L2-0607TAY
SP1 2510001220 SPEAKER C052SB500-13
W1 8900010500 CABLE OPC-1046
EP1 0910055684 PCB B 5910D
EP2 8930059170 LCD CONTACT SRCN-2622-SP-N-W
IC1 1110003490 S.IC TA31136FN (D,EL)
IC2 1110002750 S.IC TA75S01F (TE85R)
IC3 1150002031 IC RA30H4452M-21 A
1150002061 IC RA45H4452M-21 B, K
1150002091 IC RA30H4047M-21 C
1150002141 IC RA45H4047M-21 D
IC4 1140005990 S.IC MB15A02PFV1-G-BND-ER
IC5 1110005330 S.IC NJM12904V-TE1
IC6 1190000350 S.IC M62363FP-650C
IC8 1110003090 IC LA4425A
IC9 1180001250 S.IC TA7808F (TE16L)
IC10 1180000970 S.IC AN78L05M-(E1)
IC14 1130008090 S.IC BU4066BCFV-E1
IC15 1110002750 S.IC TA75S01F (TE85R)
IC16 1110005340 S.IC NJM12902V-TE1
IC17 1130007570 S.IC BU4094BCFV-E2
Q1 1560000840 S.FET 2SK1829 (TE85R)
Q2 1580000730 S.FET 3SK293 (TE85L)
Q3 1580000760 S.FET 3SK299-T1 U73
Q4 1530002600 S.TRANSISTOR 2SC4215-O (TE85R)
Q5 1590000430 S.TRANSISTOR DTC144EUA T106
Q8 1530000371 S.TRANSISTOR 2SC3356-T1B R25
Q9 1530003310 S.TRANSISTOR 2SC5107-O (TE85R)
Q10 1530003310 S.TRANSISTOR 2SC5107-O (TE85R)
Q11 1530003310 S.TRANSISTOR 2SC5107-O (TE85R)
Q12 1530003310 S.TRANSISTOR 2SC5107-O (TE85R)
Q13 1530002920 S.TRANSISTOR 2SC4226-T1 R25
Q14 1530002920 S.TRANSISTOR 2SC4226-T1 R25
Q15 1590001400 S.TRANSISTOR XP1214 (TX)
Q16 1590000430 S.TRANSISTOR DTC144EUA T106
Q17 1530002850 S.TRANSISTOR 2SC4116-BL (TE85R)
Q18 1560000540 S.FET 2SK880-Y (TE85R)
Q19 1530002600 S.TRANSISTOR 2SC4215-O (TE85R)
Q20 1530002850 S.TRANSISTOR 2SC4116-BL (TE85R) Eonly
Q23 1550000020 S.FET 2SJ377 (TE16R)
Q24 1590000430 S.TRANSISTOR DTC144EUA T106
Q25 1540000550 S.TRANSISTOR 2SD1664 T100Q
Q26 1510000920 S.TRANSISTOR 2SA1577 T106 Q
Q27 1510000920 S.TRANSISTOR 2SA1577 T106 Q
Q28 1590001190 S.TRANSISTOR XP6501-(TX) .AB
Q29 1590001050 S.TRANSISTOR DTC114TUA T106
Q30 1590000430 S.TRANSISTOR DTC144EUA T106
Q31 1590001450 S.FET 2SJ144-GR (TE85R)
Q33 1590000430 S.TRANSISTOR DTC144EUA T106
Q34 1530002850 S.TRANSISTOR 2SC4116-BL (TE85R)
Q35 1590000990 S.TRANSISTOR DTC363EK T146
Q36 1590000430 S.TRANSISTOR DTC144EUA T106
Q37 1530003090 S.TRANSISTOR 2SC4213-B (TE85R)
Q38 1590000430 S.TRANSISTOR DTC144EUA T106
Q39 1590000430 S.TRANSISTOR DTC144EUA T106
D1 1790000660 S.DIODE MA728 (TX)
D2 1750000510 S.DIODE UM9401F Fonly
D3 1710001060 DIODE XB15A407 Eonly
D4 1750000710 S.VARICAP HVC350BTRF
D5 1750000510 S.DIODE UM9401F
D7 1790000660 S.DIODE MA728 (TX)
D8 1750000710 S.VARICAP HVC350BTRF
D9 1750000710 S.VARICAP HVC350BTRF
D10 1750000710 S.VARICAP HVC350BTRF
D11 1790000660 S.DIODE MA728 (TX)
D14 1750000580 S.DIODE 1SV307 (TPH3)
D15 1790000620 S.DIODE MA77 (TX)
D16 1750000710 S.VARICAP HVC350BTRF
D17 1750000710 S.VARICAP HVC350BTRF
D18 1720000570 S.VARICAP MA368 (TX)
D20 1790001250 S.DIODE MA2S111-(TX)
D21 1750000830 S.VARICAP HVC362TRF
D22 1790000700 DIODE DSA3A1
D23 1750000370 S.DIODE DA221 TL
D25 1790001250 S.DIODE MA2S111-(TX)
D26 1790001250 S.DIODE MA2S111-(TX)
D28 1790001250 S.DIODE MA2S111-(TX)
D29 1790001250 S.DIODE MA2S111-(TX)
D31 1750000520 S.DIODE DAN222TL
D37 1790001250 S.DIODE MA2S111-(TX)
D38 1790001250 S.DIODE MA2S111-(TX)
D39 1160000140 S.DIODE DAP222 TL
D40 1160000140 S.DIODE DAP222 TL
D43 1750000710 S.VARICAP HVC350BTRF Gonly
FI1 2030000150 S.MONOLITH FL-335 (46.350 MHz)
FI2 2020001840 CERAMIC ALFYM450F=K
FI3 2040001440 S.LC
NFE31PT152Z1E9L (NFM60R20T152)
FI4 2040001440 S.LC
NFE31PT152Z1E9L (NFM60R20T152)
FI5 2040001440 S.LC
NFE31PT152Z1E9L (NFM60R20T152)
Eonly
X1 6070000190
S.DISCRIMINATOR
CDBCB450KCAY24-R0 (CDBC450CX24)
X2 6050011540 S.XTAL CR-741 (15.300 MHz)
L1 6200010150 S.COIL AS080340-15N
L2 6200010150 S.COIL AS080340-15N
L3 6200010040 S.COIL AS100340-10N
L4 6200008210 S.COIL 0.45-1.5-5TL 23.2N
L5 6200010420 S.COIL FHW1210HC 1R0JGT
L7 6200007230 S.COIL
LQW2BHN15NJ01L (LQN21A 15NJ04)
H
6200007680 S.COIL
LQW2BHN12NJ01L (LQN21A 12NJ04)
G
L8 6200007230 S.COIL
LQW2BHN15NJ01L (LQN21A 15NJ04)
H
6200007680 S.COIL
LQW2BHN12NJ01L (LQN21A 12NJ04)
G
6 - 2
REF ORDER DESCRIPTION
NO. NO.
REF ORDER DESCRIPTION
NO. NO.
[MAIN UNIT]
REF ORDER DESCRIPTION
NO. NO.
A: 440–490 MHz for [F210] B: 440–490 MHz for [F211] C: 400–430 MHz for [F210] D: 400–430 MHz for [F211] E: [F221] and [F211]
F: [F210] G: 440–490 MHz H: 400–430 MHz I: Wide/Narrow J: Middle/Narrow K: [F221]
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2
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