Icom IC-F8101 User manual

S-15305XZ-C1
July 2016
HF TRANSCEIVER
(For ALE Enhanced versions)

This service manual describes the latest technical informa-
tion for the IC-F8101/F8100 ALE (Automatic Link Establish-
ment)/Selcall capabile HF TRANSCEIVER, at the time of
publication.
NEVER connect the transceiver to an AC outlet or to a DC
power supply that uses more than the specified voltage. This
will ruin the transceiver.
DO NOT expose the transceiver to rain, snow or liquids.
DO NOT reverse the polarities of the power supply when con-
necting the transceiver.
DO NOT apply an RF signal of more than 20 dBm (100 mW) to
the antenna connector. This could damage the transceiver’s
front-end.
To upgrade quality, any electrical or mechanical parts
and internal circuits are subject to change without notice
or obligation.
MODEL VERSION VERSION
NUMBER
TX
POWER ACCESSORIE
IC-F8101
EXP-04 #31 125W
–
AUS-04 #32 100W
USA-04 #33
125W
IC-F8100 UN-04 #34
IC-F8101
RUS-04 #36 HM-193
EXP-05 #41
RMK-6
AUS-05 #42 100W
USA-05 #43
125W
IC-F8100 UN-05 #44
IC-F8101
CHN-05 #45
RUS-05 #46 RMK-6, HM-193
EXP-06 #51
HM-192
AUS-06 #52 100W
USA-06 #53 125W
IC-F8100 UN-06 #54
Be sure to include the following four points when ordering
replacement parts:
1. 10-digit Icom part number
2. Component name
3. Equipment model name and unit name
4. Quantity required
<ORDER EXAMPLE>
1110003491 S.IC TA31136FNG IC-F8101 MAIN-A UNIT 5 pieces
8820001210 Screw 2438 screw IC-F8101 Top cover 10 pieces
Addresses are provided on the inside back cover for your
convenience.
ORDERING PARTS
1. Make sure that the problem is internal before dis-assem-
bling the transceiver.
2. DO NOT open the transceiver until the transceiver is dis-
connected from its power source.
3. DO NOT force any of the variable components. Turn them
slowly and smoothly.
4. DO NOT short any circuits or electronic parts. An insulated
tuning tool MUST be used for all adjustments.
5. DO NOT keep power ON for a long time when the trans-
ceiver is defective.
6. DO NOT transmit power into a Standard Signal Generator
or a Sweep Generator.
7. ALWAYS connect a 40/60 dB attenuator between the trans-
ceiver and a Deviation Meter or Spectrum Analyzer, when
using such test equipment.
8. READ the instructions of the test equipment thoroughly
before connecting it to the transceiver.
REPAIR NOTES
INTRODUCTION CAUTION
(IC-F8101 [#41])
Icom, Icom Inc. and the Icom logo are registered trademarks of Icom Incorporated (Japan) in Japan, the United States, the
United Kingdom, Germany, France, Spain, Russia, Australia, New Zealand, and/or other countries.

TABLE OF CONTENTS
SECTION 1 SPECIFICATIONS
SECTION 2 INSIDE VIEWS
SECTION 3 DISASSEMBLY INSTRUCTION
SECTION 4 CIRCUIT DESCRIPITON
4-1 RECEIVER CIRCUITS...................................................................................... 4-1
4-2 TRANSMITTER CIRCUITS............................................................................... 4-2
4-3 FREQUENCY SYNTHESIZER CIRCUITS ....................................................... 4-4
4-4 PORT ALLOCATIONS ...................................................................................... 4-5
4-5 VOLTAGE CIRCUITS ........................................................................................ 4-6
SECTION 5 ADJUSTMENT PROCEDURE
5-1 PREPARATION ................................................................................................. 5-1
5-2 RECEIVE ADJUSTMENT ................................................................................. 5-5
5-3 TRANSMIT ADJUSTMENT............................................................................... 5-7
SECTION 6 PARTS LIST
SECTION 7 MECHANICAL PARTS
SECTION 8 BOARD LAYOUTS
SECTION 9 GENERAL WIRING
SECTION 10 BLOCK DIAGRAM
SECTION 11 VOLTAGE DIAGRAM

1-1
SECTION 1
.
SPECIFICATIONS
MGeneral
• Frequency coverage:
Receive 0.5–29.9999 MHz
Transmit 1.6–29.9999 MHz
• Mode:
AUS versions J3E (USB),
A3E (AM; RX only)
Other versions J3E (USB/LSB),
A3E (AM), A1A (CW),
F1B (FSK),
J2B (D1, D2, D3)
• Number of memory Channel: 500 channels
(maximum)
• Usable temperature range: –30˚C to +60˚C, –22°F
to +140°F
• Frequency stability: ±0.3 ppm (–30˚C
to +60˚C, –22°F to
+140°F)
• Antenna impedance: 50 
• Power supply: 13.8 V DC (negative
ground)
AUS versions 10.8–15.6 V DC
Other versions 11.73–15.87 V DC
• Current drain:
Transmit Less than 28 A (at
maximum power)
Receive Less than 3.0 A (at
maximum audio)
• Dimensions (projections are not included):
Main/Front package 62(H)174(W)259(D)
mm
2.4(H)6.9(W)10.2(D)
inches
• Weight (approximately):
Main/Front package 3.9 kg, 8.6 lb
MTransmitter
• Output power (typical):
AUS versions
J3E HIGH100 W p-p
MID 50 W p-p
LOW 10 W p-p
Other versions
J3E/A1A HIGH125 W p-p
MID 50 W p-p
LOW 10 W p-p
A3E HIGH30 W Carrier
MID 12.5 W Carrier
LOW 3 W Carrier
F1B/J2B HIGH75 W p-p
MID 50 W p-p
LOW 10 W p-p
• Spurious emission:
USA versions 64 dB
below peak output power
Other versions 64 dB (typical)
below peak output power
• Carrier suppression: 50 dB
below peak output power
• Unwanted sideband suppression:
400 Hz 55 dB
below peak output power
1 kHz 65 dB
below peak output power
• Duty cycle:
Voice communication 100% (–30˚C to +60˚C,
–22°F to +140°F)
Data communication (Up to 5 minutes)
25% (–30˚C to +30˚C,
–22°F to +86°F)
When the optional CFU-F8100 is installed (All mode)
100% (–30˚C to +45˚C,
–22°F to +113°F)

1 - 1
All stated specifications are typical and subject to change without notice or obligation.
MReceiver
• Sensitivity:
J3E (Pre Amp ON/10 dB S/N)
0.5–1.5999 MHz 14 dBµV
1.6–29.9999 MHz –14 dBµV
A3E (10 dB S/N)
0.5–1.5999 MHz 22 dBµV
1.6–29.9999 MHz 6 dBµV
• Squelch sensitivity*:
J3E (Threshould) Less than +20 dBµV
(Tight) Less than +90 dBµV
(13.5 MHz)
A3E (Threshould) Less than +30 dBµV
(Tight) Less than +110 dBµV
(1.0 MHz)
*When “S-meter SQL” is selected for the squelch function.
• Selectivity:
J3E 2.4 kHz/–6 dB,
3.8 kHz/–60 dB
A3E 6 kHz/–6 dB,
15 kHz/–60 dB
• Spurious response: More than 70 dB
• Spurious response rejection ratio:
More than 70 dB
• AF output power:
More than 4.0 W at 10%
distortion with a 4 load
• Clarifier range: ±200 Hz
• Receiving System: Triple Conversion
Superheterodyne
• Intermediate Frequencies:
1st 64.455 MHz
2nd 455 kHz
3rd 36 kHz

2-1
SECTION 2 INSIDE VIEWS
???????
(???)
• ??? UNIT
(TOP VIEW)
• DISPLAY-A UNIT
LCD DIMMER CONTROLLER
(Q6301)
RESET IC
(IC6001)
LCD DIMMER CONTROLLER
(Q6302)
FRONT CPU CLOCK
(X6001)
FRONT CPU
(IC6004)
LEVEL CONVERTER
(IC6012)
+10 V REGULATOR
(IC6011)
+5 V REGULATOR
(IC6008)
+3 V REGULATOR
(IC6007)
???????
(???)
???????
(???)
MIC ALC AMP
(IC6005)
LCD DIMMER CONTROLLER
(Q6303)
+8 V REGULATOR
(IC6009)
???????
(???)
LCD DIMMER CONTROLLER
(IC6010)
???????
(???)
???????
(???)
???????
(???)
???????
(???)
???????
(???)
???????
(???)
???????
(???)
???????
(???)

2-2
???????
(???)
• MAIN-A UNIT
• ??? UNIT
(BOTTOM VIEW)
???????
(???)
ALC AMP
(IC1102)
1ST TX IF MIXER
(IC1401)
1ST TX IF BUFFER
(Q1401)
RF AMP
(Q1117)
1/2 PRESCALER
(IC1603)
???????
(???)
RSSI METER AMP
(IC1103)
3RD TX IF MIXER
(IC1402)
???????
(???)
R8 LINE CONTROLLER
(IC1804)
MAIN CPU
(IC1806)
DDS
(IC1703)
SRAM
(IC1812)
D/A CONVERTER
(IC1815)
SERIAL TO PARALLEL
CONVERTER
(IC1105)
2ND TX IF AMP
(Q1417)
2ND RX IF AMP
(Q1415)
2ND RX IF AMP
(Q1413)
???????
(???)
YGR AMP
(IC1101)
RF AMP
(Q1116)
???????
(???)
1ST LO AMP
(Q1410)
1ST TX/RX IF BPF
(FI1401)
???????
(???)
???????
(???)
???????
(???)
???????
(???)
2ND RX IF FILTER
(FI1402)
LEVEL CONVERTER
(IC1817)
LEVEL CONVERTER
(IC1818)
???????
(???)
???????
(???)
???????
(???)

2-3
???????
(???)
• PA-A UNIT
• ??? UNIT
(BOTTOM VIEW)
???????
(???)
???????
(???)
???????
(???)
???????
(???)
BIAS CONTROLLER
(for POWER AMP)
(IC4002)
???????
(???)
???????
(???)
???????
(???)
???????
(???)
???????
(???)
COOLING FAN DRIVER
(Q4008)
???????
(???)
???????
(???)
???????
(???)
SERIAL TO PARALLE
CONVERTER
(IC5001)
VARISTOR-2 UNIT
POWER AMP
(Q4006)
PRE-DRIVE AMP
(Q4003)
RF AMP
(Q4002)
COOLING FAN DRIVER
(Q4001)
VARISTOR-1 UNIT
POWER AMP
(Q4007)
POWER COMBINER
(L4014)
POWER DIVIDER
(L4009)

2-4
???????
(???)
• ??? UNIT
(TOP VIEW)
• DSP1-A UNIT
???????
(???)
???????
(???)
???????
(???)
GPS DRIVE
(IC3623)
???????
(???)
BUFF
(IC3629)
???????
(???)
???????
(???)
???????
(???)
???????
(???)
???????
(???)
???????
(???)
???????
(???)
???????
(???)
CLOCK GENERATOR
(IC3610)
A/D CONVERTER
(IC3608)
BUFFER
(IC3605)
BUFFER
(IC3614)
BUFFER
(IC3603)
BUFFER
(IC3602)
D/A CONVERTER
(IC3013)
D/A CONVERTER
(IC3613)
MIC AMP
(IC3004)
AGC LIMITTER
(IC3617)
BUFFER
(IC3601)
BUFFER
(IC3604)
AF AMP
(IC3001)
AF MUTE SW
(IC3005)
LPF
(IC3003)
BUFFER
(IC3615)
BUFFER
(IC3607)
CODEC
(IC3611)
ELECTRONIC VOLUME
(IC3008)
S/P CNVERTER
(IC3012)
AF SW
(IC3624)
AF SW
(IC3625)

2-5
???????
(???)
• ??? UNIT
(TOP VIEW)
• DSP2-A UNIT
???????
(???)
USB HUB
(IC8207)
AF SW
(IC8216)
USB BRIDGE
(IC8209)
USB BRIDGE
(IC8210)
USB CODEC
(IC8208)
+3.3 V REGURATOR
(IC8215)
???????
(???)
???????
(???)
RESET IC
(IC8204)
AF SW
(IC8217)
RESET IC
(IC8205)
???????
(???)
???????
(???)
???????
(???)
???????
(???)
???????
(???)
???????
(???)
???????
(???)
???????
(???)
???????
(???)
DSP
(IC8201)
+1.2 V REGULATOR
(IC8203)

3-1
SECTION 3
.
DISASSEMBLY INSTRUCTION
2. Removing the MAIN-A UNIT
1) Remove 4 screws from the top cover, and then
remove it.
1. Removing the DISPLAY-A UNIT
1) Remove 4 hex socket screws from the FRONT
PANEL, and then separate it from the CHASSIS.
2) Disconnect the inline cable, and then remove the
FRONT PANEL from the CHASSIS in the direction
of the arrow.
2) Disconnect the inline cable, 4 flat cables and
2 coaxial cables from the MAIN-A UNIT.
MAIN-A UNIT
J1005
J1005
J1005
J1005
J1005
J1005 J3002
J3002
J4007
J4006
PA
PA-A UNIT
J4001
J3001
J3001
Top cover
Screw ×4
CHASSIS
MAIN-A UNIT
J1005
J1005
J1005
J1005
J1005
J1005 J3002
J3002
J4007
J4006
PA
PA-A UNIT
Remove with;
3/32 inch allen driver
Hex socket screw ×4
Inline cable
FRONT PANEL
J4001
J3001
J3001
MAIN-A UNIT
J1005
J1005
J1005
J1005
J1005
J1005 J3002
J3002
J4007
J4006
PA
J6001
J6003
J6002
PA-A UNIT
INLINE CABLE
FRONT PANEL
DISPLAY-A UNIT
Screw ×7
J4001
J3001
J3001
flat cable
Carefully pull straight
out on the side tabs to
release the lock.
Pull straight
FLAT CABLE
Flat cable
Flat cable
CAUTION: BE CAREFUL with the tabs,
or they could break.
MAIN-A UNIT
MAIN-A UNIT
J1005
J1004
J1005
J1005
J1005
J1003
J1005
J1001
J1005
J1101
J1005
J1102
J3002
J3002
J4007
J4006
PA
PA-A UNIT
INLINE CABLE
FLAT
CABLE
COAXIAL CABLE
J4001
J3001
J3001
FLAT
CABLE
MAIN-A UNIT
J1005
J1005
J1005
J1005
J1005
J1005 J3002
J3002
J4007
J4006
PA
PA-A UNIT
J4001
J3001
J3001
MAIN-A UNIT
Screw ×7
CHASSIS
3) Remove 7 screws from the MAIN-A UNIT.
4) Remove the MAIN-A UNIT from the CHASSIS in
the direction of the arrow.
3) Disconnect the flat cable and 2 inline cables from
the DISPLAY-A UNIT.
4) Remove 7 screws from the DISPLAY-A UNIT.
5) Remove the DISPLAY-A UNIT from the FRONT
PANEL.

3-2
3. Removing the DSP-1 and DSP2-A UNITs
1) Remove the 4 screws from the bottom cover, and
then remove it.
2) Disconnect the 2 flat cables from the DSP2-A UNIT.
MAIN-A UNIT
J1005
J1005
J1005
J1005
J1005
J1005 J3002
J3002
J4007
J4006
PA
PA-A UNIT
J4001
J3001
J3001
CHASSIS
Bottom cover
Screw ×4
MAIN-A UNIT
J1005
J1005
J1005
J1005
J1005
J1005 J3002
J3002
J4007
J4006
PA
PA-A UNIT
J4001
J3006
J3308
J3305
J3307
J3001
J3001
Screw ×4
Screw ×6
DSP2-A UNIT
DSP1-A
UNIT
Clip
CHASSIS
INLINE CABLE
MAIN-A UNIT
J1005
J1005
J1005
J1005
J1005
J1005 J3002
J3002
J4007
J4006
PA
PA-A UNIT
J4001
J3001
DSP2-A UNIT
DSP1-A
UNIT
J3002
J8204
J8203
J3001
J3001
FLAT
CABLE
flat cable
Carefully pull straight
out on the side tabs to
release the lock.
Pull straight
FLAT CABLE
Flat cable
Flat cable
CAUTION: BE CAREFUL with the tabs,
or they could break.
3) Remove the 4 screws from the DSP2-A UNIT, and
then remove it from the CHASSIS.
4) Remove the clip and 6 screws from the DSP1-A
UNIT.
5) Disconnect the 4 inline cables from the DSP1-A
UNIT.
6) Remove the DSP1-A UNIT from the CHASSIS.
4. Removing the DRIVER-A UNIT
1) Cut the cable tie and remove it.
MAIN-A UNIT
J1005
J1005
J1005
J1005
J1005
J1005 J3002
J3002
J4007
J4006
PA
PA-A UNIT
PA-A UNIT
J4001
J3001
J3001
CHASSIS
DRIVER-A UNIT
Screw ×2
UNSOLDER
Solder
remover
MAIN-A UNIT
J1005
J1005
J1005
J1005
J1005
J1005 J3002
J3002
J4007
J4006
PA
PA-A UNIT
J4001
J3001
J3001
Cable tie
MP45
8950000180
CABLE TIE-80
MAIN-A UNIT
J1005
J1005
J1005
J1005
J1005
J1005 J3002
J3002
J4007
J4006
PA
PA-A UNIT
J4001
J3001
J3001
PA-A UNIT
CHASSIS
PA case
2) Remove 3 screws, and then remove the PA case.
3) Unsolder total of 8 points.
4) Remove 2 screws from the DRIVER-A UNIT.
5) Remove the DRIVER-A UNIT from the CHASSIS.

3-3
5. Removing the PA-A UNIT
1) Remove the 15 screws from the PA-A UNIT.
2) Disconnect the 2 flat cables and 2 coaxial cables
from the PA-A UNIT.
3) Remove the PA-A UNIT from the CHASSIS in the
direction of the arrow.
MAIN-A UNIT
J1005
J1005
J1005
J1005
J1005
J1005 J3002
J3002
J4007
J4006
PA
PA-A UNIT
PA-A UNIT
J4001
J3001
J3001
FLAT
CABLE
COAXIAL CABLE
CHASSIS
Screw ×15

4-1
SECTION 4
.
CIRCUIT DESCRIPTION
• RF CIRCUIT
• 1ST RX IF CIRCUIT
• 2ND RX IF CIRCUIT
• 3RD IF CIRCUIT
ATT
ATT
LPF
LPF
BPF
BPF
BPF
BPF
BPF
BPF
LPF
HPF
SWR
DET
RF
AMP
BPF
PA-A UNIT
MAIN-A UNIT
0.03-1.59 MHz
1.60-2.49 MHz
2.50-3.99 MHz
4.00-5.99 MHz
6.00-8.99 MHz
9.00-12.99 MHz
13.00-19.99 MHz
20.00-29.99 MHz
RX
TX
TX circuits
20 dB
TX
RX
fc=32
MHz
fc=30 MHz
Q1116,Q1117
D1406
To the 1st RX IF circuits
D1131
D1129
2111D0211D
D1121
D1122
D1123
D1124
D1125
D1126
D1127
D1108
D5086,D5087
D5088,D5089
D5084,D5085
D5090,D5091
RX MUTE
D1107
Q1101
RL5001
D5001
D5002
D1113 D1106
D1114
D1115
D1116
D1117
D1118
D1119
D1133
D1142
IF
AMP BPF
XTAL IF
AMP
BW=15 kHz
FI1401Q1414
Q1404-Q1407 From the
RF circuits
To the 2nd RX
IF circuits
D1403
1st RX LO signal
D1405
D1408
D1411
64.455 MHz 1st RX IF
Q1810
BUFF IF
AMP
IF
AMP
BPF
CERAMIC
L1446
Filter
D1813
FI1402
Q1411 Q1415
From the 1st
RX IF circuits
To the 3rd RX
IF circuits
2nd RX LO signal
D1416
D1418
D1420
Q1413
Q1412
D1812
LPF
IC1403
3rd TX IF
IC1402
To the demodulator
circuits From the 2nd RX
IF circuits
3rd RX LO signal
D1412
36
kHz
3rd
IF
3rd IF SW
4-1 RECEIVER CIRCUITS
RF CIRCUIT (PA-A AND MAIN-A UNITS)
The RX signal from the antenna is passed through the SWR
detect circuit (PA-A UNIT; D5001, D5002), TX/RX line SW
(PA-A UNIT; RL5001) and LPF (PA-A UNIT; L5001, L5002,
C5101–C5105), and then applied to the MAIN-A UNIT.
The RX signal from the PA-A UNIT is passed through or
bypassed the attenuator circuit (MAIN-A UNIT; R1103,
R1106, R1108), RX mute SW (MAIN-A UNIT; Q1101,
D1107), TX/RX line SW (MAIN-A UNIT; D1108), and then
applied to the filter circuits.
The RX signal is passed through an LPF or one of BPFs,
depending on the operating frequency, to remove unwanted
out-of-band signals. The filtered RX signal is applied to or
bypassed the preamplifier circuit.
The RX signal from the filter circuits is applied to or
bypassed the preamplifier.
When the Preamplifier function is activated, the RX signal
is amplified by the preamplifier (MAIN-A UNIT; Q1116,
Q1117).
The amplified or bypassed RX signal is applied to the 1st
RX IF circuits.
1ST RX IF CIRCUIT (MAIN-A UNIT)
The RX signal from the preamplifier circuit is applied to the
1st RX IF mixer (Q1404–Q1407) to be mixed with the 1st
RX LO signal, resulting in the 64.455 MHz 1st RX IF signal.
The 1st RX IF signal is amplified by the 1st RX IF AMP
(Q1810) and passed through the 1st RX IF filter (FI1401).
The filtered 1st RX IF signal is amplified by another 1st RX
IF AMP (Q1414), and then applied to the 2nd RX IF circuits.
2ND RX IF CIRCUIT (MAIN-A UNIT)
The 1st RX IF signal from the 1st RX IF circuits is applied
to the 2nd RX IF mixer (D1812, D1813) to be mixed with
the 2nd RX LO signal, resulting in the 455 kHz 2nd RX IF
signal. The 2nd RX IF signal is passed through the trans-
former-coupled filter (L1446) and 2nd RX IF filter (FI1402),
and amplified by the 2nd RX IF AMPs (Q1415, Q1412 and
Q1413), and then applied to the 3rd RX IF circuits, through
the buffer (Q1411).
3RD RX IF CIRCUIT (MAIN-A UNIT)
The 2nd RX IF signal from the 2nd RX IF circuits is applied
to the 3rd RX IF mixer (IC1402) to be mixed with the 3rd RX
LO signal, resulting in the 36 kHz 3rd RX IF signal.
The 3rd RX IF signal is passed through the 3rd IF SW
(IC1403) and LPF (L1454. C1550, C1553), and then applied
to the demodulator circuits on the DSP1-A UNIT.

4-2
• DEMODULATOR AND RX AF CIRCUIT
A/D From the 3rd RX IF circuit
BUFF
BUFF
AF
MUTE
To the [SP] jack
IC8201
IC3611
CODEC
IC3608 IC3602,IC3603
IC3008 IC3615
LPF
5003CI IC3003
AF
PA DSP 36 KHz 3rd RX IF
Electronic
volume
RL3001
Speaker
SW
IC3011
DSP2-A UNIT DSP1-A UNIT
• TX AF CIRCUIT
DSP1-A UNIT
To the modulation circuits
AMP
IC3004 IC3008
AF GAIN
ADJ
MIC
AMP
MIC ALC
IC6005
DISPLAY-A
UNIT
• MODULATION CIRCUIT
IC8201
DSP
DSP2-A
UNIT DSP1-A UNIT
BUFF BUFF
To the 3rd
TX IF circuit
From the TX
AF circuits
IC3611
CODEC
IC3611
CODEC
IC3604
IC3607 IC3615
• 3RD TX IF CIRCUIT
IF
AMP
BPF
CERAMIC
IF
AMP
RXIF
FI1402
IC1403
3rd IF SW
Q1417
Q1416
IC1402
3rd TX LO signal
From the modulation
circuits
To the 2nd TX
IF circuits
D1415
D1417
D1419
D1421
455kHz 2nd TX IF
DEMODULATOR CIRCUIT (DSP1-A UNIT)
The 3rd RX IF signal from the 3rd RX IF circuits is passed
through the buffer (IC3602, IC3603), and then applied to the
A/D converter to be converted into digital audio signal.
The converted digital audio signal is applied to the DSP
(IC8201) on the DSP2-A UNIT, and demodulated and pro-
cessed.
The demodulated signal is applied to the CODEC (IC3611)
to be converted into analog AF signal. The AF signal is
passed through the buffer (IC3615), LPF (IC3003) and AF
mute SW (IC3005), and then applied to the electronic vol-
ume (IC3008), which adjusts the AF output signal in level.
The level-adjusted AF signal is amplified by the AF power
AMP (IC3011), and then output from the connected speak-
er, through the speaker SW (RL3001) and speaker connec-
tor (J3006).
4-2 TRANSMITTER CIRCUITS
TX AF CIRCUIT (DISPLAY-A and DSP1-A UNITS)
The audio signal from the microphone (MIC signal) is
applied to the DISPLAY-A UNIT, through the MICROPHONE
CONNECTOR (MIC UNIT; J6902), and then applied to the
MIC AMP with ALC circuit (IC6005). The amplified MIC sig-
nal is applied to the DSP1-A UNIT.
The MIC signal from the DISPLAY-A UNIT is amplified by
the AF AMP (IC3004), and then applied to the electronic
volume (IC3008), which adjust the MIC signal in level.
The level-adjusted MIC signal is applied to the modulation
circuits.
MODULATION CIRCUIT (DSP1-A UNIT)
The MIC signal from the TX AF circuits is applied to the
CODEC (IC3611), through the Balance-Unbalance convert-
er (IC3604 and IC3607), to be converted into digital audio
signal.
The converted digital audio signal is applied to the DSP
(IC8201) on the DSP2-A UNIT, and processed and modu-
lated.
The processed signal is applied to the DSP1-A UNIT again,
and converted into analog audio signal by the CODEC
(IC3611), and then applied to the 3rd TX IF circuits on the
MAIN-A UNIT, through the buffer (IC3615), as the 3rd TX IF
signal.
3RD TX IF CIRCUIT (MAIN-A UNIT)
The 3rd TX IF signal from the modulation circuits is applied
to the 3rd TX IF mixer (IC1402), through the 3rd IF SW
(IC1403), to be mixed with the 3rd TX LO signal, resulting in
the 455 kHz 2nd TX IF signal.
The 2nd TX IF signal is amplified by the 2nd TX IF AMP
(Q1417), passed through the 2nd TX IF filter (FI1402), and
then applied to another 2nd TX IF AMP (Q1416).
The amplified 2nd TX IF signal is applied to the 2nd TX IF
circuits.

4-3
• FILTER, TX AMPLIFIER AND LPF CIRCUITS
LPF
BPF
BPF
BPF
BPF
BPF
BPF
LPF
LPF
LPF
LPF
LPF
LPF
PWR
AMP
DRIVE
AMP
DRIVE
PRE
HPF
SWR
DET
LPF
LPF
LPF RF
AMP
BPF
MAIN-A UNIT
0.03-1.59 MHz
1.60-2.49 MHz
2.50-3.99 MHz
4.00-5.99 MHz
6.00-8.99 MHz
9.00-12.99 MHz
13.00-19.99 MHz
20.00-29.99 MHz
1.6-2.3 MHz
2.3-3.3 MHz
3.3-4.9 MHz
7.0-10.0 MHz
10.0-14.5 MHz
14.5-21.0 MHz
RX
TX
3004Q
Q4002
YGR
AMP
IC1101
21.0-30.0 MHz
4.9-7.0 MHz
Q6851
Q4006,
Q4007
From the 2nd
TX IF circuits
D1131
2111D
0211D
D1121
D1122
D1123
D1124
D1125
D1126
D1127
D1111
RL5011
RL5021
RL5031
RL5041
RL5051
RL5061
RL5071
RL5081
RL5022
RL5032
RL5042
RL5052
RL5062
RL5072
RL5082
RL5001
D5001
D5002
PA-A UNIT
RL5012
D1113 D1106
D1114
D1115
D1116
D1118
D1119
D1117
D1133
• 2ND AND 1ST TX IF CIRCYUIT
IF
AMP
BPF
XTAL BUFF
15 kHz
FI1401
D1813
Q1409
IC1401
Q1401
2nd TX LO signal 1st TX LO signal
From the 3rd
TX IF circuits To the filter
circuits
D1401
D1402
D1404
D1407D1410
64.455MHz 1st TX IF TX frequency
D1812
2ND TX IF CIRCUIT (MAIN-A UNIT)
The 2nd TX IF signal from the 3rd TX IF circuits is applied
to the 2nd TX IF mixer (D1812, D1813), to be mixed with
the 2nd TX LO signal, resulting in the 64.455 MHz 1st TX IF
signal.
The 1st TX IF signal is passed through the 1st TX IF filter
(FI1401), amplified by the 1st TX IF AMP (Q1409), and then
applied to the 1st TX IF circuits.
1ST TX IF CIRCUIT (MAIN-A UNIT)
The 1st TX IF signal from the 2nd TX IF circuits is applied
to the 1st TX IF mixer (IC1401), to be mixed with the 1st TX
LO signal, resulting in the TX signal (TX frequency itself).
The converted TX signal is applied to the filter circuits,
through the buffer (Q1401).
FILTER CIRCUIT (MAIN-A UNIT)
The TX signal from the 1st TX IF circuits is passed through
the one of BPFs, depending on the operating frequency, to
remove unwanted signals contained in the TX signal.
The filtered TX signal is amplified by the YGR AMP
(IC1101), and then applied to the PA-A UNIT.
TX AMPLIFIER CIRCUIT (PA-A UNIT)
The TX signal from the MAIN-A UNIT is applied to the RF
AMP (Q4002), through the LPF (L4002, C4008, C4014).
The amplified TX signal is sequentially amplified by the pre-
drive AMP (Q4003), drive AMP (Q6851), and power AMP
(Q4006, Q4007).
The amplified TX signal is applied to the PA-A UNIT.
LPF CIRCUIT (PA-A UNIT)
The amplified TX signal from the power AMP (Q4006,
Q4007) is passed through one of LPFs, depending on the
transmitting frequency, to remove harmonic components
contained in the TX signal.
The filtered TX signal is applied to the antenna, through the
TX/RX line SW (RL5001) and SWR detect circuit (D5001,
D5002).

4-4
• FREQUENCY SYNTHESIZER CIRCUIT
LO
AMP
LPFDDS1/2AMP AMP AMP
LO
AMP
X2 AMP
BPF
BPF
BUFF
BPF
DDS
LPF
LPF
HPF
LPF
BPFAMP
BPF
32.0MHz
3rd LO=419.0 kHz
2nd LO=64.0 MHz
1st LO=64.485-94.455 MHz
64 MHz
Q1410
X1601
IC1605
(TX/RX Freq.= 0.03-15 MHz)
(TX/RX Freq.= 15-30 MHz)
64.485-79.455MHz
0.03–15 MHz 15–30 MHz
79.455-94.455MHz
Q1601
IC1602
IC1606
IC1703
D1702 D1703
32.2425—47.2275 MHz
IC1604
Q1404-Q1407
IC1402
fc=94.455 MHz
REF OSC
32MHz
IC1705
IC1404
D1706
L1719, L1722, L1724,
L1726, L1728, L1730,
C1744, C1746, C1749,
C1750, C1752, C1754,
C1755, C1760, C1762,
C1763, C1767, C1768,
C1772, C1773, C1775,
C1778
D1707
D1704
D1704,D1706
Diode SW
to pass
Components
Operating
frequenct D1705
D1705,D1707
L1720, L1723, L1725,
L1727, L1729, L1731,
L1732, C1745, C1747,
C1751, C1753,
C1756–C1759 ,
C1761, C1764, C1765,
C1769, C1770, C1774,
C1776, C1779
D1813
D1812
256 MHz
X8
X2
IC1603 IC1601
4-3 FREQUENCY SYNTHESIZER CIRCUITS
The 3rd TX/RX LO signal (MAIN-A UNIT)
The 32 MHz reference frequency signal, which is gener-
ated by X1601, is amplified by the buffer (Q1601) and two
AMPs (IC1604 and IC1605), and then applied to the divider
(IC1603). The divided reference frequency signal is applied
to the DDS IC (IC1601).
Using the applied DDS master clock signal as the reference,
the DDS IC generates the 419 kHz 3rd RX/TX LO signal.
The generated 3rd RX/TX LO signal is passed through the
LPF (L1601, L1603, C1601, C1604, C1605, C1608), and
amplified by the AMP (IC1404), and then applied to the 1st
TX/RX IF mixer (IC1402).
The 2nd TX/RX LO signal (MAIN-A UNIT)
The 32 MHz reference frequency signal, which is gener-
ated by X1601, is amplified by the buffer (Q1601) and AMP
(IC1604), and then doubled by the doubler (L1617, L1620,
L1622–L1624, C1642, C1644, C1647, C1650, C1653,
C1655, C1658, C1659, C1661–C1664), resulting in the 64
MHz 2nd TX/RX LO signal.
The 2nd TX/RX LO signal is amplified by the LO AMP
(IC1602), and then applied to the 2nd TX/RX IF mixer
(D1812, D1813), through the LPF (L1602, L1604, C1602,
C1603, C1606, C1607, C1609).
The 1st TX/RX LO signal
The 32 MHz reference frequency signal, which is gener-
ated by X1601, is amplified by the buffer (Q1601) and
AMP (IC1604), and then applied to the BPF (L1608,
L1612–L1615, L1618, L1626, C1666, C1620, C1623,
C1625, C1629, C1631, C1634, C1636, C1638, C1640,
C1641, C1643, C1646, C1649, C1652, C1654), resulting in
the 256 MHz DDS master clock signal.
The clock signal is amplified by the AMP (IC1606), and then
applied to the DDS IC, through the HPF (L1627, L1628,
L1701, C1667, C1668, C1702, C1703).
Using the applied DDS master clock signal as the reference,
the DDS IC generates the 32.2425–47.2275 MHz signal.
The generated signal is passed through the LPF (L1704,
L1706, C1711, C1713, C1718, C1720, C1722, C1723), and
doubled by the doubler (D1702, D1703), resulting in the
64.485-94.455 MHz 1st TX/RX LO signal.
The 1st TX/RX LO signal is passed through the BPF
(L1709–L1711, C1729. C1731–C1734, C1736), amplified by
the AMP (IC1705), passed through another BPF (See the
table below for the detail), and then applied to the LO AMP
(Q1410).
The amplified 1st TX/RX LO signal applied to the 1st TX/RX
IF mixer (IC1401/Q1404–Q1407), through the LPF (L1419,
L1422, C1437, C1444, C1445, C1448).

4-5
Pin
No.
Line
Name Description I/O
2 LEDC LCD dimmer control. O
7 RESET CPU reset.
L=The CPU is reset. I
17 TXD L-bus communication line to the MAIN CPU. O
18 RXD L-bus communication line to the MAIN CPU. I
19 LRES LCD driver reset.
L=The driver is reset. I
27 RXD L-bus wakeup line.
L=Wakeup. I
28 IOK [ ] input.
L=Pushed. I
29 P3K []input.
L=Pushed. I
30 P2K []input.
L=Pushed. I
31 P1K []input.
L=Pushed. I
32 DNK [–] input.
L=Pushed. I
33 UPK [+] input.
L=Pushed. I
34 EMGK [ ] input.
L=Pushed. I
35 MENK [ ] input.
L=Pushed. I
36 CALK [ ] input.
L=Pushed. I
41 LCS LCD driver control.
L=Enabled. O
42–49 DB0–DB7 LCD driver control. (Parallel data bus) O
51 LWR LCD driver control.
L=Data write status. O
52 LA0 LCD driver control.
H=In the address select mode. O
55 LRD LCD driver control.
L=Data read status. O
56 FPWRS 8V power supply line control.
H=While the transceiver's power is ON. O
57 MGAIN MIC gain control.
H=The gain increases +20 dB. O
58 T5K [5 JKL] input.
L=Pushed. I
59 T6K [6 MNO] input.
L=Pushed. I
60 T7K [7 PRS/CLAR] input.
L=Pushed. I
61 T8K [8 TUV/CTALK] input.
L=Pushed. I
62 T1K [1 QZ] input.
L=Pushed. I
63 T2K [2 ABC] input.
L=Pushed. I
64 T3K [3 DEF/MODE] input.
L=Pushed. I
65 T4K [4 GHI] input.
L=Pushed. I
66 TLK []input.
L=Pushed. I
67 TRK []input.
L=Pushed. I
68 CHDK []input.
L=Pushed. I
69 CHUK []input.
L=Pushed. I
70 T9K [9 WXY/TUNER] input.
L=Pushed. I
71 T0K [0 _] input.
L=Pushed. I
72 MUTK [@?/MUTE] input.
L=Pushed. I
Pin
No.
Line
Name Description I/O
73 SCNK [# A/a /MNGR] input.
L=Pushed. I
75 TEMP LCD temperature sensing voltage. I
76 MICL MIC input level sensing voltage. I
Pin
No.
Line
Name Description I/O
2 BEEP Beep audio. O
3 TCOM Tuner Scan control signal to the automatic
antenna tuner. O
4 TSTART Motor lock contol signal to the automatic
antenna tuner. O
10 RESET CPU reset signal.
L=The CPU is reset. I
16 TXD L-bus wakeup signal from the FRONT CPU.
L=Wakeup. I
17 CWK CW/FSK keing input.
L=Key down. I
18 PTT PTT input.
L=Pushed. I
20 DRXD RX data from the DSP. I
21 DCLK Serial clock to the DSP. O
22 DTXD TX serial data to the DSP. O
23 HSK0 Hand shake signal to the DSP.
L=When the command is not granted. I
25 FULL ALE/SELCALL data full detect.
H=Data full. I
26 VSQL Voice squelch detection.
L=Voice detected. (Squelch open) I
27 GPRXD GPS data (4800 bps). I
29 EXTXD External data output. O
30 EXRXD External data input. I
32 BPST Beep status detection.
H=Detected. I
33 RXD Data to the front CPU. O
34 TXD Data from the front CPU. I
35 CK Serial clock to the DDS IC. O
36 DT Serial data to/from the DDS IC. I/O
42 RD SRAM data read control. O
44 WR SRAM data write control. O
46 CWST CW status detection.
L=While transmitting in the CW mode. I
47 TUMB
Band switching control.
H=When the operating frequency is
13.3 MHz and higher.
O
48 CS0 SRAM chip select control.
L=Enabled. O
52–70 A16–A0 SRAM control parallel bus. O
71 PWS Power supply line "14V" control.
H=During the transceiver's power is ON. O
73 DSKY Keying output. O
74 SEND TX mute.
H=Mute. O
75 MDA Serial data to the D/A converter, shift reg-
ister and electronic volume. O
76 MCK Serial clock to the D/A converter, shift reg-
ister and electronic volume. O
77 ECK EEPROM serial clock. O
78 ESIO EEPROM serial data. I/O
79–86 D7–D0 SRAM control parallel bus. I/O
87 RXS RX power supply line control.
H=While receiving. O
88 TXS TX power supply line control.
H=While transmitting. O
90 DCV External power source detect. I
91 TEMP TX power AMP temperature sensing volt-
age. I
92 KEYS External tuner key control. I
4-4 PORT ALLOCATIONS
• FRONT CPU (DISPLAY-A UNIT: IC6004)
• MAIN CPU (MAIN-A UNIT: IC1806)

4-6
Pin
No.
Line
Name Description I/O
93 REF Reflected wave sensing voltage. I
95 FOR Foward wave sensing voltage. I
98 STBSEL_D Binary to decimal converter control.
H=Enabled. O
99 STBSEL_C Binary to decimal converter control.
H=Enabled. O
100 STBSEL_B Binary to decimal converter control.
H=Enabled. O
R8
CTRL
T8
CTRL
+8
REG
+5
REG
+8
REG
+5
REG
+5
REG
MAIN-A UNIT
R8V
Q1803
H5V
IC1801
+8V
IC1806
CPU
MAIN
TXS
RXS
13.8V COMMON
FILTER
FUSE
(5A)
RELAY
CTRL
HV
14V
HV
14V
PA8V
IC4001
Q4004
T8V
(TX circuits)
(RX circuits)
HV
SRAM
IC1812
Q1804
IC6009
SW
IC6006
RESET
IC1808
Q6002,Q6003
IC6008
+5V
+3V
REG
IC6007
+3.3V
REG
+10V
IC6011
HVLED
DISPLAY-A UNIT
IC1002
REG
+3.3V
IC1001
M8V 3.3V
5V
8V
HV
HV
PA-A UNIT
D4002
D4001
Q1806,Q1807
D1810
BU CNTL
14V
+1.2V
IC8201
IC8203
+1.2
REG
DSP
3.3V/-8V
REG
IC8001
Q8001,Q8002
3.3V
M8V
14V
3.3V
DSP2-A UNIT
DSP1-A UNIT
4-4 PORT ALLOCATIONS (Continued)
• MAIN CPU (MAIN-A UNIT: IC1806)
4-5 VOLTAGE CIRCUITS
Voltage from the power supply is routed throughout the transceiver, through regulators and switches.

5-1
SECTION 5
.
ADJUSTMENT PROCEDURE
M GENERAL CONNECTION
5-1 PREPARATION
EQUIPMENT GRADE AND RANGE EQUIPMENT GRADE AND RANGE
Cloning software CS-F8100 CLONING SOFTWARE
(Revision 1.0 or later)
Standard signal
generator (SSG)
Frequency range: 0.1–50 MHz
Output level: –20 dBµ to 90 dBµ
(–127 to –17 dBm)
RF power meter
(50 terminated)
Measuring range: 0.1–300 W
Frequency range: 0.1–50 MHz
SWR: Less than 1.2 : 1
Frequency counter
Frequency range: 0.1–50 MHz
Frequency accuracy: ±1 ppm or better
Input level: Less than 1 mW
AC millivoltmeter Measuring range: 10 mV to 10 V Dummy load Input impedance: 50 
Capacity: More than 300 W
Audio generator
(AG)
Frequency range: 300–3000 Hz
Output level: 1–500 mV
External speaker SP-35L
Voltmeter Measuring range: 0.1–10 V
DC power supply Voltage: 13.8 V
Capacity: More than 40 A Ammeter Measuring range: 0.1–40 A
M REQUIRED EQUIPMENTS
To the antenna connector
DUMMY LOAD
(50 Ω/300 W)
RF POWER METER
(300 W/50 Ω)
AMMETER
(0.1–40 A)
Fuses
30 A
DC power supply
(13.8 V/40 A)
⊕−
Black
Red⊕Red
⊕
−
Black
−
−
Supplied DC cable
STANDARD SIGNAL GENERATOR
(0.1–50 MHz)
AC MILLIVOLT METER
(10 mV to 10 V)
EXT. SPEAKER
(2 W/8 Ω)
3.5(d) mm monoral plug
+–
+
–
NEVER TRANSMIT while an SSG is connected.
FREQUENCY COUNTER
(0.1–50 MHz)
(Loose Coupling)
USB
ACC
ANT
ATU
DC
SP
The tests described in Section 5 should be measured and adjusted the with above test equipment, or a radio
tester. The adjustments are described with the radio tester.