Intel MFSYS25V2 User manual

Intel®Compute Module MFS5520VI
Technical Product Specification
Intel order number: E64311-007
Revision 1.5
December, 2010
Enterprise Platforms and Services Division

Revision History Intel® Compute Module MFS5520VI TPS
Revision 1.5
Intel order number: E64311-007
ii
Revision History
Date Revision
Number
Modifications
February, 2009 1.0 Initial release.
June, 2009 1.1 Updated the document.
March, 2010 1.2 Updated the document.
April, 2010 1.3 Updated the document.
May, 2010 1.4 Removed CCC and CNCA.
December, 2010 1.5 Updated Video mode info and BMC memory size.
Disclaimers
Information in this document is provided in connection with Intel®products. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's
Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any
express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to
fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property
right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make
changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or
"undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or
incompatibilities arising from future changes to them.
The Intel®Compute Module MFS5520VI may contain design defects or errors known as errata which may cause the
product to deviate from published specifications. Current characterized errata are available on request.
Intel Corporation server baseboards support peripheral components and contain a number of high-density VLSI and
power delivery components that need adequate airflow to cool. Intel’s own chassis are designed and tested to meet
the intended thermal requirements of these components when the fully integrated system is used together. It is the
responsibility of the system integrator that chooses not to use Intel developed server building blocks to consult vendor
datasheets and operating parameters to determine the amount of air flow required for their specific application and
environmental conditions. Intel Corporation can not be held responsible if components fail or the compute module
does not operate correctly when used outside any of their published operating or non-operating limits.
Intel, Pentium, Itanium, and Xeon are trademarks or registered trademarks of Intel Corporation.
*Other brands and names may be claimed as the property of others.
Copyright © Intel Corporation 2010.

Intel® Compute Module MFS5520VI TPS Table of Contents
Revision 1.5 iii
Intel order number: E64311-007
Table of Contents
1. Introduction ..........................................................................................................................1
1.1 Chapter Outline........................................................................................................ 1
1.2 Intel®Compute Module Use Disclaimer................................................................... 1
2. Product Overview.................................................................................................................2
2.1 Intel®Compute Module MFS5520VI Feature Set .................................................... 2
2.2 Compute Module Layout.......................................................................................... 3
2.2.1 Connector and Component Locations ..................................................................... 3
2.2.2 External I/O Connector Locations............................................................................ 3
2.2.3 Compute Module Mechanical Drawings .................................................................. 5
3. Functional Architecture.......................................................................................................6
3.1 Intel®Xeon®processor ............................................................................................ 7
3.1.1 Processor Support ................................................................................................... 7
3.1.2 Mixed Processor Configuration................................................................................ 7
3.1.3 Turbo Mode ............................................................................................................. 9
3.1.4 Hyper-Threading...................................................................................................... 9
3.1.5 Intel®QuickPath Interconnect .................................................................................. 9
3.1.6 Unified Retention System Support......................................................................... 10
3.2 Memory Subsystem ............................................................................................... 11
3.2.1 Intel®QuickPath Memory Controller ...................................................................... 11
3.2.2 Publishing Compute Module Memory .................................................................... 11
3.2.3 Memory Map and Population Rules....................................................................... 12
3.2.4 Memory RAS ......................................................................................................... 13
3.2.5 Memory Upgrade Rules......................................................................................... 15
3.3 Intel®5520 Chipset IOH......................................................................................... 17
3.4 Intel®82801JR I/O Controller Hub (ICH10R)......................................................... 17
3.4.1 PCI Subsystem ...................................................................................................... 18
3.4.2 USB 2.0 Support.................................................................................................... 18
3.5 Integrated Baseboard Management Controller...................................................... 19
3.5.1 Floppy Disk Controller ........................................................................................... 21
3.5.2 Keyboard and Mouse Support ............................................................................... 21
3.5.3 Wake-up Control.................................................................................................... 21
3.6 Video Support ........................................................................................................ 21
3.6.1 Video Modes.......................................................................................................... 21
3.7 Network Interface Controller (NIC) ........................................................................ 22
3.7.1 Direct Cache Access (DCA) ..................................................................................22
3.8 Intel®Virtualization Technology for Directed I/O (Intel® VT-d)................................ 22
4. Connector/Header Locations and Pin-outs .....................................................................23
4.1 Board Connector Information................................................................................. 23

Table of Contents Intel® Compute Module MFS5520VI TPS
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4.2 Power Connectors ................................................................................................. 23
4.3 I/O Connector Pin-out Definition ............................................................................ 24
4.3.1 VGA Connector...................................................................................................... 24
4.3.2 I/O Mezzanine Card Connector ............................................................................. 24
4.3.3 Midplane Signal Connector.................................................................................... 28
4.3.4 Serial Port Connector ............................................................................................ 29
4.3.5 USB 2.0 Connectors .............................................................................................. 29
5. Jumper Block Settings ......................................................................................................31
5.1 Recovery Jumper Blocks ....................................................................................... 31
5.1.1 CMOS Clear and Password Clear Usage Procedure ............................................ 32
5.1.2 Integrated BMC Force Update Procedure ............................................................. 32
5.1.3 Integrated BMC Initialization.................................................................................. 33
6. Product Regulatory Requirements...................................................................................34
6.1 Product Regulatory Requirements......................................................................... 34
6.2 Product Regulatory Compliance and Safety Markings .......................................... 34
6.3 Product Environmental/Ecology Requirements ..................................................... 34
Appendix A: Integration and Usage Tips................................................................................35
Appendix B: Integrated BMC Sensor Tables..........................................................................36
Appendix C: POST Error Messages and Handling ................................................................42
Appendix D: Supported Intel®Modular Server System.........................................................46
Glossary.....................................................................................................................................47
Reference Documents..............................................................................................................50

Intel® Compute Module MFS5520VI TPS List of Figures
Revision 1.5 v
Intel order number: E64311-007
List of Figures
Figure 1. Component and Connector Location Diagram ..............................................................3
Figure 2. Intel®Compute Module MFS5520VI Front Panel Layout............................................... 4
Figure 3. Intel®Compute Module MFS5520VI – Hole and Component Positions ........................ 5
Figure 4. Intel®Compute Module MFS5520VI Functional Block Diagram .................................... 6
Figure 5. Unified Retention System and Unified Backplate Assembly........................................ 10
Figure 6. DIMM Nomenclature.................................................................................................... 12
Figure 7. DIMM Slot Order.......................................................................................................... 12
Figure 8. Integrated BMC Hardware ........................................................................................... 20
Figure 9. Recovery Jumper Blocks ............................................................................................. 31
Figure 10. Intel®Modular Server System MFSYS25 .................................................................. 46

List of Tables Intel® Compute Module MFS5520VI TPS
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List of Tables
Table 1. Intel compute module MFS5520VI Feature Set.............................................................. 2
Table 2. Mixed Processor Configurations ..................................................................................... 8
Table 3. Mirroring DIMM Population Rules Variance across Nodes........................................... 15
Table 4. Intel®Compute Module MFS5520VI PCI Bus Segment Characteristics....................... 18
Table 5. Video Modes ................................................................................................................. 21
Table 6. Board Connector Matrix ................................................................................................ 23
Table 7. Power Connector Pin-out (J1A1) .................................................................................. 23
Table 8. VGA Connector Pin-out (J6A1)..................................................................................... 24
Table 9. 120-pin I/O Mezzanine Card Connector Pin-out ........................................................... 25
Table 10. 120-pin I/O Mezzanine Card Connector Signal Definitions......................................... 26
Table 11. 40-pin I/O Mezzanine Card Connector Pin-out ........................................................... 28
Table 12. 96-pin Midplane Signal Connector Pin-out ................................................................. 28
Table 13. Internal 9-pin Serial Header Pin-out (J9J1)................................................................. 29
Table 14. External USB Connector Pin-out ................................................................................30
Table 15. Pin-out of Internal USB Connector for low-profile Solid State Drive (J9B7)................ 30
Table 16. Recovery Jumpers ......................................................................................................32
Table 17. MFS5520VI Sensors................................................................................................... 37
Table 18. POST Error Messages and Handling.......................................................................... 42

Intel® Compute Module MFS5520VI TPS List of Tables
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Intel® Compute Module MFS5520VI TPS Introduction
Revision 1.5 1
Intel order number: E64311-007
1. Introduction
This Technical Product Specification (TPS) provides board-specific information detailing the
features, functionality, and high-level architecture of the Intel®Compute Module MFS5520VI.
1.1 Chapter Outline
This document is divided into the following chapters:
•Chapter 1 – Introduction
•Chapter 2 – Product Overview
•Chapter 3 – Functional Architecture
•Chapter 4 – Connector/Header Locations and Pin-outs
•Chapter 5 – Jumper Block Settings
•Chapter 6 – Product Regulatory Requirements
•Appendix A – Integration and Usage Tips
•Appendix B – BMC Sensor Tables
•Appendix C – Post Error Messages and Handling
•Appendix D – Supported Intel®Modular Server System
•Glossary
•Reference Documents
1.2 Intel®Compute Module Use Disclaimer
Intel®Modular Server components require adequate airflow to cool. Intel ensures through its
own chassis development and testing that when these components are used together, the fully
integrated system will meet the intended thermal requirements. It is the responsibility of the
system integrator who chooses not to use Intel-developed server building blocks to consult
vendor datasheets and operating parameters to determine the amount of airflow required for
their specific application and environmental conditions. Intel Corporation cannot be held
responsible if components fail or the system does not operate correctly when used outside any
of their published operating or non-operating limits.

Product Overview Intel® Compute Module MFS5520VI TPS
Revision 1.5
Intel order number: E64311-007
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2. Product Overview
The Intel®Compute Module MFS5520VI is a monolithic printed circuit board with features that
were designed to support the high-density compute module market.
2.1 Intel®Compute Module MFS5520VI Feature Set
Table 1. Intel compute module MFS5520VI Feature Set
Feature Description
Processors Support for one or two Intel®Xeon®Processor 5500 series or two Intel®Xeon®
Processor 5600 series in FC-LGA 1366 Socket B package with up to 95 W Thermal
Design Power (TDP).
4.8 GT/s, 5.86 GT/s, and 6.4 GT/s Intel®QuickPath Interconnect (Intel®QPI)
Enterprise Voltage Regulator-Down (EVRD) 11.1
Memory Support for 1066/1333 MT/s ECC registered (RDIMM) or unbuffered (UDIMM)
DDR3 memory.
12 DIMMs total across 6 memory channels (3 channels per processor).
Note: Mixed memory is not tested or supported. Non-ECC memory is not tested and is
not supported in a server environment.
Chipset Intel®5520 Chipset IOH
Intel®82801JR I/O Controller Hub (ICH10R)
On-board
Connectors/Headers
External connections:
Four USB 2.0 ports
DB-15 Video connector
Internal connectors/headers:
One low-profile USB 2x5 pin header to support low-profile USB solid state drives
Intel®I/O Mezzanine connectors supporting Dual Gigabit NIC Intel®I/O Expansion
Module (Optional)
On-board Video On-board ServerEngines* LLC Pilot II Controller
Integrated 2D Video Controller
64 MB DDR2 Memory
On-board Hard Drive
Controller
LSI* 1064e SAS controller
LAN Two integrated 1000 Ethernet ports and two optional 1000 Ethernet ports, provided by
the Dual Gigabit NIC mezzanine module.

Intel® Compute Module MFS5520VI TPS Product Overview
Revision 1.5 3
Intel order number: E64311-007
2.2 Compute Module Layout
2.2.1 Connector and Component Locations
The following figure shows the board layout of the Intel®Compute Module MFS5520VI. Each
connector and major component is identified by a number or letter. A description of each
identified item is provided below the figure.
AF003077
J
Q
F
B
G
H
PON
L
M
A
C
E
D
I
K
M
A Intel®5520 Chipset I/O Hub J CPU 2 Socket
B CPU2 DIMM Slots K Power/Fault LEDs
C Mezzanine Card Connector 1 L Power Switch
D CPU 1 with Heatsink M Activity and ID LEDs
E Mezzanine Card Connector 2 N Video Connector
F Midplane Power Connector O USB Ports 2 and 3
G Midplane Signal Connector P USB1 Ports 0 and 1
H Midplane Guide Pin Receptacle Q CMOS Battery
I CPU 1 DIMM Slots
Figure 1. Component and Connector Location Diagram
2.2.2 External I/O Connector Locations
The following drawing shows the layout of the external I/O components for the Intel®Compute
Module MFS5520VI.