Linear Technology DC1500A Quick setup guide

1
dc1500af
DEMO MANUAL DC1500A
DESCRIPTION
LTC2393-16/LTC2392-16/
LTC2391-16: 16-Bit,1Msps/
0.5Msps/0.25Msps
Low Noise ADCs
The LTC
®
2393/LTC2392/LTC2391-16 are low noise high
speed ADCs with both parallel and serial outputs that
can operate from a single 5V supply. The following text
refers to the LTC2393-16 but applies to all three parts.
The only difference being the maximum sample rates. The
LTC2393-16 supports alarge ±4.096V fullydifferential input
range. This makes it ideal for high performance applica-
tions that requiremaximum dynamic range. Demonstration
circuit 1500A provides the user a means of evaluating the L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
performance of the LTC2393-16 in both parallel and serial
modes and is intended to demonstrate recommended
grounding, component placement and selection, routing
and bypassing for this ADC. Also several suggested driver
circuits for the analog inputs will be presented.
Design files for this circuit board are available at www.
linear.com/demo.
Table 1
ASSEMBLY VERSION PART NUMBER MAX CONVERSION RATE
MAX PARALLEL CLK IN
FREQUENCY
MAX SERIAL CLK IN
FREQUENCY
DC1500A-A LTC2393CLX-16 1Msps 1MHz 80MHz
DC1500A-B LTC2392CLX-16 0.5Msps 500kHz 40MHz
DC1500A-C LTC2391CLX-16 0.25Msps 250kHz 20MHz
Figure 1. DC1500A Connection Diagram
CLK_IN
1MHz MAX
(80MHz FOR SERIAL)
3.3VP-P MAX
TO
DC718
–9V
dc1500a F01
GND 9V
AIN–
0V TO 4.096V MAX
(NOT NEEDED UNLESS
U2 IS DISABLED)
AIN+
0V TO 4.096V MAX

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dc1500af
DEMO MANUAL DC1500A
QUICK START PROCEDURE
Check to make sure that all switches and jumpers are
set as shown in the connection diagram of Figure 1. The
default connections configure the ADC for parallel op-
eration with the output data in offset binary format. The
analog input is AC-coupled and the internal reference of
the ADC is used.
Connect DC1500A to a DC718B/C USB High Speed Data
Collection Board using connector J1. Connect DC718B/C
to a host PC with a standard USB A/B cable. Apply ±9V
to the indicated terminals. Apply a low jitter signal source
to J3 (AIN+). The default setup uses a single ended to dif-
ferential converter so that it is only necessary to apply an
input signal to J3. Connect a low jitter 1MHz 3.3VP-P sine
wave or square wave to connector J2 (CLK). Note that J2
has a 50Ω termination resistor to ground.
Run the QuickEval-II software (Pscope.exe version K66
or later) supplied with DC718B/C or download it from
www.linear.com.
Complete software documentation is available from the
Help menu. Updates can be downloaded from the Tools
menu. Check for updates periodically as new features
may be added.
The Pscope software should recognize DC1500A and
configure itself automatically.
Click the Collect button (see Figure 6) to begin acquiring
data. The Collect button then changes to Pause, which
can be clicked to stop data acquisition.
DC Power
DC1500A requires ±9VDC at approximately 100mA. Most
of the supply current is consumed by the CPLD, op amps,
regulators and discreet logic on the board. The ±9VDC
input voltage powers the ADC through LT1763 regulators
which provide protection against accidental reverse bias.
Additional regulators provide power for the CPLD and op
amps. See Figure 1 for connection details.
Clock Source
You must provide a low jitter 3.3VP-P sine or square wave
to J2. The clock input is AC-coupled so the DC level of the
clock signal is not important. A generator like the HP8644
or similar is recommended.Even a good generatorcan start
to produce noticeable jitter at low frequencies. Therefore
it is recommended for lower sample rates to divide down
a higher frequency clock to the desired sample rate. One
way to do this is by placing the ADC in the serial mode.
This can be accomplished by setting the SER/PARL posi-
tion of SW1 to the high position. In the serial mode the
ratio of clock frequency to conversion rate is 80:1. In
the parallel mode there is a 1:1 ratio of clock frequency
to conversion rate. If the clock input is to be driven with
logic, it is recommended that the 50Ω terminator (R17)
be removed. Slow rising edges may compromise SNR of
the converter in the presence of high amplitude higher
frequency input signals.
Data Output
Parallel data output from this board (0V to 3.3V default),
if not connected to DC718, can be acquired by a logic
analyzer, and subsequently imported into a spreadsheet, or
mathematical package depending on what form of digital
signal processing is desired. Alternatively, the data can be
fed directly into an application circuit. Use pin 3 of J1 to
latch the data. The data can be latched using either edge
of this signal. The data output signal levels at J1 can also
be reduced to 0V to 2.5V if the application circuit cannot
tolerate the higher voltage. Thisis accomplished by moving
JP7 to the 2.5V position.
Reference
JP4, JP5 and JP6 allow you to select an on chip refer-
ence or an external LT1790A-4.096 as the reference. The
worst case initial accuracy and drift specifications of the
external reference are better than the on chip reference.
To use the internal reference set JP6 to FLT, JP4 to ADC
and JP5 to REFIN. To use the LT1790A-4.096 set JP5 and
JP6 to GND and JP4 to EXT.
SETUP

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dc1500af
DEMO MANUAL DC1500A
SETUP
Figure 2. Single-Ended to Differential Driver
R2
249
AIN
0V TO 4.096V
R3
249
R51
49.9
R52
49.9
C2
0.002µF
NPO
C53
10µF
LTC2393-16
dc1500a F02
–
+
–
+
LT6350
VCM
Analog Input
The default driver for the analog inputs of the LTC2393-16
on DC1500A is shown in Figure 2. This circuit converts a
single-ended 0V to 4.096V input signal applied at AIN into
a differential signal with a swing of ±4.096V between the
+IN and –IN inputs of the ADC. In addition this circuit band
limits the input frequenciesto approximately 100kHz which
is the useful linear bandwidth of the LTC2393-16.
Alternatively, if your application circuit produces a dif-
ferential signal which can drive the ADC but you need to
level shift the input signal, the circuits of Figure 3 and
Figure 4 can be used. The circuit of Figure 3 AC-couples
the input signal and is usable down to about 10kHz. The
lower frequency limit can be extended by increasing C37
and C51. The circuit of Figure 3 can be implemented on
DC1500A by putting JP1 and JP3 in the AC position and
moving R2 and R3 to the R50 and R53 positions. At this
point it will be necessary to drive both AIN+and AIN–. One
of these RC pairs can be attached to the input of the circuit
in Figure 2. This allows a single-ended input signal to be
level shifted. This is the default condition for DC1500A.
One of the most asked for ADC driver circuits is one that
allows the input voltage to go below ground with a single
supply ADC. Figure 4’s input driver allows the input volt-
age range to go below ground. It DC-couples and level
shifts the analog input at the expense of attenuating the
input level by a factor of 2. The circuit of Figure 4 can be
implemented on DC1500A by setting VCM to External and
biasing the external pin to 4.096V. Then replace R1 and
R6 with 1k, put JP1 and JP3 in the DC position and move
R2 and R3 to the R50 and R53 positions.
Data Collection
For SINAD, THD or SNR testing a low noise, low distortion
generatorsuchastheB&KType 1051 or Stanford Research
DS360 should be used. A low jitter RF oscillator such as
the HP8644 is used as the clock source.
This demo board is tested in house by attempting to
duplicate the FFT plot shown on the front page of the
LTC2393-16 data sheet. This involves using a 1MHz clock
source, along with a sinusoidal generator at a frequency
of 20kHz. The input signal level is approximately –1dBfs.
The input is filtered with a 20kHz single pole RC filter
shown in Figure 5. The FFT shown in the data sheet is a
16384-point FFT. A typical FFT obtained with DC1500A is
shown in Figure 6. Note that to calculate the real SNR, the
signal level (F1 amplitude = –1.117dB) has to be added
back to the SNR that PScope displays. With the example
shown in Figure 6, this means that the actual SNR would
be 94.237dB instead of the 93.12dB that PScope displays.
Taking the RMS sum of the recalculated SNR and the THD
yields a SINAD of 93.68 dB which is fairly close to the
typical value for this ADC.
There are a number of scenarios that can produce
misleading results when evaluating an ADC. One that is
common is feeding the converter with a frequency, that
is a sub-multiple of the sample rate, and which will only
exercise a small subset of the possible output codes. The
proper method is to pick an M/N frequency for the input
sine wave frequency. N is the number of samples in the
FFT. M is a prime number between one and N/2. Multiply
M/N by the sample rate to obtain the input sine wave
frequency. Another scenario that can yield poor results
is if you do not have a signal generator capable of ppm
levels of frequency accuracy or if it cannot be slaved to the
clock frequency. You can use an FFT with windowing to
reduce the “leakage” or spreading of the fundamental, to
get a close approximation of the ADC performance. If an
amplifier or clock source with poor phase noise is used,
the windowing will not improve the SNR.

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dc1500af
DEMO MANUAL DC1500A
SETUP
Layout
As with any high performance ADC, this part is sensitive
to layout. The area immediately surrounding the ADC on
DC1500A should be used as a guideline for placement,
and routing of the various components associated with the
ADC. Here are some things to remember when laying out
a board for the LTC2393-16. A ground plane is necessary
to obtain maximum performance. Keep bypass capaci-
tors as close to supply pins as possible. Use individual
low impedance returns for all bypass capacitors. Use of a
symmetrical layout around the analog inputs will minimize
the effects of parasitic elements. Shield analog input traces
with ground to minimize coupling from other traces. Keep
traces as short as possible.
R50
249
AIN+
0V TO 4.096V
AIN–
0V TO 4.096V
VCM
(PIN 36)
VCM
(PIN 36)
+IN
(PIN 43)
–IN
(PIN 42)
R53
249
R51
49.9
R52
49.9
C2
2200pF
NPO
C37
10µF
C51
10µF
R37
1k
dc1500a F03
R30
1k
Figure 3. AC-Coupled Differential Driver
Component Selection
When driving a low noise, low distortion ADC such as
the LTC2393-16, component selection is important so
as to not degrade performance. Resistors should have
low values to minimize noise and distortion. Metal film
resistors are recommended to reduce distortion caused
by self heating. Because of their low voltage coefficients,
which can reduce distortion NPO or silver mica capacitors
should be used. Any buffer used to drive the LTC2393-16
should have low distortion, low noise and a fast settling
time such as the LT6350.
R50
249
AIN+
–4.096V
TO
4.096V
AIN–
–4.096V
TO
4.096V
4.096V
4.096V
+IN
(PIN 43)
–IN
(PIN 42)
R53
249
R1
1k
R6
1k
R51
49.9
R52
49.9
C2
2200pF
NPO
R37
1k
dc1500a F04
R30
1k
Figure 4. DC-Coupled Differential Driver
Figure 5. 20kHz RC Filter
0.033µF
TO J3
FROM SINE
GENERATOR
dc1500a F05
249

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dc1500af
DEMO MANUAL DC1500A
SETUP
MISCELLANEOUS DIP SWITCHES AND JUMPERS
Figure 6. Pscope Screenshot
Definitions
JP2: VCM sets the DC bias for AIN+and AIN–when the
inputs are AC-coupled. INT is the default position.
SW1:
SER_PARL: Selects serial or parallel operation. Default
position is parallel. In parallel mode fS= fCLK. In serial
mode fS= fCLK/80.
OB/2CL:Selects offset binaryor two’scomplement data for-
mat for ADC output word. The default is offset binary.
CSL: This pin must be kept low for normal operation.
RDL: This pin must be kept low for normal operation.

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dc1500af
DEMO MANUAL DC1500A
PARTS LIST
ITEM QUANTITY REFERENCE DESIGNATOR DESCRIPTION MANUFACTURERS PART NUMBER
1 0 C1, C9, C39, C52, C54, C55, C56 Capacitor, 0603 OPT
2 1 C2 Capacitor, NP0, 2200pF, 25V, 5% 1206 AVX, 12063A222JAT2A
3 9 C10, C18, C20, C22, C28, C30, C37,
C51, C53
Capacitor, X5R, 10F, 6.3V, 20% 0603 Taiyo Yuden, JMK107BJ106MA (2rls, PbF)
4 13 C11, C27, C29, C31, C32, C34, C35,
C38, C50, C57, C59, C60, C63
Capacitor, X7R, 0.1F, 25V, 10% 0603 AVX, 06033C104KAT2A
5 11 C12, C16, C23, C24, C25, C33, C36,
C41, C58, C61, C62
Capacitor, X7R, 1F, 16V, 10% 0603 AVX, 0603YC105KAT2A
6 2 C13, C14 Capacitor, X5R, 10F, 10V, 20% 0805 Taiyo Yuden, LMK212BJ106MG
7 4 C15, C17, C19, C21 Capacitor, X7R, 0.01F, 50V, 10% 0603 AVX, 06035C103KAT2A
8 1 C26 Capacitor, X5R, 47F, 16V, 20% 1210 Taiyo Yuden, EMK325BJ476MM
9 1 C40 Capacitor, X5R, 4.7F, 4V, 20% 0402 Taiyo Yuden, AMK105BJ475MV-F
10 8 C42, C43, C44, C45, C46, C47, C48,
C49
Capacitor, X5R, 0.1F, 10V, 10% 0402 AVX, 0402ZD104KAT2A
11 9 E1, E2, E3, E4, E5, E6, E7, E8, E9 Test Point, Turret, .064" Mill-Max, 2308-2-00-80-00-00-07-0
12 6 JP1, JP2, JP3, JP4, JP5, JP6 JMP, 1 ×3, 0.1" Samtec, TSW-103-07-L-S
13 6 Shunts On JP1 to JP6 Pins 1 and 2 Shunt, 0.1" Center Samtec, SNT-100-BK-G
14 1 JP7 JMP, 1 ×3, 0.079CC Samtec, TMM-103-02-L-S
15 1 Shunt On JP7 Pins 1 and 2 Shunt, 0.079" Center Samtec, 2SN-BK-G
16 1 JTAG Header, 2 ×5, 0.1" Samtec, TSW-105-07-L-D
17 1 J1 Header, 0.1 ×0.1 CNTRS, 40 Pin Samtec, TSW-120-07-L-S
18 3 J2, J3, J4 Connection, BNC, 5 Pins Connex, 112404
19 3 R1, R4, R6 Resistor, Chip, 0, 1/10W, 0603 Vishay, CRCW06030000Z0EA
20 2 R2, R3 Resistor, Chip, 249, 1/10W, 1% 0603 Vishay, CRCW0603249RFKEA
21 1 R7 Resistor, Chip, 499, 1/10W, 1% 0603 Vishay, CRCW0603499RFKEA
22 3 R8, R9, R10 Resistor, Chip, 4.99k, 1/10W, 1% 0603 Vishay, CRCW06034K99FKEA
23 9 R11, R12, R14, R16, R18, R19,
R28, R30, R37
Resistor, Chip, 1k, 1/10W, 5% 0603 Vishay, CRCW06031K00JNEA
24 2 R13, R15 Resistor, Chip, 3.92k, 1/10W, 1% 0603 Vishay, CRCW06033K92FKEA
25 1 R17 Resistor, Chip, 49.9, 1/4W, 1% 1206 Vishay, CRCW120649R9FKEA
26 3 R20, R22, R49 Resistor, Chip, 33, 1/10W, 5% 0603 Vishay, CRCW060333R0JNEA
27 1 R24 Resistor, Chip, 1, 1/10W, 5% 0603 Vishay, CRCW06031R00JNEA
28 1 R25 Resistor, Chip, 1.69k, 1/10W, 1% 0603 Vishay, CRCW06031K69FKEA
29 1 R26 Resistor, Chip, 1.54k, 1/10W, 1% 0603 Vishay, CRCW06031K54FKEA
30 1 R27 Resistor, Chip, 2.80k, 1/10W, 1% 0603 Vishay, CRCW06032K80FKEA
31 0 R29, R36, R38, R50, R53, R55 Resistor, Chip, 0603 OPT
32 4 R31, R32, R33, R34 Resistor, Chip, 1k, 1/16W, 5% 0402 Vishay, CRCW04021K00JNED
33 5 R35, R40, R41, R42, R43 Resistor, Chip, 10k, 1/16W, 5% 0402 Vishay, CRCW040210K0JNED
34 4 R45, R46, R47, R48 Resistor, Chip, 300, 1/16W, 5% 0402 Vishay, CRCW0402300RJNED
35 2 R51, R52 Resistor, Chip, 49.9, 1/16W, 1% 0402 Vishay, CRCW040249R9FKED
36 1 R54 Resistor, Chip, 10k, 1/10W, 5% 0603 Vishay, CRCW060310K0JNEA
LTC23xxCLX Family, DC1500A-1 General BOM

7
dc1500af
DEMO MANUAL DC1500A
PARTS LIST
ITEM QUANTITY REFERENCE DESIGNATOR DESCRIPTION MANUFACTURERS PART NUMBER
37 1 SW1 Switch, 219-4MST CTS Electronic Components, 219-4MST
38 1 U2 IC., LT6350CMS8, MS8 Linear Tech., LT6350CMS8
39 1 U4 IC., 24LC025, TSSOP-8 Microchip, 24LC025-T/ST
40 1 U5 IC., LT1790ACS6-4.096, SOT23-6 Linear Tech., LT1790ACS6-4.096#PBF
41 1 U6 IC., LT1763CS8-1.8, SO8 Linear Tech., LT1763CS8-1.8#PBF
42 2 U7, U9 IC., LT1763CS8, SO8 Linear Tech., LT1763CS8#PBF
43 1 U8 IC., LT1763CS8-5, SO8 Linear Tech., LT1763CS8-5#PBF
44 1 U10 IC., LT1964ES5-SD, SOT23-5 Linear Tech., LT1964ES5-SD#PBF
45 1 U12 IC., NL17SZ74, US8 On Semi., NL17SZ74USG
46 1 U13 IC., NC7ST04P5X, SC70-5t Fairchild, NC7ST04P5X
47 1 U14 IC., EPM240GT100C5N, TQFP100 Altera Corp., EPM240GT100C5N
48 1 U15 IC., NC7SZ04P5X, SC70-5 Fairchild, NC7SZ04P5X
49 1 U16 IC., NC7SVU04P5X, SC70-5 Fairchild, NC7SVU04P5X
50 4 Stand-Off at 4 Corners Stand-Off, Nylon 0.25" Keystone, 8831(SNAP ON)
51 1 Stencil for Top Side Only DC1500A-1
LTC2393CLX Family, Demo Circuit 1500A-A
ITEM QUANTITY REFERENCE DESIGNATOR DESCRIPTION MANUFACTURERS PART NUMBER
1 1 DC1500A-1 General BOM
2 1 U1 IC., LTC2393CLX-16, LQFP48-7X7 Linear Tech., LTC2393CLX-16#PBF
LTC2392CLX-16, Demo Circuit 1500A-B
ITEM QUANTITY REFERENCE DESIGNATOR DESCRIPTION MANUFACTURERS PART NUMBER
1 1 DC1500A-1 General BOM
2 1 U1 IC., LTC2392CLX-16, LQFP48-7X7 Linear Tech., LTC2392CLX-16#PBF
LTC2391CLX-16, Demo Circuit 1500A-C
ITEM QUANTITY REFERENCE DESIGNATOR DESCRIPTION MANUFACTURERS PART NUMBER
1 1 DC1500A-1 General BOM
2 1 U1 IC., LTC2391CLX-16, LQFP48-7X7 Linear Tech., LTC2391CLX-16#PBF

8
dc1500af
DEMO MANUAL DC1500A
SCHEMATIC DIAGRAM
5 5
4 4
3 3
2 2
1 1
D D C C B B A A
OB/2CL
80MHz MAX
CLK
3.3VPP
AIN+
0V - 4.096V
AIN-
0V - 4.096V
SER_PARL
VCM
EXT INT
REFSNS
GND
REFIN
EXT ADC
REFOUT
REFIN GND
DC
AC
+COUPLING
EXT_VCM
CSL RDL
HIGHLOW
FLT
1. ALL RESISTORS ARE IN OHMS, 0603. ALL CAPACITORS ARE IN MICROFARADS, 0603 NOTES: UNLESS OTHERWISE SPECIFIED
DC
AC
-COUPLING
YES YES
-AIN -AIN
-B -C
LTC2392CLX-16 LTC2391CLX-16
0.5
0.25
16 16
Msps
1
J2 SHUNT
FULLY DIFFERENTIAL
YES -AIN-A
ASSY
*
U1
LTC2393CLX-16
BITS
16
VREF
+3.3V
+3.3V
+3.3V
+3.3V
+5V
V+
V-
V-
V+
+5V
+3.3V
BUSY D17 D16 D15 D14 D13/SCLK D12/SDOUT D11/SDIN D10 D9 D7 D6 D5 D4 D3 D2 BYTESWAP_D1/A1 GND_D0/A0
CLK
CNVSTL
VCM_BIAS
VCM_BIAS
SER_PARL 16_18L
D8
CNVST_33
DB16 DB17
CLKOUT
DB5 DB6 DB7 DB8 DB9
DB10 DB11 DB12 DB13 DB14 DB15
DB0 DB1
DB2 DB3 DB4
VCM
OB2C
SER_PARL_MODE0
GND_MODE1
VCM
REVISION HISTORY DESCRIPTION DATEAPPROVEDECO REV
GUY H.PRODUCTION
103-24-10
REVISION HISTORY DESCRIPTION DATEAPPROVEDECO REV
GUY H.PRODUCTION
103-24-10
REVISION HISTORY DESCRIPTION DATEAPPROVEDECO REV
GUY H.PRODUCTION
103-24-10
SIZE DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
TECHNOLOGY Fax: [phone]
Milpitas, CA 95035 Phone: [phone] McCarthy Blvd. LTC Confidential-For Customer Use Only
CUSTOMER NOTICE
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SCHEMATIC
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
SCALE = NONE
www.linear.com
2
DEMO CIRCUIT 1500A
Wednesday, March 24, 2010 1
1
KT
GUY H.
LOW NOISE HIGH SPEED SAR ADC FAMILY
LTC23XXCLX FAMILY
B
SIZE DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
TECHNOLOGY Fax: [phone]
Milpitas, CA 95035 Phone: [phone] McCarthy Blvd. LTC Confidential-For Customer Use Only
CUSTOMER NOTICE
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SCHEMATIC
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
SCALE = NONE
www.linear.com
2
DEMO CIRCUIT 1500A
Wednesday, March 24, 2010 1
1
KT
GUY H.
LOW NOISE HIGH SPEED SAR ADC FAMILY
LTC23XXCLX FAMILY
B
SIZE DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
TECHNOLOGY Fax: [phone]
Milpitas, CA 95035 Phone: [phone] McCarthy Blvd. LTC Confidential-For Customer Use Only
CUSTOMER NOTICE
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SCHEMATIC
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
SCALE = NONE
www.linear.com
2
DEMO CIRCUIT 1500A
Wednesday, March 24, 2010 1
1
KT
GUY H.
LOW NOISE HIGH SPEED SAR ADC FAMILY
LTC23XXCLX FAMILY
B
C2
2200pF
NP0
1206
C2
2200pF
NP0
1206
JP3JP3
1 3 2
R11
1k
R11
1k
C31 0.1uF C31 0.1uF
C52 OPT C52 OPT
R37 1k R37 1k
R24 1.0 R24 1.0
U15 NC7SZ04P5X U15 NC7SZ04P5X
4
53
2
J2J2
C38 0.1uF C38 0.1uF
10k, 0402 X 4 PLCS10k, 0402 X 4 PLCS
R10 4.99k R10 4.99k
R1
0
R1
0
C53
10uF
6.3V C53
10uF
6.3V
R3 249 1% R3 249 1%
R6
0
R6
0
C40 4.7uF 4V 0402 C40 4.7uF 4V 0402
C1 OPT C1 OPT
R45 - R48R45 - R48
JP4JP4
1
3
2
U1B
*
U1B
*
OGND
17
GND
1
GND
20
GND
35
GND
41
GND
44
AVP/AVL
47
AVP
46
AVP
45
AVP
40
AVP
2
DVP
19
DVP/DVL
3
OVP
18
GND
48
R38 OPT R38 OPT
R54 10k R54 10k
R12
1k
R12
1k
C27 0.1uF C27 0.1uF
C59 0.1uF C59 0.1uF
J1
HD2X20-100SMT-TB
J1
HD2X20-100SMT-TB
7
12
21
3 5 11 9
6 4
10
8
13 15 14
16
17 19 21 23 25 27 29 31 33 35 37 39
18 20 22 24 26 28 30 32 34 36 38 40
JP1JP1
1 3 2
C33 1uF C33 1uF
U4 24LC025-I /ST U4 24LC025-I /ST
SDA
5
VCC
8
A0
1
A1
2
A2
3
VSS
4
WP
7
SCL
6
R55 OPT R55 OPT
+
-
+
-
U2
LT6350CMS8
+
-
+
-
U2
LT6350CMS8
OUT2
5
8
+IN1
1
-IN1
2
+IN2
3
V+
4
OUT1
7
SHDN
6
V-
U12
NL17SZ74
U12
NL17SZ74
CP
1
CLR
6
PR
7
D
2
Q
3
Q
5
VCC
8
GND
4
JP6JP6
1
3
2
C56 OPT C56 OPT
U5
LT1790ACS6-4.096
U5
LT1790ACS6-4.096
VIN
4
NC
5
GND
1
GND
2
NC
3
VOUT
6
C37
10uF
6.3V
C37
10uF
6.3V
C60 0.1uF C60 0.1uF
R19
1K
R19
1K
C50 0.1uF C50 0.1uF
E1E1
C35 0.1uF C35 0.1uF
U16
NC7SVU04P5X
U16
NC7SVU04P5X
4
53
2
R18
1K
R18
1K
C32 0.1uF C32 0.1uF
C51
10uF
6.3V C51
10uF
6.3V
JP5JP5
1
3
2
C10 10uF 6.3V C10 10uF 6.3V
C28 10uF 6.3V C28 10uF 6.3V
C29 0.1uF C29 0.1uF
C36 1uF C36 1uF
R52 0402 49.9 R52 0402 49.9
U13
NC7ST04P5X
U13
NC7ST04P5X
4
53
2
C11 0.1uF C11 0.1uF
C9 OPT C9 OPT
R36 OPT R36 OPT
R50 OPT R50 OPT
R8 4.99k R8 4.99k
300, 0402 X 4 PLCS300, 0402 X 4 PLCS
R4 0 R4 0
C55 OPT C55 OPT
R51 0402 49.9 R51 0402 49.9
C54 OPT C54 OPT
R9 4.99k R9 4.99k
C34 0.1uF C34 0.1uF
C58 1uF C58 1uF
C63 0.1uF C63 0.1uF
R49 33 R49 33
R30 1k R30 1k
C62 1uF C62 1uF
J3J3
C41 1uF C41 1uF
C39 18pF C39 18pF
J4J4
ON
1234
SW1
219-4MST
ON
1234
SW1
219-4MST
1 2
8 7
3
5 6
4
C61 1uF C61 1uF
R29 OPT R29 OPT
R2
249
1% R2
249
1%
U1A
*
U1A
*
SER_PARL_MODE0
4
GND_MODE1
5
OB/2CL
6
D0/A0
7
D1/A1
8
D2
9
D3
10
D4
11
D5
12
D6
13
D7
14
D8
15
D9
16
D10
21
D11/SDIN
22
D12/SDOUT
23
D13/SCLK
24
D14
25
D15
26
D16
27
D17
28
BUSY
29
RDL
30
CSL
31
RESET
32
PD
33
CNVSTL
34
REFOUT
37
REFIN
38
REFSENSE
39
-IN
42
+IN
43
VCM
36
R28 1k R28 1k
R53 OPT R53 OPT
R40 - R43R40 - R43
C57 0.1uF C57 0.1uF
JP2JP2
1 3 2
R17 49.9 1206 R17 49.9 1206
C30 10uF 6.3V C30 10uF 6.3V
R7 499 R7 499
R22
33
R22
33
R20
33
R20
33

9
dc1500af
DEMO MANUAL DC1500A
SCHEMATIC DIAGRAM
5 5
4 4
3 3
2 2
1 1
D D C C B B A A
-9V/-10VIN V-
OPAMP OPAMP
VCCINT VCCIO ADC_LOGIC
+9V/+10VIN +1.8V
VCCIO
+3.3V +2.5V
+3.3V
+5V
GND
CNTRL
POWER
V+
-9V_IN V-
+3.3V +1.8V
+9V_IN
+3.3V
+1.8V +3.3V
+5V
V+
D14 D9 D13/SCLK D15 D3 D4 D7 D8 D16 D6 D2 BUSY D11/SDIN D17 D10 D5 D12/SDOUT BYTESWAP_D1/A1 GND_D0/A0
SER_PARL_MODE0 OB2C GND_MODE1
SER_PARL 16_18L
DB0
DB8
DB14
DB1
DB10 DB6
DB13 DB12
DB5 DB7
DB11
CLKOUT
DB15
DB4
DB2
DB9 DB3 CLK
DEV_OE
DEV_CLRN
CNVST_33
DB16 DB17
SIZE DATE:
IC NO.
REV
SHEET OF
TITLE:
CONTRACT NO.
APPROVALS
PCB DES.
ENG.
TECHNOLOGY Fax: [phone]
Milpitas, CA 95035 Phone: [phone] McCarthy Blvd. LTC Confidential-For Customer Use Only
CUSTOMER NOTICE
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SCHEMATIC
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
2
DEMO CIRCUIT 1500A
Tuesday, December 01, 2009 2
1
K. TRAN
G. HOOVER
LOW NOISE HIGH SPEED SAR ADC FAMILY
LTC23XXCLX FAMILY
B
SCALE: NONE
SIZE DATE:
IC NO.
REV
SHEET OF
TITLE:
CONTRACT NO.
APPROVALS
PCB DES.
ENG.
TECHNOLOGY Fax: [phone]
Milpitas, CA 95035 Phone: [phone] McCarthy Blvd. LTC Confidential-For Customer Use Only
CUSTOMER NOTICE
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SCHEMATIC
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
2
DEMO CIRCUIT 1500A
Tuesday, December 01, 2009 2
1
K. TRAN
G. HOOVER
LOW NOISE HIGH SPEED SAR ADC FAMILY
LTC23XXCLX FAMILY
B
SCALE: NONE
SIZE DATE:
IC NO.
REV
SHEET OF
TITLE:
CONTRACT NO.
APPROVALS
PCB DES.
ENG.
TECHNOLOGY Fax: [phone]
Milpitas, CA 95035 Phone: [phone] McCarthy Blvd. LTC Confidential-For Customer Use Only
CUSTOMER NOTICE
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SCHEMATIC
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
2
DEMO CIRCUIT 1500A
Tuesday, December 01, 2009 2
1
K. TRAN
G. HOOVER
LOW NOISE HIGH SPEED SAR ADC FAMILY
LTC23XXCLX FAMILY
B
SCALE: NONE
REVISION HISTORY DESCRIPTION DATEAPPROVEDECO REV
G. HOOVER1ST PROTOTYPE
112-01-09
REVISION HISTORY DESCRIPTION DATEAPPROVEDECO REV
G. HOOVER1ST PROTOTYPE
112-01-09
REVISION HISTORY DESCRIPTION DATEAPPROVEDECO REV
G. HOOVER1ST PROTOTYPE
112-01-09
E7E7
U8
LT1763CS8-5
U8
LT1763CS8-5
OUT
1
SEN
2
GND
3
BYP
4
SHDN
5
GND
6
GND
7
IN
8
E3E3 E9E9
1k, 0402 X 3 PLCS1k, 0402 X 3 PLCS
C21 0.01uF C21 0.01uF
R35 0402 10k R35 0402 10k
U10 LT1964ES5-SD U10 LT1964ES5-SD
GND
1
ADJ
4
SHDN
3
IN
2
OUT
5
E6E6
U14A EPM240T U14A EPM240T
IO1
1
IO2
2
IO3
3
IO4
4
IO5
5
IO6
6
IO7
7
IO8
8
IO15
15
IO16
16
IO17
17
IO18
18
IO19
19
IO20
20
IO21
21
D2D2
U14D
EPM240T
U14D
EPM240T
IO76
76
IO77
77
IO78
78
IO81
81
IO82
82
IO83
83
IO84
84
IO85
85
IO86
86
IO87
87
IO88
88
IO89
89
IO90
90
IO91
91
IO92
92
IO95
95
IO96
96
IO97
97
IO98
98
IO99
99
IO100
100
D11D11 D8D8 D3D3
E4E4
C24 1uF 16V C24 1uF 16V
C17 0.01uF C17 0.01uF
D5D5
C12 1uF 16V C12 1uF 16V
U14E
EPM240T
U14E
EPM240T
GCLK0
12
GCLK1
14
GCLK2
62
GCLK3
64
DEV_OE
43
DEV_CLRN
44
TMS
22
TDI
23
TCK
24
TDO
25
C18 10uF 6.3V C18 10uF 6.3V
R15 3.92k R15 3.92k
U14B
EPM240T
U14B
EPM240T
IO26
26
IO27
27
IO28
28
IO29
29
IO30
30
IO33
33
IO34
34
IO35
35
IO36
36
IO37
37
IO38
38
IO39
39
IO40
40
IO41
41
IO42
42
IO47
47
IO48
48
IO49
49
IO50
50
D16D16
U6
LT1763CS8-1.8
U6
LT1763CS8-1.8
OUT
1
SEN
2
GND
3
BYP
4
SHDN
5
GND
6
GND
7
IN
8
R25 1.69k R25 1.69k
D12D12
R16 1k R16 1k
JP7JP7
1 3 2
R27 2.80k R27 2.80k
C25 1uF 16V C25 1uF 16V
D6D6 D17D17
C13 10uF 0805 10V C13 10uF 0805 10V
C20 10uF 6.3V C20 10uF 6.3V
C19 0.01uF C19 0.01uF
U14C
EPM240T
U14C
EPM240T
IO51
51
IO52
52
IO53
53
IO54
54
IO55
55
IO56
56
IO57
57
IO58
58
IO61
61
IO66
66
IO67
67
IO68
68
IO69
69
IO70
70
IO71
71
IO72
72
IO73
73
IO74
74
IO75
75
C14 10uF 0805 10V C14 10uF 0805 10V
E5E5
E8E8
BUSYBUSY
R14 1k R14 1k
C44 - C49 0402 C44 - C49 0402
D15D15 D0D0
JTAG
HD2X5-100
JTAG
HD2X5-100
1 3 56
4 2
7 9
8
10
D9D9 D7D7
U7
LT1763CS8
U7
LT1763CS8
OUT
1
SEN
2
GND
3
BYP
4
SHDN
5
GND
6
GND
7
IN
8
E2E2
C43C43
D14D14
U9
LT1763CS8
U9
LT1763CS8
OUT
1
SEN
2
GND
3
BYP
4
SHDN
5
GND
6
GND
7
IN
8
D1D1
C15 0.01uF C15 0.01uF
D13D13
U14F EPM240T U14F EPM240T
VCCINT
13
VCCINT
63
VCCIO1
9
VCCIO1
31
VCCIO2
94
VCCIO1
45
VCCIO2
59
VCCIO2
80
GND
10
GND
11
GND
32
GND
46
GND
60
GND
93
GND
65
GND
79
R26 1.54k R26 1.54k
0.1uF0.1uF
D10D10 D4D4
C16 1uF 16V C16 1uF 16V
C26 47uF 1210 16V C26 47uF 1210 16V
R31 - R33R31 - R33
R13 3.92k R13 3.92k
C22 10uF 6.3V C22 10uF 6.3V
C42 0402 0.1uF C42 0402 0.1uF
R34 0402 1k R34 0402 1k
C23 1uF 16V C23 1uF 16V

10
dc1500af
DEMO MANUAL DC1500A
ASSEMBLY DRAWINGS