Neoway N21 Series Installation manual

N21
Hardware User Guide
Issue 1.2
Date 2018-12-24
Neoway Product Documentation

N21
Hardware User Guide
Copyright © Neoway Technology Co., Ltd. All rights reserved.
i
Copyright
Copyright © Neoway Technology Co., Ltd. 2018.All rights reserved.
No part of this document may be reproduced or transmitted in any form or by any means without prior
written consent of Neoway Technology Co., Ltd.
is the trademark of Neoway Technology Co., Ltd.
All other trademarks and trade names mentioned in this document are the property of their respective
holders.
Notice
This document is applicable to N21.
This document is intended for system engineers (SEs), development engineers, and test engineers.
THIS GUIDE PROVIDES INSTRUCTIONS FOR CUSTOMERS TO DESIGN THEIR APPLICATIONS.
PLEASE FOLLOW THE RULES AND PARAMETERS IN THIS GUIDE TO DESIGN AND
COMMISSION.NEOWAY WILL NOT TAKE ANY RESPONSIBILITY OF BODILY HURT OR ASSET LOSS
CAUSED BY IMPROPER OPERATIONS.
The information in this document is subject to change without notice due to product version update or other
reasons.
Every effort has been made in preparation of this document to ensure accuracy of the contents, but all
statements, information, and recommendations in this document do not constitute a warranty of any kind,
express or implied.
Neoway provides customers complete technical support. If you have any question, please contact your
account manager or email to the following email addresses:
[email protected]
[email protected]
Website: http://www.neoway.com

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Contents
About This Document ..................................................................................vii
Scope ................................................................................................................................................ vii
Audience ........................................................................................................................................... vii
Revision History ................................................................................................................................ vii
Symbols and Conventions ............................................................................................................... viii
Related Documents.......................................................................................................................... viii
1 About N21.................................................................................................. 1
1.1 Product Overview......................................................................................................................... 1
1.2 Block Diagram.............................................................................................................................. 1
1.3 Basic Features ............................................................................................................................. 2
2 Module Pins............................................................................................... 4
2.1 Pad Layout ................................................................................................................................... 4
2.2 Pin Description ............................................................................................................................. 5
3 Application Interfaces ................................................................................ 7
3.1 Power Supply ............................................................................................................................... 7
3.1.1 VBAT.................................................................................................................................... 7
3.1.2 VDDIO_2P8....................................................................................................................... 10
3.2 Control Interfaces....................................................................................................................... 10
3.2.1 PWRKEY_N ...................................................................................................................... 10
3.2.2 RESET_N .......................................................................................................................... 13
3.3 Peripheral Interfaces .................................................................................................................. 14
3.3.1 UART................................................................................................................................. 15
3.3.2 USIM.................................................................................................................................. 18
3.4 RF Interface................................................................................................................................ 20
3.4.1 Antenna Design ................................................................................................................. 20
3.4.2 Antenna Assembling.......................................................................................................... 22
3.5 Other Interfaces ......................................................................................................................... 23
3.5.1 WAKEUP ........................................................................................................................... 23
3.5.2 NET_LIGHT....................................................................................................................... 23
3.5.3 STATUS ............................................................................................................................. 24
4 Electric Feature and Reliability ................................................................ 25
4.1 Nominal Values .......................................................................................................................... 25
4.2 Current Features ........................................................................................................................ 25
4.3 Temperature Feature.................................................................................................................. 26
4.4 ESD Protection........................................................................................................................... 26
5 RF Features............................................................................................. 27
5.1 Operating Bands ........................................................................................................................ 27
5.2 TX Power and RX Sensitivity ..................................................................................................... 27
6 Mechanical Features ............................................................................... 28

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6.1 Dimensions................................................................................................................................. 28
6.2 Label........................................................................................................................................... 28
6.3 Package ..................................................................................................................................... 29
7 Mounting N21 onto Application Board ..................................................... 31
7.1 Bottom Dimensions .................................................................................................................... 31
7.2 Application Foot Print ................................................................................................................. 32
7.3 Stencil......................................................................................................................................... 32
7.4 Solder Paste............................................................................................................................... 32
7.5 SMT Profile................................................................................................................................. 33
8 Safety Recommendations ....................................................................... 34
A Conformity and Compliance .................................................................... 35
A.1 Approvals ................................................................................................................................... 35
A.2 Chinese Notice........................................................................................................................... 35
A.2.1 CCC Class A Digital Device Notice ................................................................................... 35
A.2.2 Environmental Protection Notice....................................................................................... 35
A.3 American Notice......................................................................................................................... 35
A.3.1 Modify................................................................................................................................ 36
A.3.2 FCC Class A Digital Device Notice ................................................................................... 36
A.3.3 FCC Class B Digital Device Notice ................................................................................... 36
B Abbreviation ............................................................................................ 37

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Table of Figures
Figure 1-1 Block Diagram .................................................................................................................. 2
Figure 2-1 Pin definition of N21.......................................................................................................... 4
Figure 3-1 Recommended circuit design 1 ........................................................................................ 8
Figure 3-2 Recommended schematic design 2 ................................................................................. 9
Figure 3-3 Reference design of startup controlled by button............................................................11
Figure 3-4 Reference design of startup controlled by MCU..............................................................11
Figure 3-5 Reference design of automatic start once powered up ...................................................11
Figure 3-6 Startup timing.................................................................................................................. 12
Figure 3-7 Shutdown timing ............................................................................................................. 13
Figure 3-8 Reset controlled by button.............................................................................................. 13
Figure 3-9 Reset circuit with triode separating................................................................................. 14
Figure 3-10 Reset timing of N21 ...................................................................................................... 14
Figure 3-11 UART connection .......................................................................................................... 15
Figure 3-12 Recommended level shifting circuit 1 ........................................................................... 16
Figure 3-13 Recommended level shifting circuit 2 ........................................................................... 16
Figure 3-14 Recommended level shifting circuit 3 ........................................................................... 18
Figure 3-15 Reference design of USIM card interface..................................................................... 19
Figure 3-16 L network ...................................................................................................................... 20
Figure 3-17 T network ...................................................................................................................... 20
Figure 3-18 Pi network ..................................................................................................................... 21
Figure 3-19 Recommended RF PCB design ................................................................................... 21
Figure 3-20 Specifications of MM9329-2700RA1 ............................................................................ 22
Figure 3-21 RF connections............................................................................................................. 22
Figure 3-22 Reference design of WAKEUP..................................................................................... 23
Figure 3-23 Driving LED directly ...................................................................................................... 23
Figure 3-24 Driving LED with a triode .............................................................................................. 24
Figure 6-1 N21 dimensions (Unit: mm) ............................................................................................ 28

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Figure 7-1 N21 bottom dimensions (Unit: mm) ................................................................................ 31
Figure 7-2 Recommended PCB foot print (Unit: mm)...................................................................... 32
Figure 7-3 SMT furnace temperature curve ..................................................................................... 33

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Table of Tables
Table 1-1 Variants and bands............................................................................................................. 1
Table 2-1 IO definition ........................................................................................................................ 5
Table 2-2 Pin Description ................................................................................................................... 5
Table 4-1 Operating conditions of N21............................................................................................. 25
Table 4-2 Current consumption of N21 (Typical).............................................................................. 25
Table 4-3 Temperature features of N21............................................................................................ 26
Table 4-4 N21 ESD protection.......................................................................................................... 26
Table 5-1 Operating bands of N21 ................................................................................................... 27
Table 5-2 RF TX power of N21......................................................................................................... 27
Table 5-3 RX sensitivity of N21 Cat NB1 ......................................................................................... 27

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About This Document
Scope
This document is applicable to N21 series.
It defines the features, indicators, reference designs, and test standards of the N21 module.
Reference designs in this document are only for reference. Design applications based on the actual
scenarios and conditions. Please contact Neoway technical support team for further technical support.
Audience
This document is intended for system engineers (SEs), development engineers, and test engineers.
Revision History
Issue
Date
Changes
Revised By
1.0
2018-06
Initial draft
Huang Jianlong
1.1
2018-08
Updated operating voltage range
Updated temperature ranges
Updated bands supported
Updated pin description
Huang Jianlong
1.2
2018-10
Deleted AP and changed bands of EU version to B3,
B5, B8, B20, B28
Modified reference designs of UART and changed level
from module side to VDDIO_2P8
Added reference design of WAKEUP and power domain
Updated reference design of RESET and power domain
Added cautions about initialization.
Updated current data
Huang Jianlong

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Symbols and Conventions
Symbol
Indication
This warning symbol means danger. You are in a situation that could cause fatal
device damage or even bodily damage.
Means reader be careful. In this situation, you might perform an action that could
result in module or product damages.
Means note or tips for readers to use the module
Related Documents
Neoway_N21_Datasheet
Neoway_N21_Product_Specifications
Neoway_N21_AT_Command_Mannual
Neoway_N21_EVK_User_Guide

N21
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1 About N21
1.1 Product Overview
N21 is an compact industrial-grade NB-IoT module that supports Cat NB1.
N21 series include multiple variants. Table 1-1 Lists the variants and bands supported.
Table 1-1 Variants and bands
Function
Variant
Network Type
Band
N21
N21-CN-011AS1
Cat NB1
HD-FDD: B3,B5,B8
N21-EU-011AS1
Cat NB1
HD-FDD: B3,B5,B8,B20,B28
Featured with ultra-low power consumption, extensive coverage and simple peripheral circuits, N21 is
well applicable for IoT applications that requires low data rate and low power consumption. It adopts
22-pin LGA package and its dimensions are 18 mm x 13.8 mm x 2.5 mm, which can meet the comact
product design requirement .
It provides the following hardware resources and functionalities:
UART interfaces, used for data communication, firmware update, and commissioning
Compatibility with 1.8 V/3.0V USIM card
STATUS (working status) /NET_LIGHT (network status indicator)/WAKEUP (PSM wakeup)
/RESET
1.2 Block Diagram
N21 consists of the following functionality modules:
Power management unit
Clock unit
Digital interfaces (UIM, UART)
RF section

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Figure 1-1 Block Diagram
ON/OFF
Power
Manager
Flash
Analog
Baseband
Digital
Baseband
RF Front-end-module 26MHz
Crystal
Digital
Iterface
SIM UART
SIM
VBAT
RF transceiver
32.768KHz
Crystal
MCU
1.3 Basic Features
Parameter
Description
Physical features
Dimensions: (18.0±0.15) mm ×(13.8±0.15) mm ×(2.5±0.15) mm
Package: LGA
Weight: around 1.3 g
Temperature ranges
Operating: -30°C to +75°C
Extended: -40°C to +85°C
Storage: -45°C to +90°C
Operating voltage
VBAT: 3.1V to 4.3V, TYP: 3.6V
MIPS processor
Main frequency: 192 MHz, 16KB L2 cache

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Memory
RAM: 32 Mb
ROM: 32 Mb
Band
B3, B5, B8, B20, B28
Wireless rate
LTE Cat NB1: 32 kbit/s (DL) /72 kbit/s (UL)
Transmit power
LTE: +23 dBm+/-2 dBm (Power Class 3)
Application interfaces
4G antenna, 50 Ω characteristic impedance
1 UART interface, used to send AT commands
1 USIM interface, compatible with 1.8V/3V USIM card
2*2 mm embedded eSIM (Optional)
AT commands
3GPP Rel-13
Neoway extended commands
Protocol
TCP, UDP, HTTP, HTTPS, FTP, LWM2M, MQTT, COAP
Certificates
and
Approvals
CCC, SRRC, CTA, RoHS, CE*, GCF*, Vodafone*, FCC*
China Mobile/China Unicom/China Telecom
Ali cloud*
* indicates in development

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2 Module Pins
There are 22 pins on N21 and their pads are introduced in LGA package.
2.1 Pad Layout
Figure 2-1 shows the pad layout of N21.
Figure 2-1 Pin definition of N21
N21
Top View
22
21
20
19
18
17
15
14
13
12
1
2
3
4
5
6
7
8
9
10
11
16
GND
GND
GND
VBAT
VBAT
PWRKEY_N
USIM_DATA
USIM_CLK
USIM_RESET
USIM_VCC
RESERVED
UART_RXD
UART_TXD
DEBUG_UART_RXD
DEBUG_UART_TXD
VDDIO_2P8
WAKEUP
NET_LIGHT
STATUS
GND
ANT
RESET_N

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2.2 Pin Description
Table 2-1 lists the definition of IO types.
Table 2-1 IO definition
IO Type
DO
Digital output, COMS logic level
DI
Digital input, COMS logic level
PO
Power output
PI
Power input
AO
Analog output
AI
Analog input
Level Feature
P1
1.8V/3.0V
1.8 V level feature:
VIH=1.26V~1.8V
VIL=-0.3V~0.36V
VOH=1.44V~1.8V
VOL=0V~0.4V
3.0 V level feature:
VIH=2V~3V
VIL=-0.3V~0.57V
VOH=2.28V~3V
VOL=0V~0.4V
P2
2.8V digital IO
VIH min=1.96V VIL max= 0.84V
VOH min=2.38V VOLmax=0.42V
P3
1.1V of V_RTC power domain
VIH min=0.68V VIH max= 1.41V
VIL min=-0.3V VIL max= 0.36V
Table 2-2 Pin Description
Signal
Pin
I/O
Function
Level
Remarks
Power Supply Pins
VBAT
2, 3
PI
Main power
input
Vmax=4.3V
VDDIO_2P8
17
PO
2.8V power
output
Vnorm=2.8V
Imax=50mA
Used only for level shifting.
Leave this pin floating if it is
not used.
GND
1, 4, 10, 21
Ensure that all GND pins are

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connected to the ground.
Control Interfaces
RESET_N
12
DI
Reset input
P3
Triggered by low level
PWRKEY_N
5
DI
ON/OFF button
P3
Triggered by low level to start
or shut down the module
WAKEUP
18
DI
PSM wakeup
input
P3
Input high level for 1 second
at this pin and the module
wakes up.
STATUS
20
DO
Status indicator
P2
Leave this pin floating if it is
not used.
NET_LIGHT
19
DO
Network status
indicator
P2
Used with AT commands
UART Interface
UART_TXD
14
DO
Data
transmitting
P2
Used for data transmission.
Leave these pins floating if
not used.
UART_RXD
13
DI
Data receiving
P2
DEBUG_UART Interface
DEBUG_UART_RXD
15
DI
Data receiving
P2
Used for commissioning.
Leave these pins floating if
not used.
DEBUG_UART_TXD
16
DO
Data
transmitting
P2
USIM interface
USIM_VCC
9
PO
USIM power
output
IOmax =50mA
USIM_VCC
USIM_DATA
6
DIO
USIM data IO
P1
USIM_CLK
7
DO
USIM clock
P1
USIM_RESET
8
DO
USIM reset
P1
Antenna Interface
ANT
22
AI/O
Antenna
50 Ω impedance for traces
Reserved Pins
RESERVED
11
Leave these pins floating. Do
not connect them to ground
or power supply through a
pull-up resistor.

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3 Application Interfaces
N21 provides power supply, communications, RF, and other interfaces to meet customers
requirements in different application scenarios.
This chapter describes how to design each interface and provides reference designs and guidelines.
3.1 Power Supply
The schematic design and PCB layout of the power supply part are the most critical process in
application design and they determine the performance of customers application. Please read the
guidelines to design power supply and comply with the correct design principles to obtain the optimal
circuit performance.
Signal
Pin
I/O
Function
Remarks
VBAT
2, 3
PI
Main power input
3.1V to 4.3V (TYP: 3.6V)
VDDIO_2P8
17
PO
2.8V power output
Output max. 50 mA, used only for level shifting.
Add ESD protector when using this pin.
GND
1, 4, 10, 21
Connect all GND pins to the ground plane.
3.1.1 VBAT
The power supply design consists of two parts: schematic design and PCB layout.
Schematic Design
N21 adopts a 3.3V-4.3V voltage input supplied by a battery and the typical voltage is 3.6V. Figure 3-1
Shows the schematic design of N21 power supply.

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Figure 3-1 Recommended circuit design 1
Power Supply N21 Module
D1 C1 C2 C3 C4
Close to the pin of the module
VBAT
Test point
I_max
C5
The maximum input voltage is 4.3 V and the typical value is 3.6V.
The protection voltage across D1 should not exceed the maximum input voltage the module can
bear.
Place TVS diode close to the input interface of the power supply to clamp the surge voltage
before it enters back-end circuits. Therefore, the back-end components and the module are
protected.
A large bypass tantalum capacitor (220 μF or 100 μF) or aluminum capacitor (470 μF or 1000 μF)
is expected at C1 to reduce voltage drops during bursts. Its maximum safe operating voltage
should be higher than 1.5 times the voltage across the power supply.
Place a bypass capacitor of low-ESR close to the module to filter out high-frequency noise from
the power supply.
A controllable power supply is preferable if the module is used in harsh conditions. Figure 3-2 shows
the recommended schematic design.

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Figure 3-2 Recommended schematic design 2
S
G
D
R4
100 kΩ
C4
10 μF
Q2
Q1
TVS2 C3
470 μF
C5
0.1 μF
C6
100pF
C7
33 pF
R1
2 kΩ
R2
10 kΩ
C1
10 μF
C2
0.1 μF
B
C
E
VIN (3.6V) VBAT
PWR_EN
Schematic Design Guidelines
Select an enhanced p-MOSFET at Q1, of which the maximum safe operating voltage and drain
current is high and Rds is low.
Select a common NPN bipolar transistor or a digital NPN bipolar transistor at Q2. Reserve
enough tolerances of resistors at R1 and R2 in design, especially for the situation in which
operating voltage of the bipolar transistor might increase in low temperature.
Place TVS2 close to the input interface of the power supply to clamp the surge voltage before it
enters back-end circuits. Therefore, the back-end components and the module are protected.
Place C3 close to the module. A large bypass tantalum capacitor (220 μF or 100 μF) or aluminum
capacitor (470 μF or 1000 μF) is expected at C1 to reduce voltage drops during bursts. Its
maximum safe operating voltage should be higher than 1.5 times the voltage across the power
supply.
Place a low-ESR bypass capacitor close to the module to filter out high-frequency noise from the
power supply.
PCB Layout Guidelines
Place an ESR capacitor at the output of the power supply to absorb surge current. Place a TVS diode
at the input of VBAT to protect back-end components. The layout of components and PCB trace are
critical to the hardware design of a device. Follow rules below in the power supply design:
TVS diodes dissipate the transient pulse power during a surge and can handle a peak pulse
current of dozens or more than 100 A. They have a short response time. Place the TVS as close
to the interface as possible to ensure that the surge voltage can be clamped before the pulse is
coupled to the neighbor traces.

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Place bypass capacitors close to the power pin of the module to filter out the high-frequency
noise from the power supply.
Ensure that the width of PCB traces for VBAT circuits allows 1A current and ensure no obvious
decrease of loop voltages. Trace width of VBAT should be at least 1mm and the ground plane
should be as complete as possible. The traces of power supply circuit should be as short and
wide as possible.
Noise-sensitive circuits such as audio and RF, should be placed far away from power supply
circuits, especially when the DC-DC is adopted in the design. Connect GND pins and bottom
pads to ground to optimize heat sink and separate noise.
Never use a diode to make the drop voltage between a higher input and module power. Otherwise,
Neoway will not provide warranty for product issues caused by this. In this situation, the diode will
obviously decrease the module performances, or result in unexpected restarts, because the forward
voltage of diode will vary greatly in different temperature and current. The module might not work properly
with a diode power supply.
3.1.2 VDDIO_2P8
N21 provides one VDDIO_2P8 pin that outputs 2.8 V@50 mA.
VDDIO_2P8 is enabled automatically when the module is awake or in running state.
It is recommended that VDDIO_2P8 is used for level shift only and an ESD protector should be added.
3.2 Control Interfaces
Signal
Pin
I/O
Function
Remarks
RESET_N
12
DI
Reset input
Reset at low level
PWRKEY_N
5
DI
ON/OFF button
Triggered by low level to start or shut down the
module.
3.2.1 PWRKEY_N
N21 allows startup by the following controls:
Button
MCU
Automatic start once powered up

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Figure 3-3 Reference design of startup controlled by button
ESD N21 module
PWRKEY_N
S1
Figure 3-4 Reference design of startup controlled by MCU
R1
4.7kΩ
N21 module
PWRKEY_N
R2
47kΩ
USER_ON
Q
Figure 3-5 Reference design of automatic start once powered up
1.5 kΩN21 module
PWRKEY_N