Neoway N51 Installation manual

N51
Hardware User Guide
Issue 1.0
Date 2018-10-25
Neoway Product Document

N51
Hardware User Guide
Copyright © Neoway Technology Co., Ltd
i
Copyright © Neoway Technology Co., Ltd 2018. All rights reserved.
No part of this document may be reproduced or transmitted in any form or by any means without prior written
consent of Neoway Technology Co., Ltd.
is the trademark of Neoway Technology Co., Ltd.
All other trademarks and trade names mentioned in this document are the property of their respective
holders.
Notice
This document provides guide for users to use N51.
This document is intended for system engineers (SEs), development engineers, and test engineers.
THIS GUIDE PROVIDES INSTRUCTIONS FOR CUSTOMERS TO DESIGN THEIR APPLICATIONS.
PLEASE FOLLOW THE RULES AND PARAMETERS IN THIS GUIDE TO DESIGN AND COMMISSION.
NEOWAY WILL NOT TAKE ANY RESPONSIBILITY OF BODILY HURT OR ASSET LOSS CAUSED BY
IMPROPER OPERATIONS.
THE INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE DUE TO
PRODUCT VERSION UPDATE OR OTHER REASONS.
EVERY EFFORT HAS BEEN MADE IN PREPARATION OF THIS DOCUMENT TO ENSURE ACCURACY
OF THE CONTENTS, BUT ALL STATEMENTS, INFORMATION, AND RECOMMENDATIONS IN THIS
DOCUMENT DO NOT CONSTITUTE A WARRANTY OF ANY KIND, EXPRESS OR IMPLIED.
Neoway provides customers complete technical support. If you have any question, please contact your
account manager or email to the following email addresses:
[email protected]
Su[email protected]
Website: http://www.neoway.com

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Contents
1 About N51.................................................................................................. 1
1.1 Product Overview......................................................................................................................... 1
1.2 Block Diagram.............................................................................................................................. 1
1.3 Basic Features ............................................................................................................................. 2
2 Module Pins............................................................................................... 4
2.1 Pad Layout ................................................................................................................................... 4
2.2 Pin Description ............................................................................................................................. 5
3 Application Interfaces .............................................................................. 10
3.1 Power Interfaces ........................................................................................................................ 10
3.1.1 VBAT.................................................................................................................................. 10
3.1.2 VDD_1P8........................................................................................................................... 14
3.1.3 VDDIO ............................................................................................................................... 14
3.2 Control Interfaces....................................................................................................................... 14
3.2.1 PWRKEY_N ...................................................................................................................... 14
3.2.2 RESET_N .......................................................................................................................... 16
3.3 Peripheral Interfaces .................................................................................................................. 17
3.3.1 USB ................................................................................................................................... 17
3.3.2 UART................................................................................................................................. 18
3.3.3 USIM.................................................................................................................................. 22
3.3.4 SPI..................................................................................................................................... 23
3.3.5 I2C ..................................................................................................................................... 24
3.4 Audio Interface ........................................................................................................................... 25
3.4.1 Analog Audio Input Interfaces............................................................................................ 25
3.4.2 Analog Audio Output Interfaces......................................................................................... 26
3.5 RF Interface................................................................................................................................ 27
3.5.1 Antenna Interface .............................................................................................................. 27
3.5.2 Antenna Assembling.......................................................................................................... 29
3.6 GPIO interface ........................................................................................................................... 31
3.7 MUX Interfaces .......................................................................................................................... 31
3.8 Other Interfaces ......................................................................................................................... 32
3.8.1 RING.................................................................................................................................. 33
3.8.2 NET_LIGHT....................................................................................................................... 34
3.8.3 SLEEP ............................................................................................................................... 34
3.8.4 ADC ................................................................................................................................... 35
3.8.5 USB_BOOT ....................................................................................................................... 35
3.8.6 KEYPAD ............................................................................................................................ 35
4 Electric Feature and Reliability ................................................................ 37
4.1 Electric Features ........................................................................................................................ 37
4.2 Temperature Feature.................................................................................................................. 38
4.3 ESD Protection........................................................................................................................... 38

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5 RF Features............................................................................................. 39
5.1 Operating Bands ........................................................................................................................ 39
5.2 TX Power and RX Sensitivity ..................................................................................................... 39
6 Mechanical Features ............................................................................... 41
6.1 Dimensions................................................................................................................................. 41
6.2 Three Views ............................................................................................................................... 42
6.3 Packing....................................................................................................................................... 42
6.3.1 Tray.................................................................................................................................... 42
6.3.2 Moisture............................................................................................................................. 42
7 Mounting N51 onto the Application Board ............................................... 43
7.1 Bottom Dimensions .................................................................................................................... 43
7.2 Application Foot Print ................................................................................................................. 44
7.3 Stencil......................................................................................................................................... 44
7.4 Solder Paste............................................................................................................................... 44
7.5 SMT Furnace Temperature Curve.............................................................................................. 45
8 Safety Recommendations ....................................................................... 46
A Abbreviation............................................................................................. 47

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Hardware User Guide
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Table of Figures
Figure 1-1 Block diagram ................................................................................................................... 2
Figure 2-1 Pin assignment of N51...................................................................................................... 4
Figure 3-1 Reference design 1..........................................................................................................11
Figure 3-2 Reference design 2..........................................................................................................11
Figure 3-3 Reference design 3......................................................................................................... 12
Figure 3-4 Reference design of startup controlled by button........................................................... 14
Figure 3-5 Reference design of startup controlled by MCU............................................................. 15
Figure 3-6 Reference design of automatic start once powered up .................................................. 15
Figure 3-7 N51 startup timing........................................................................................................... 16
Figure 3-8 N51 shutdown timing ...................................................................................................... 16
Figure 3-9 Reset timing of N51 ........................................................................................................ 17
Figure 3-10 USB connection ............................................................................................................ 18
Figure 3-11 Reference design 1 of UART connection...................................................................... 19
Figure 3-12 Reference design 2 of UART connection ..................................................................... 19
Figure 3-13 Recommended level shifting circuit 1........................................................................... 20
Figure 3-14 Recommended level shifting circuit 2........................................................................... 20
Figure 3-15 Recommended level shifting circuit 3........................................................................... 21
Figure 3-16 Reference design of USIM card interface..................................................................... 22
Figure 3-17 SPI connection.............................................................................................................. 24
Figure 3-18 I2C connection.............................................................................................................. 24
Figure 3-19 Reference design of differential MIC input ................................................................... 25
Figure 3-20 Reference design of SPK differential output................................................................. 26
Figure 3-21 L network ...................................................................................................................... 27
Figure 3-22 T network ...................................................................................................................... 28
Figure 3-23 Pi network ..................................................................................................................... 28
Figure 3-24 Recommended RF PCB design ................................................................................... 29
Figure 3-25 Specifications of MM9329-2700RA1 ............................................................................ 29

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Figure 3-26 RF connections............................................................................................................. 30
Figure 3-27 Antenna layout .............................................................................................................. 30
Figure 3-28 Layout around the antenna........................................................................................... 31
Figure 3-29 Pulse wave for an incoming call ................................................................................... 33
Figure 3-30 RING indicator for SMS ................................................................................................ 33
Figure 3-31 Reference design of LED driving.................................................................................. 34
Figure 3-32 Reference design of sleep control................................................................................ 34
Figure 3-33 Reference design of USB_BOOT................................................................................. 35
Figure 3-34 Reference design of keypads ....................................................................................... 36
Figure 6-1 N51 dimensions (Unit: mm) ............................................................................................ 41
Figure 6-2 Three views of N51......................................................................................................... 42
Figure 7-1 N51 bottom dimensions (Unit: mm) ................................................................................ 43
Figure 7-2 Recommended PCB foot print (Unit: mm)...................................................................... 44
Figure 7-3 SMT furnace temperature curve ..................................................................................... 45

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Hardware User Guide
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Table of Tables
Table 1-1 Variant and frequency bands.............................................................................................. 1
Table 1-2 Basic features..................................................................................................................... 2
Table 2-1 IO definition ........................................................................................................................ 5
Table 2-2 Pin Description ................................................................................................................... 5
Table 3-1 MUX pins .......................................................................................................................... 31
Table 4-1 Operating conditions of N51............................................................................................. 37
Table 4-2 Current consumption of N51 (Typical).............................................................................. 37
Table 4-3 Temperature features of N51............................................................................................ 38
Table 4-4 N51 ESD protection.......................................................................................................... 38
Table 5-1 Operating band of N51..................................................................................................... 39
Table 5-2 TX power and RX sensitivity of N51................................................................................. 39

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Hardware User Guide
Copyright © Neoway Technology Co., Ltd
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About This Document
Scope
This document is applicable toN51series.
It defines the features, indicators, and test standards of the N51module and provides reference for the
hardware design of each interface.
Audience
This document is intended for system engineers (SEs), development engineers, and test engineers.
Change History
Issue
Date
Change
Changed By
1.0
2018-10
Initial draft
Ye Wei
Conventions
Symbol
Indication
This warning symbol means danger. You are in a situation that could cause fatal
device damage or even bodily damage.
Means reader be careful. In this situation, you might perform an action that
could result in module or product damages.
Means note or tips for readers to use the module

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Related Documents
Neoway_N51_Datasheet
Neoway_N51_Product_Specifications
Neoway_N51_AT_Command_Mannual
Neoway_N51_EVK_User_Guide

N51
Hardware User Guide
Copyright © Neoway Technology Co., Ltd
1
1 About N51
1.1 Product Overview
N51 is an industrial WCCMA module that is developed on UNISOC platform. It supports GSM and
WCDMA cellular networks.
N51 series include multiple variants. Table 1-1 lists the variants and frequency bands supported.
Table 1-1 Variant and frequency bands
Function
Version
Band
N51
CE
UMTS: B1, B8
GSM/GPRS: 900/1800 MHz
N51
WW
UMTS: B1, B2, B5, B8
GSM/GPRS: 850/900/1800/1900 MHz
N51 adopts 100-pin LGA package and its dimensions are 30 mm x 28 mm x 2.35 mm. With industrial-
grade performance, this module is well applicable to electrical terminals, industrial control, POS, and
other IoT terminals.
1.2 Block Diagram
N51 consists of the following functionality modules:
Baseband
Crystal oscillator
Power management unit
Memory
Digital interfaces (USIM/UART/SPI/I2C/GPIO/KEYPAD)
Analog interfaces (USB/Audio/ADC)
RF unit (2G/3Gantenna)

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Figure 1-1 Block diagram
Transceiver
RF Front-End Module
Power Manager
Memory
VBAT
Digital Interface
ANT
SIMSPI
26M
crystal
Analog Baseband
Digital Baseband
Analog Interface
I2C GPIOUART USB ADCAUDIO
PWRKEY_N
RESET_N
KEYPAD
1.3 Basic Features
Table 1-2 Basic features
Parameter
Description
Physical features
Dimensions: (30.0±0.15) mm ×(28.0±0.15) mm × (2.35±0.15) mm
Package: LGA
Weight: TBD
Temperature ranges
Operating: -30°C to 75 °C
Extended: -40℃ to 85 °C
Storage: -45℃to +90 °C
Operating voltage
VBAT: 3.3 V to 4.3 V, TYP: 3.8 V
Current
See Table 4-2.

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MIPS processor
ARM926EJ 32bit RISC processor, 460.8 MHz main frequency
Memory
ROM: 128 MB
RAM: 64 MB
Band
See Table 1-1.
Wireless rate
GPRS: Max 85.6 Kbit/s(DL) / Max 85.6 Kbit/s(UL)
EDGE: Downlink, Max 236.8 Kbit/s(DL)
WCDMA: HSDPA/HSUPA, Max 7.2Mbit/s (DL)/Max 1.92Mbit/s(UL)
Transmit power
GSM850: +33dBm (Power Class 4)
EGSM900: +33dBm (Power Class 4)
DCS1800: +30dBm (Power Class 1)
PCS1900: +30dBm (Power Class 1)
UMTS: +23dBm (Power Class 3)
Application Interfaces
2G/3G antenna, 50Ω characteristic impedance
Two UART interfaces, one of which supports hardware flow control
Two USIM interfaces, compatible with 1.8 V/3 V USIM cards, 2 mm *
2 mm eSIM optional
One USB2.0 high-speed interface
One 10-bit ADC interface, detectable voltage ranging from 0.1 to 1.7 V.
One SPI interface
Four GPIOs with interrupt
One I2C interface
One set of 3*3 key pads
One audio input and one audio output
AT commands
TBD
SMS
TBD
Protocol
TBD
Certification approval
TBD

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Hardware User Guide
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4
2 Module Pins
There are 100 pins on N51 and their pads are introduced in LGA package.
2.1 Pad Layout
Figure 2-1 shows the pad layout of N51.
Figure 2-1 Pin assignment of N51

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2.2 Pin Description
Table 2-1 IO definition
IO Type
B
Digital input/output, COMS level
DO
Digital output, COMS level
DI
Digital input, COMS level
PO
Power output
PI
Power supply input
AO
Analog output
AI
Analog input
AIO
Analog input/output
Level Feature
P1
Dual-voltage 1 of SIM card
interface, 1.8 V/2.85 V
1.8 V level feature:
VIH=1.26~1.95 V,
VIL=0~0.54 V
VOH=1.62~1.95 V,
VOL=0~0.18 V
2.85 V level feature
VIH=2~3.1 V,
VIL=0~0.86 V
VOH=2.57~3.1 V,
VOL=0 V~0.29 V
P2
1.8 V digital IO
VIH=1.26~1.95 V, VIL=0~0.54 V
VOH=1.62~1.95 V, VOL=0~0.18 V
P3
Dual-voltage 2 of SIM card
interface, 1.8 V/2.85 V
1.8 V level feature:
VIH=1.26~1.95 V,
VIL=0~0.54 V
VOH=1.62~1.95 V,
VOL=0~0.18 V
2.85 V level feature
VIH=2~3.1 V,
VIL=0~0.86 V
VOH=2.57~3.1 V,
VOL=0 V~0.29 V
Table 2-2 Pin Description
Signal
Pin
I/O
Function
Level
Feature
Remarks
Power Interfaces
VBAT
27,
28,
29
PI
Main power supply
input
Vin: 3.3~4.3 V, TYP: 3.8 V,
Imax=2A

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VDD_1P8
45
PO
1.8 V power output
A maximum driving current of
50mA
Used only for level shifting and
IO power supply
Leave this pin floating if it is not
used
VDDIO
53
PO
LDO power output
1.8 V by default, a maximum
driving current of 180mA.
Leave this pin floating if it is not
used.
GND
1, 14, 17, 20, 26, 30, 31, 44, 49, 74, 75, 77, 91,
93, 95, 97, 98, 99, 100
Ensure that all GND pins are
connected to the ground.
Control Interfaces
PWRKEY_N
33
DI
ON/OFF button
Connected to VBAT through
an internal pull-up resistor
Low level triggered
RESET_N
32
DI
Module reset input
Connected to VBAT through
an internal pull-up resistor
Low level triggered
USB interface
USB_VBUS
40
PI
Charging voltage
check
Vin: 4.5~5.5 V, TYP: 5 V
USB_DM
41
AIO
USB data negative
signal
Used for firmware download
and data transmission.
Routed in differential mode,
control impedance of 90Ω
Leave this pin floating if it is not
used.
USB_DP
42
AIO
USB data positive
signal
UART Interface
UART1_TXD
69
DO
Data transmitting
P2
Leave this pin floating if it is not
used.
UART1_RXD
70
DI
Data receiving
P2
Leave this pin floating if it is not
used.
UART2_TXD
46
DO
Data transmitting
P2
Used for data transmission.
Leave this pin floating if it is not
used.
UART2_RXD
47
DI
Data receiving
P2

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UART2_CTS
51
DI
Clear to send
P2
Leave this pin floating if it is not
used.
UART2_RTS
52
DO
Request to send
P2
Leave this pin floating if it is not
used.
USIM interface
USIM1_VCC
35
PO
USIM1 power
output
Imax =60mA
Leave this pin floating if it is not
used.
USIM1_DATA
36
DIO
USIM data IO
P1
It is connected through an
internal pull-up resistor. Leave
this pin floating if it is not used.
USIM1_CLK
37
DO
USIM1 clock output
P1
Leave this pin floating if it is not
used.
USIM1_RESET
38
DO
USIM1 reset
P1
Leave this pin floating if it is not
used.
USIM1_DET
39
DI
USIM1 detect
P2
Leave this pin floating if it is not
used.
USIM2_VCC
21
PO
USIM2 power
output
Imax =60mA
Leave this pin floating if it is not
used.
USIM2_DATA
22
DIO
USIM2 data IO
P3
It is connected through an
internal pull-up resistor. Leave
this pin floating if it is not used.
USIM2_CLK
23
DO
USIM2 clock output
P3
Leave this pin floating if it is not
used.
USIM2_RESET
24
DO
USIM2 reset
P3
Leave this pin floating if it is not
used.
SPI interface
SPI_CLK
84
DO
Clock signal
P2
Leave this pin floating if it is not
used.
SPI_MISO
85
DI
Master input
P2
Leave this pin floating if it is not
used.
SPI_MOSI
86
DO
Master output
P2
Leave this pin floating if it is not
used.
SPI_CS_N
87
DO
Chip select
P2
Leave this pin floating if it is not
used.

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I2C interface
I2C_SCL
82
DO
I2C clock
P2
It is connected through an
internal pull-up resistor. Leave
this pin floating if it is not used.
I2C_SDA
81
B
I2C data
P2
It is connected through an
internal pull-up resistor. Leave
this pin floating if it is not used.
GPIO
GPIO0
62
B
IO
P2
With interrupt
Leave this pin floating if it is not
used.
GPIO1
63
B
IO
P2
With interrupt
Leave this pin floating if it is not
used.
GPIO2
80
B
IO
P2
With interrupt
Leave this pin floating if it is not
used.
GPIO3
96
B
IO
P2
With interrupt
Leave this pin floating if it is not
used.
Audio interfaces
MIC_P
90
AI
MIC input plus
Embedding bias voltage
Leave this pin floating if it is not
used.
MIC_N
89
AI
MIC input minus
Embedding bias voltage
Leave this pin floating if it is not
used.
SPK_P
94
AO
SPK output plus
Leave this pin floating if it is not
used.
SPK_N
92
AO
SPK output minus
Leave this pin floating if it is not
used.
Antenna Interface
ANT
76
Main antenna
50 Ω impedance for traces
Other Interface
RING
13
DO
Incoming call/SMS
P2
Leave this pin floating if it is not

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indicator
used.
NET_LIGHT
83
DO
Network status
indicator
P2
Leave this pin floating if it is not
used.
SLEEP
79
DI
Sleep mode control
P2
Triggered by low level to
control the sleep mode of the
module. Leave this pin floating
if it is not used.
ADC
88
AI
Analog-to-digital
signal conversion
10-bit, detectable voltage
ranging from 0.1 V to 1.7 V
Leave this pin floating if it is not
used.
USB_BOOT
48
DI
Forcible download
mode
P2
Valid at low level
KEYPIN0
15
DI
Keypad input 0
P2
Leave this pin floating if it is not
used.
KEYPIN1
16
DI
Keypad input 1
P2
Leave this pin floating if it is not
used.
KEYPIN2
2
DI
Keypad input 2
P2
Leave this pin floating if it is not
used.
KEYPOUT0
18
DO
Keypad output 0
P2
Leave this pin floating if it is not
used.
KEYPOUT1
19
DO
Keypad output 1
P2
Leave this pin floating if it is not
used.
KEYPOUT2
25
DO
Keypad output 2
P2
Leave this pin floating if it is not
used.
Reserved Pins
RESERVED
3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 34, 43, 50, 54, 55,
56, 57, 58, 59, 60, 61, 64, 65, 66, 67, 68, 71, 72,
73, 78
NC

N51
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3 Application Interfaces
N51 provides power supply, control, communications, peripheral, audio, RF, and other interfaces to
meet customers requirements in different application scenarios.
This chapter describes how to design each interface and provides reference designs and guidelines.
3.1 Power Interfaces
The schematic design and PCB layout of the power supply part is the most critical process in
application design and they will determine the performance of customers application. Please read the
design precaution of power supply and comply with the correct design principles to obtain the optimal
circuit performance.
Signal
Pin
I/O
Function
Remarks
VBAT
27, 28, 29
PI
Main power
supply input
3.3 V~4.3 V (TYP: 3.8 V)
VDD_1P8
45
PO
1.8 V power
output
Output 50 mA at most, used only for level
shifting.
Add ESD protector when using this pin.
VDDIO
53
PO
LDO power
output
Output voltage configurable, 1.8 V by default
Output 180 mA at most
Add ESD protector when using this pin.
GND
1, 14, 17, 20, 26, 30, 31, 44, 49, 74,
75, 77, 91, 93, 95, 97, 98, 99, 100
Ensure that all GND pins are connected to
the ground.
3.1.1 VBAT
The power supply design covers two parts: schematic design and PCB layout..
Schematic Design
Design the circuit of the power supply for N51 based on the input voltage you choose. Generally there
are two types of input voltages:
3.3V-4.3 V (3.8 V typically, output by battery)

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4.3V-5.5 V (5.0 V typically, output by rectifier inside a computer)
Figure 3-1 shows the reference design recommended for 3.3V-4.3 V input.
Figure 3-1 Reference design 1
Power Supply N51
Close to the pin of the module
VBAT
Test point
I_max
D100 C104C103C102C101
C100
470 uF 10 uF 0.1 uF 100 pF 33 pF
The protection voltage at D100 should not exceed the maximum input voltage the module can
bear. Place TVS close to the input interface of the power supply to clamp the surge voltage
before it enters back-end circuits. Therefore, the back-end components and the module are
protected.
Place capacitors C100 to C104 close to the module.
A large bypass tantalum capacitor (220 μF or 100 μF) or aluminum capacitor (470 μF or 1000
μF) is expected at C100 to reduce voltage drops during bursts. Its withstand voltage should be
larger than 1.5 times of the voltage across the power supply.
Select a ceramics capacitor at C101 to filter out noise and reduce voltage drops during bursts.
Place C102 to C104, bypass capacitors of low-ESR, close to the module to filter out high-
frequency noise from the power supply.
A controllable power supply is preferable if used in harsh conditions. Figure 3-2 shows the
recommended schematic design.
Figure 3-2 Reference design 2
S
G
D
Q101
Q100
B
C
E
VIN (3.8V) VBAT
PWR_EN
C105 R100 C111C110C109C108C107 C106
R102
R101
D101
10 uF 0.1 uF 10 kΩ
47 kΩ
10 uF 0.1 uF 100 pF 33 pF470 uF
4.7 kΩ