Neoway N58 Installation manual

Hardware User Guide
Issue 1.0 Date 2020-06-15

N58 Mini PCIe (Audio) Hardware User Guide
Copyright
Copyright © Neoway Technology Co., Ltd
i
Copyright © Neoway Technology Co., Ltd 2020. All rights reserved.
No part of thisdocument may bereproduced or transmitted in any formor by any means without prior written
consent of Neoway Technology Co., Ltd.
is the trademark of Neoway Technology Co., Ltd.
All other trademarks and trade names mentioned in this document are the property of their respective
holders.
Notice
This document provides a guide for users to use N58 Mini PCIe (Audio).
This document is intended for system engineers (SEs), development engineers, and test engineers.
THIS GUIDE PROVIDES INSTRUCTIONS FOR CUSTOMERS TO DESIGN THEIR APPLICATIONS.
PLEASE FOLLOW THE RULES AND PARAMETERS IN THIS GUIDE TO DESIGN AND COMMISSION.
NEOWAY WILL NOT TAKE ANY RESPONSIBILITY OF BODILY HURT OR ASSET LOSS CAUSED BY
IMPROPER OPERATIONS.
THE INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE DUE TO
PRODUCT VERSION UPDATE OR OTHER REASONS.
EVERY EFFORT HAS BEEN MADE IN PREPARATION OF THIS DOCUMENT TO ENSURE ACCURACY
OF THE CONTENTS, BUT ALL STATEMENTS, INFORMATION, AND RECOMMENDATIONS IN THIS
DOCUMENT DO NOT CONSTITUTE A WARRANTY OF ANY KIND, EXPRESS OR IMPLIED.
Neoway provides customers complete technical support. If you have any question, please contact your
account manager or email to the following email addresses:
[email protected]
[email protected]
Website: http://www.neoway.com

N58 Mini PCIe (Audio) Hardware User Guide
Contents
Copyright © Neoway Technology Co., Ltd
ii
Contents
About This Document ...................................................................................vi
Scope .................................................................................................................................................vi
Audience ............................................................................................................................................vi
Change History...................................................................................................................................vi
Conventions .......................................................................................................................................vi
Related Documents...........................................................................................................................vii
1 Introduction................................................................................................8
1.1 Overview ...................................................................................................................................... 8
1.2 Block Diagram.............................................................................................................................. 8
1.3 Basic Features ........................................................................................................................... 10
2 Module Pins.............................................................................................12
2.1 Pin Layout .................................................................................................................................. 12
2.2 Pin Description ........................................................................................................................... 13
3 Application Interfaces ..............................................................................16
3.1 Power Interface .......................................................................................................................... 16
3.1.1 VBAT.................................................................................................................................. 16
3.1.2 VREG_1V8 ........................................................................................................................ 17
3.2 Control Interfaces....................................................................................................................... 18
3.2.1 PON_RESET..................................................................................................................... 18
3.2.2 WAKEUP_IN...................................................................................................................... 19
3.3 Peripheral Interfaces .................................................................................................................. 19
3.3.1 USB ................................................................................................................................... 19
3.3.2 UART................................................................................................................................. 20
3.3.3 USIM.................................................................................................................................. 22
3.4 Audio Interface ........................................................................................................................... 23
3.4.1 Analog Audio Input Interfaces............................................................................................ 23
3.4.2 Analog Audio Output Interfaces......................................................................................... 25
3.5 PCM Interface ............................................................................................................................ 26
3.6 Other Functional Interfaces........................................................................................................ 26
3.6.1 W_DISABLE...................................................................................................................... 27
3.6.2 WAKEUP_OUT ................................................................................................................. 27
3.6.3 LED_WWAN ...................................................................................................................... 27
4 Antenna Interface ....................................................................................28
4.1 Interface Type............................................................................................................................. 28
4.2 GNSS Antenna........................................................................................................................... 28
4.3 RF Connector............................................................................................................................. 30
5 Electric Feature and Reliability ................................................................31
5.1 Electric Features ........................................................................................................................ 31
5.2 Temperature Features................................................................................................................ 32

N58 Mini PCIe (Audio) Hardware User Guide
Contents
Copyright © Neoway Technology Co., Ltd
iii
5.3 ESD Protection........................................................................................................................... 32
6 RF Features.............................................................................................33
6.1 Operating Bands ........................................................................................................................ 33
6.2 TX Power and RX Sensitivity ..................................................................................................... 34
6.3 GNSS Features.......................................................................................................................... 35
7 Mechanical Features ...............................................................................37
7.1 Dimensions................................................................................................................................. 37
7.2 Label........................................................................................................................................... 38
7.3 Packing....................................................................................................................................... 38
7.4 Storage....................................................................................................................................... 39
8 Mounting..................................................................................................40
9 Safety Recommendations .......................................................................41
Abbreviation.............................................................................................42

N58 Mini PCIe (Audio) Hardware User Guide
Table of Figures
Copyright © Neoway Technology Co., Ltd
iv
Table of Figures
Figure 1-1 Block Diagram .................................................................................................................. 9
Figure 2-1 N58 Mini PCIe pin definition ........................................................................................... 12
Figure 2-2 Pin description ................................................................................................................ 13
Figure 3-1 Recommended design 1................................................................................................. 17
Figure 3-2 Reset control by button................................................................................................... 18
Figure 3-3 Reset circuit with triode separating................................................................................. 18
Figure 3-4 N58 Mini PCIe reset process.......................................................................................... 19
Figure 3-5 USB connection.............................................................................................................. 20
Figure 3-6 UART connection............................................................................................................ 21
Figure 3-7 Recommended level shifting circuit 1 ............................................................................. 21
Figure 3-8 Reference design of USIM card interface....................................................................... 22
Figure 3-9 Reference design of differential MIC input ..................................................................... 24
Figure 3-10 Schematic of differential SPK output ............................................................................ 25
Figure 3-11 PCM connection............................................................................................................ 26
Figure 3-12 LED_WWAN reference design ..................................................................................... 27
Figure 4-1 N58 Mini PCIe antenna interface.................................................................................... 28
Figure 4-2 Internal GNSS RF circuit ................................................................................................ 29
Figure 4-3 Active antenna connection.............................................................................................. 29
Figure 4-4 Encapsulation specifications of Murata RF connector ................................................... 30
Figure 7-1 N58 Mini PCIe dimensions (Unit: mm) ........................................................................... 37
Figure 7-2 N58 label......................................................................................................................... 38
Figure 7-3 Packaging process ......................................................................................................... 39
Figure 8-1 Mini PCIe connector ....................................................................................................... 40

N58 Mini PCIe (Audio) Hardware User Guide
Table of Tables
Copyright © Neoway Technology Co., Ltd
v
Table of Tables
Table 1-1 Variant and frequency bands.............................................................................................. 8
Table 2-1 IO definition ...................................................................................................................... 13
Table 5-1 Operating conditions of N58 Mini PCIe ............................................................................ 31
Table 5-2 Current consumption of N58 Mini PCIe (Typical)............................................................. 31
Table 5-3 Temperature feature of N58 Mini PCIe............................................................................. 32
Table 5-4 N58 Mini PCIe ESD protection......................................................................................... 32
Table 6-1 Operating bands of N58 Mini PCIe .................................................................................. 33
Table 6-2 RF TX power of N58 Mini PCIe........................................................................................ 34
Table 6-3 N58 Mini PCIe GSM RX sensitivity .................................................................................. 34
Table 6-4 N58 Mini PCIe LTE RX sensitivity .................................................................................... 35
Table 6-5 GNSS Feature.................................................................................................................. 35

N58 Mini PCIe (Audio) Hardware User Guide
About This Document
Copyright © Neoway Technology Co., Ltd
vi
About This Document
Scope
This document is applicable to N58 Mini PCIe.
It defines the feature, indicators, and test standards of the N58 mini PCIe and provides a reference for
the hardware design of each interface.
Audience
This document is intended for system engineers (SEs), development engineers, and test engineers.
Change History
Issue
Date
Change
Changed By
1.0
2020-05
Initial draft
Wu Wentao
Conventions
Symbol
Indication
This warning symbol means danger. You are in a situation that could cause fatal
device damage or even bodily damage.
Means reader be careful. In this situation, you might perform an action that could
result in module or product damages.
Means note or tips for readers to use the module

N58 Mini PCIe (Audio) Hardware User Guide
About This Document
Copyright © Neoway Technology Co., Ltd
vii
Related Documents
Neoway_N58 Mini PCIe (Audio)_ Product_Specifications
Neoway_N58_AT_Command_Mannual

N58 Mini PCIe (Audio) Hardware User Guide
Chapter 1 Introduction
Copyright © Neoway Technology Co., Ltd
8
1 Introduction
N58 is an industrial 4G module that is developed on UNISOC chipset. Its dimensions are 30 mm x 28
mm x 2.6 mm. This high-performance cellular module supports GSM, LTE-FDD, LTE-TDD (Cat 1)
network modes and provides various hardware interfaces. It facilitates the application development for
customers and applies to various IoT communication devices such as AMR, POC, POS, etc.
N58 Mini PCIe is implemented on N58 and complies with PCI Express Mini Card 1.2 standard. It
provides multiples functional interfaces to simplify customers’ development. N58 Mini PCIe applies to
various kinds of IoT communication devices such as video surveillance, laptops, in-vehicle devices,
and wireless routers.
1.1 Overview
N58 Mini PCIe provides different hardware variants with the optional functions such as AUDIO and
GNSS. You can choose one based on your demands. Table 1-1 lists the bands that each variant
supports.
Table 1-1 Variant and frequency bands
Variant
Category
Band
GNSS1
CODEC
N58-CA
Cat1
FDD-LTE: B1, B3, B5, B8,
TDD-LTE: B34, B39, B40, B41
GSM/GPRS: 900/1800 MHz
Optional
Support
N58-EA
Cat1
FDD-LTE: B1, B3, B5, B7, B8, B20, B28
TDD-LTE: B38, B40, B41
GSM/GPRS: 900/1800 MHz
Optional
Support
N58-LA
Cat1
FDD-LTE: B1, B2, B3, B4, B5, B7, B8, B28, B66
TDD-LTE: B38, B40, B41
GSM/GPRS: 850/900/1800/1900 MHz
Optional
Support
1.2 Block Diagram
N58 Mini PCIe consists of the following functionality modules:
1
GNSS is optional for all above variants.

N58 Mini PCIe (Audio) Hardware User Guide
Chapter 1 Introduction
Copyright © Neoway Technology Co., Ltd
9
⚫N58 module
⚫Power management unit
⚫RF section
⚫Digital interfaces (SIM1, PCM*, UART, USB, VREG_1V8, Wake up*, etc)
⚫Analog interfaces (MIC, SPK)
⚫SIM2 circuit (including a Micro-SIM card slot )
Figure 1-1 Block Diagram
Mini PCIE interfaces
VBAT
For GNSS
N58
Moudle
Wake
Up
VREG
_1V8
W_DI
SAB
LE
UARTV_MAIN MIC SPK Reset USB WAKE
UP_O
UT
PCM
LED
RF interfaces
LDO
ANT_MAIN
ANT GNSS
_
SIM2
(Micro-SIM)
SIM1
* indicates functions that will be developed in the future.
LDO supplies 3.3V for external active GNSS antenna.

N58 Mini PCIe (Audio) Hardware User Guide
Chapter 1 Introduction
Copyright © Neoway Technology Co., Ltd
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1.3 Basic Features
Parameter
Description
Dimensions
51 mm x 30.2 mm x 5.3mm
Temperature ranges
Operating: -30°C to +75°C
Extended: -35°C to +85°C
Storage: -40°C to +90°C
Operating voltage
V_MAIN: 3.4V to 4.2V input, Typ. 3.8V
VREG_1V8: 1.8V output, 50 mA at most
Operating current2
Sleep3<TBD
Idle<TBD
Operating mode (LTE networks)
Current in data service: TBD
Current in max. RX power: TBD
Processor
ARM Cortex-A5 processor, 500 MHz main frequency, 32KB L1 cache
Memory
RAM: 128Mb
ROM: 64Mb
Band
See Table 1-1
Wireless rate
GPRS: Max 85.6Kbps(DL) / Max 85.6Kbps(UL)
FDD-LTE: Cat1, Max 10Mbps(DL)/Max 5Mbps(UL)
TDD-LTE: Cat1, Max 8.96Mbps(DL)/Max2Mbps(UL)
Transmit power
GSM850:+33dBm (Power Class 4)
EGSM900:+33dBm (Power Class 4)
DCS1800:+30dBm (Power Class 1)
PCS1900:+30dBm (Power Class 1)
LTE:+23dBm (Power Class 3)
Application interfaces
2G/4G antenna, GNSS antenna
50Ωimpedance
One UART interface, 2Mbps
One USIM interface, 1.8V/3.0V
One USB2.0 high-speed interface
One PCM interface*
One WAKEUP_IN interface, used to control sleep mode of the module.
2
The table only lists the operating currents of LTE band1 and band41, for the operating currents of the other network
modes in different states, see the N58 Mini PCIe Current Test Report.
3
Sleep mode needs to supported by software and hardware simultaneously.

N58 Mini PCIe (Audio) Hardware User Guide
Chapter 1 Introduction
Copyright © Neoway Technology Co., Ltd
11
One W_DISABLE interface, used to disable RF communication of the
module.
One WAKEUP_OUT interface, used to indicate whether the module is in
sleep mode.
One PON_RESET interface, used to reset the module.
One network indicator control interface, used to control the network
indicator.
One MIC differential analog audio interface
One SPK differential analog audio interface
AT Command
⚫3GPP Release 13
⚫Neoway extended commands
Data
PPP, RNDIS, ECM
Protocol
TCP*, UDP*, MQTT, FTP/FTPS, HTTP/HTTP(S), SSL, TLS
Certification approval
CCC, SRRC, RoSH, CE
* indicates functions that will be supported in the future.

N58 Mini PCIe (Audio) Hardware User Guide
Chapter 2 Module Pins
Copyright © Neoway Technology Co., Ltd
12
2 Module Pins
2.1 Pin Layout
N58 Mini PCIe provides 52 pins and their definitions meet the standard of Mini PCI Express. Figure 2-
1 shows the pin definitions.
Figure 2-1 N58 Mini PCIe pin definition
1
9
7
5
3
15
13
11
2
10
8
6
4
16
14
12
17
25
23
21
19
31
29
27
33
41
39
37
35
47
45
43
51
49
18
26
24
22
20
32
30
28
34
42
40
38
36
48
46
44
52
50
TOP BOT
Signal Pin
MIC_P 1
MIC_N 3
SPK_P 5
SPK_N 7
GND 9
VREG_1V8 11
NC 13
GND 15
NC 17
WAKEUP_IN 19
GND 21
UART_RX 23
UART_RTS 25
GND 27
GND 29
UART_TX 31
PON_RESET 33
GND 35
GND 37
V_MAIN 39
V_MAIN 41
GND 43
PCM_CLK 45
PCM_DIN 47
PCM_DOUT 49
PCM_SYNC 51
SignalPin
V_MAIN2
GND4
NC6
V_USIM8
USIM_DATA10
USIM_CLK12
USIM_RST14
NC16
GND18
W_DISABLE20
PON_RESET22
V_MAIN24
GND26
UART_CTS28
NC30
WAKEUP_OUT32
GND34
USB_D-36
USB_D+38
GND40
LED_WWAN42
USIM_DETECT44
NC46
NC48
GND50
V_MAIN52

N58 Mini PCIe (Audio) Hardware User Guide
Chapter 2 Module Pins
Copyright © Neoway Technology Co., Ltd
13
2.2 Pin Description
Table 2-1 lists the definition of IO types.
Table 2-1 IO definition
IO Type
B
Digital input/output, COMS logic level
DO
Digital output, COMS logic level
DI
Digital input, COMS logic level
OC
Open collector
PO
Power output
PI
Power supply input
AO
Analog output
AI
Analog input
AIO
Analog input/output
Level Feature
P1
1.8V/3V
1.8V level feature:
VIH=1.26V~2.1V
VIL=-0.3V~0.36V
VOH=1.44V~1.8V
VOL=0V~0.4V
3.0V level feature
VIH=2V~3.15V
VIL=-0.3V~0.57V
VOH=2.59V~2.96V
P3
1.8V digital IO
VIHmin=1.2V
VILmax= 0.3V
VOHmin=1.35V
VOLmax=0.45V
P6
Voltage type of USB2.0 data interfaces
Vmin=2.97V,
Vmax=3.5V,
Vtyp=3.08V
Figure 2-2 Pin description
Signal
Pin
I/O
Function
Level
Feature
Remarks
Power interface
V_MAIN
2, 24, 39,
41, 52
PI
Main power
supply input
Vmin=3.4V
Vtyp=3.8V
Vmax=4.2V
Supply more than 3A
current
VREG_1V8
11
PO
1.8V power
output
Vnorm=1.8V
Imax=50mA
Used only for level shifting
and IO power supply.

N58 Mini PCIe (Audio) Hardware User Guide
Chapter 2 Module Pins
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14
Leave this pin floating if it is
not used.
GND
4, 9, 15, 18, 21, 26, 27, 29, 34, 35, 37, 40, 43, 50
Ensure that all GND pins
are connected to the
ground.
Control Interfaces
PON_RESET
22, 33
DI
Module reset
input
Triggered by a low level to
reset the module.
WAKEUP_IN
19
DI
Sleep control
input
P3
This pin function needs to
be used together with AT
commands.
UART interfaces
UART_TX
31
DO
Data transmitting
P3
Max speed: 2 Mbps
UART_RX
23
DI
Data receiving
P3
Max speed: 2 Mbps
UART_CTS
28
DI
The customer
enables the
module to send
data.
P3
Leave this pin floating if it is
not used.
UART_RTS
25
DO
The module
requests the
customer to send
data.
P3
Leave this pin floating if it is
not used.
USIM1 interface
V_USIM
8
PO
USIM power
output
P1
1.8V/3.0V SIM cards are
supported.
USIM_DATA
10
B
USIM data IO
P1
It should be connected to
V_USIM through a 10 kΩ
pull-up resistor.
USIM_CLK
12
DO
USIM clock
output
P1
USIM_RST
14
DO
USIM reset
P1
USIM_DETECT
44
DI
USIM detect
P1
USB interface
USB_D-
36
AIO
USB data minus
P6
Route DM and DP signals
in differential mode, and
control impedance of 90Ω
Leave this pin floating if it is
not used.
USB_D+
38
AIO
USB data plus
P6

N58 Mini PCIe (Audio) Hardware User Guide
Chapter 2 Module Pins
Copyright © Neoway Technology Co., Ltd
15
Audio SPK interface
SPK_P
5
AO
SPK signal
positive
SPK_N
7
AO
SPK signal
negative
Audio MIC interface
MIC_P
1
AI
MIC signal positive
MIC_N
3
AI
MIC signal negative
PCM interface
PCM_CLK
45
B
PCM clock signal
P3
In development
PCM_DIN
47
DI
PCM data input
P3
PCM_DOUT
49
DO
PCM data output
P3
PCM_SYNC
51
B
PCM frame
synchronization
signal
P3
Other interfaces
W_DISABLE
20
DI
Disable RF
communication
P3
In development
WAKEUP_OUT
32
DO
Indicates
whether the
module is in
sleep mode
P3
In development
LED_WWAN
42
OC
Network indicator
control
P3
Leave this pin floating if it is
not used.
Unused interface
NC
6, 13, 16, 17, 30, 46, 48
Leave these pins floating.

N58 Mini PCIe (Audio) Hardware User Guide
Chapter 3 Application Interfaces
Copyright © Neoway Technology Co., Ltd
16
3 Application Interfaces
N58 Mini PCIe provides power supply, control, communications, peripheral, audio, LCD, RF, and other
interfaces to meet customers' requirements in different application scenarios.
This chapter describes how to design each interface and provides reference designs and guidelines.
3.1 Power Interface
The schematic design and PCB layout of the power supply part are the most critical process in
application design and they will determine the performance of customers’ applications. Please read the
design guidelines of power supply and comply with the correct design principles to obtain the optimal
circuit performance.
Signal
Pin
I/O
Function
Remarks
V_MAIN
2,24,39,41,52
PI
Main power supply
input
3.4V to 4.2V (Typ. 3.8V)
VREG_1V8
11
PO
1.8V power output
Vnorm=1.8V
Imax=50 mA
GND
4, 9, 15, 18, 21, 26, 27, 29, 34, 35, 37, 40, 43, 50
Ensure that all GND pins are
connected to ground.
3.1.1 VBAT
The power supply design covers two parts: schematic design and PCB layout.
Schematic Design
N58 Mini PCIe supports a power supply of 3.4V to 4.2V (3.8 V typically)
Figure 3-1 shows the schematic design recommended.

N58 Mini PCIe (Audio) Hardware User Guide
Chapter 3 Application Interfaces
Copyright © Neoway Technology Co., Ltd
17
Figure 3-1 Recommended design 1
Power N58 Mini PCIe
D1 C1 C2 C3 C4
Close to the pin of the module
V_MAIN
Test point
I_max
C5
⚫The maximum input voltage for the module is 4.2V and the typical value is 3.8 V. The
recommended VBAT trace is wider than 3 mm on the PCB.
⚫TVS D1 with surge protection, VRWM=4.5V, Ppp=2800W. Place TVS close to the input interface
of the power supply to clamp the surge voltage before it enters back-end circuits. Therefore, the
back-end components and the module are protected.
⚫A large bypass aluminum capacitor (470 μF or 220 μF) or tantalum capacitor (220 μF or 100 μF)
is expected at C1 to reduce voltage drops during bursts. Its maximum safe operating voltage
should be greater than 1.5 times the voltage across the power supply.
⚫Place a bypass capacitor of low-ESR close to the module to filter out high-frequency jamming
from the power supply.
In GSM/GPRS mode, RF data is transmitted in burst mode that generates voltage drops on the power supply.
Furthermore, this results in a 216 Hz TDD noise through the power and the transient peak current is larger than
3.0 A. Ensure low resistance of power supply trace in design to avoid voltage drop.
Never use a diode to make the drop voltage between a higher input and module power. Otherwise, Neoway will
not provide a warranty for product issues caused by this. In this situation, the diode will obviously decrease the
module performances, or result in unexpected restarts, due to the forward voltage of the diode will vary greatly in
different temperature and current. The module might not work properly with a diode power supply. )
3.1.2 VREG_1V8
N58 Mini PCIe provides one VREG_1V8 pin that outputs 1.8V@50mA.
VREG_1V8 is enabled automatically when the module is awake or in a running state.
It is recommended that VREG_1V8 is used for level shift only and an ESD protector should be reserved.

N58 Mini PCIe (Audio) Hardware User Guide
Chapter 3 Application Interfaces
Copyright © Neoway Technology Co., Ltd
18
3.2 Control Interfaces
Signal
Pin
I/O
Function
Remarks
PON_RESET
22, 33
DI
Module reset input
Trigger by a low level
WAKEUP_IN
19
DI
Sleep mode input
Leave this pin floating if it is not used.
3.2.1 PON_RESET
PON_RESET is used to reset the module. When the module is working, inputting a negative pulse for
more than 50 ms to RESET_N can trigger the reset process of the module. RESET_N is pulled up
internally. Its typical high-level voltage is 3.3V. Leave this pin floating if not used.
If you use a 1.8V/2.8V/3.0V IO system, it is recommended to add a triode to separate it. Refer to the
following designs. To reset the module through a high level, refer to Figure 3-3.
Figure 3-2 Reset control by button
N58 Mini PCIe
PON_RESET
S1kΩ
Figure 3-3 Reset circuit with triode separating
R1
4.7kΩ
R2
47kΩ
Q1
PON_RESET_CONTROL
PON_RESET
N58 Mini PCIe

N58 Mini PCIe (Audio) Hardware User Guide
Chapter 3 Application Interfaces
Copyright © Neoway Technology Co., Ltd
19
The following figure shows the reset process of N58 Mini PCIe.
Figure 3-4 N58 Mini PCIe reset process
VBAT
Inactive Active
50ms
USB
All Interfaces
_
RESET N
3.2.2 WAKEUP_IN
The WAKEUP_IN pin is used to control sleep mode together with AT command.
Common sleep and wakeup functions are supported. You can set the function in software as required.
3.3 Peripheral Interfaces
N58 Mini PCIe provides various peripheral interfaces.
3.3.1 USB
Signal
Pin
I/O
Function
Remarks
USB_D-
36
AIO
USB data minus
USB2.0, used for firmware download and
data transmission.
90Ωimpedance for differential traces.
USB_D+
38
AIO
USB data plus
USB can be used to download firmware for N58 Mini PCIe and establish data communication for
commissioning. The recommended USB circuit is shown in Figure 3-5.