Neoway N720 Installation manual

N720 OpenLinux
Hardware User Guide
Issue 1.4
Date 2019-03-25
Neoway Product Document

N720 OpenLinux
Hardware User Guide
Copyright © Neoway Technology Co., Ltd
i
Copyright © Neoway Technology Co., Ltd 2019. All rights reserved.
No part of this document may be reproduced or transmitted in any form or by any means without prior written
consent of Neoway Technology Co., Ltd.
is the trademark of Neoway Technology Co., Ltd.
All other trademarks and trade names mentioned in this document are the property of their respective
holders.
Notice
This document provides guide for users to use N720 OpenLinux.
This document is intended for system engineers (SEs), development engineers, and test engineers.
THIS GUIDE PROVIDES INSTRUCTIONS FOR CUSTOMERS TO DESIGN THEIR APPLICATIONS.
PLEASE FOLLOW THE RULES AND PARAMETERS IN THIS GUIDE TO DESIGN AND COMMISSION.
NEOWAY WILL NOT TAKE ANY RESPONSIBILITY OF BODILY HURT OR ASSET LOSS CAUSED BY
IMPROPER OPERATIONS.
THE INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE DUE TO
PRODUCT VERSION UPDATE OR OTHER REASONS.
EVERY EFFORT HAS BEEN MADE IN PREPARATION OF THIS DOCUMENT TO ENSURE ACCURACY
OF THE CONTENTS, BUT ALL STATEMENTS, INFORMATION, AND RECOMMENDATIONS IN THIS
DOCUMENT DO NOT CONSTITUTE A WARRANTY OF ANY KIND, EXPRESS OR IMPLIED.
Neoway provides customers complete technical support. If you have any question, please contact your
account manager or email to the following email addresses:
[email protected]
[email protected]
Website: http://www.neoway.com

N720 OpenLinux
Hardware User Guide
Copyright © Neoway Technology Co., Ltd
ii
Contents
1 About N720 OpenLinux ............................................................................. 1
1.1 Product Overview......................................................................................................................... 1
1.2 Block Diagram.............................................................................................................................. 2
1.3 Basic Features ............................................................................................................................. 3
2 Module Pins............................................................................................... 6
2.1 Pad Layout ................................................................................................................................... 6
3 Application Interfaces .............................................................................. 15
3.1 Power Interface .......................................................................................................................... 15
3.1.1 VBAT.................................................................................................................................. 15
3.1.2 VDD_1P8........................................................................................................................... 19
3.2 Control Interfaces....................................................................................................................... 20
3.2.1 PWRKEY_N ...................................................................................................................... 20
3.2.2 RESET_N .......................................................................................................................... 23
3.3 Peripheral Interfaces .................................................................................................................. 24
3.3.2 USB ................................................................................................................................... 24
3.3.3 USIM.................................................................................................................................. 26
3.3.4 UART................................................................................................................................. 27
3.3.5 SDC ................................................................................................................................... 31
3.3.6 I2S/PCM ............................................................................................................................ 35
3.3.7 SPI..................................................................................................................................... 39
3.3.8 I2C ..................................................................................................................................... 41
3.4 Network and Connection............................................................................................................ 45
3.4.1 Ethernet ............................................................................................................................. 45
3.4.2 WLAN ................................................................................................................................ 48
3.4.3 Bluetooth ........................................................................................................................... 51
3.5 RF Interface................................................................................................................................ 52
3.5.1 ANT_MAIN/ANT_DIV antenna interface ........................................................................... 53
3.5.2 ANT_GNSS Interface ........................................................................................................ 55
3.5.3 Antenna Assembling.......................................................................................................... 58
3.6 GPIO .......................................................................................................................................... 59
3.7 MUX Interfaces .......................................................................................................................... 60
3.8 Other Interfaces ......................................................................................................................... 63
3.8.1 GNSS_LNA_EN ................................................................................................................ 63
3.8.2 ADC ................................................................................................................................... 63
3.8.3 RING.................................................................................................................................. 63
3.8.4 DTR ................................................................................................................................... 64
3.8.5 USB_BOOT ....................................................................................................................... 66
4 Electric Feature and Reliability ................................................................ 67
4.1 Electric Features ........................................................................................................................ 67
4.2 Temperature Features................................................................................................................ 67

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Hardware User Guide
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4.3 ESD Protection........................................................................................................................... 68
5 RF Features............................................................................................. 69
5.1 Operating Bands ........................................................................................................................ 69
5.2 TX Power and RX Sensitivity ..................................................................................................... 70
5.3 GNSS Feature............................................................................................................................ 72
6 Mechanical Features ............................................................................... 74
6.1 Dimensions................................................................................................................................. 74
6.2 Label........................................................................................................................................... 75
6.3 Pack ........................................................................................................................................... 75
6.3.1 Tray.................................................................................................................................... 76
6.3.2 Moisture............................................................................................................................. 77
7 Mounting N720 onto the Application Board ............................................. 78
7.1 Bottom Dimensions .................................................................................................................... 78
7.2 Application Foot Print ................................................................................................................. 79
7.3 Stencil......................................................................................................................................... 79
7.4 Solder Paste............................................................................................................................... 79
7.5 SMT Furnace Temperature Curve.............................................................................................. 80
8 Safety Recommendations ....................................................................... 81
A Conformity and Compliance .................................................................... 82
A.1 Approvals ................................................................................................................................... 82
A.2 Chinese Notice........................................................................................................................... 82
A.2.1 CCC Class A Digital Device Notice................................................................................... 82
A.2.2 Environmental Protection Notice....................................................................................... 82
B Abbreviation ............................................................................................ 83

N720 OpenLinux
Hardware User Guide
Copyright © Neoway Technology Co., Ltd
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Table of Figures
Figure 1-1 Block Diagram .................................................................................................................. 3
Figure 2-1 N720 OpenLinux pin definition (Top View) ....................................................................... 6
Figure 3-1 Current peaks and voltage drops ................................................................................... 16
Figure 3-2 Recommended design 1................................................................................................. 16
Figure 3-3 Recommended design 2................................................................................................. 17
Figure 3-4 Recommended design 3................................................................................................. 18
Figure 3-5 Recommended design 4................................................................................................. 18
Figure 3-6 Reference design of startup controlled by button........................................................... 21
Figure 3-7 Reference design of startup controlled by MCU............................................................. 21
Figure 3-8 Reference design of automatic start once powered up .................................................. 21
Figure 3-9 N720 on/off timing........................................................................................................... 22
Figure 3-10 Reset controlled by button............................................................................................ 23
Figure 3-11 Reset circuit with triode separating............................................................................... 23
Figure 3-12 Reset timing of N720 OpenLinux.................................................................................. 23
Figure 3-13 USB connection ............................................................................................................ 25
Figure 3-14 Reference design of USB OTG function....................................................................... 25
Figure 3-15 Reference design of USIM card interface..................................................................... 26
Figure 3-16 Reference design of UART connection (with flow control) ........................................... 28
Figure 3-17 Reference design of UART connection (without flow control) ...................................... 28
Figure 3-18 Recommended level shifting circuit 1........................................................................... 29
Figure 3-19 Recommended level shifting circuit 2........................................................................... 30
Figure 3-20 Recommended level shifting circuit 3........................................................................... 31
Figure 3-21 SD connection .............................................................................................................. 32
Figure 3-22 SDC SDR timing ........................................................................................................... 33
Figure 3-23 SDC DDR timing........................................................................................................... 34
Figure 3-24 I2S connection .............................................................................................................. 35
Figure 3-25 I2S timing...................................................................................................................... 36

N720 OpenLinux
Hardware User Guide
Copyright © Neoway Technology Co., Ltd
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Figure 3-26 PCM connection ........................................................................................................... 37
Figure 3-27 PCM sync signal timing in primary mode ..................................................................... 37
Figure 3-28 PCM data input timing in primary mode ....................................................................... 37
Figure 3-29 PCM data output timing in primary mode ..................................................................... 37
Figure 3-30 PCM sync signal timing in auxiliary mode .................................................................... 38
Figure 3-31 PCM data input timing in auxiliary mode ...................................................................... 38
Figure 3-32 PCM data output timing in auxiliary mode.................................................................... 39
Figure 3-33 SPI connection.............................................................................................................. 40
Figure 3-34 SPI timing ..................................................................................................................... 41
Figure 3-35 I2Cconnection............................................................................................................... 42
Figure 3-36 I2C data transmission................................................................................................... 42
Figure 3-37 I2C timing...................................................................................................................... 43
Figure 3-38 SGMII connection ......................................................................................................... 45
Figure 3-39 Connection between MDIO and PHY........................................................................... 47
Figure 3-40 MDIO input timing......................................................................................................... 47
Figure 3-41 MDIO output timing....................................................................................................... 47
Figure 3-42 WLAN connection ......................................................................................................... 49
Figure 3-43 SDIO SDR timing.......................................................................................................... 50
Figure 3-44 SDIO DDR timing.......................................................................................................... 50
Figure 3-45 Bluetooth connection .................................................................................................... 52
Figure 3-46 L network ...................................................................................................................... 53
Figure 3-47 Split capacitor network.................................................................................................. 53
Figure 3-48 Pi network ..................................................................................................................... 54
Figure 3-49 Recommended RF PCB design 1 ................................................................................ 55
Figure 3-50 Recommended RF PCB design 2 ................................................................................ 55
Figure 3-51 GNSS RF structure....................................................................................................... 55
Figure 3-52 Reference Design of Passive GNSS Antenna.............................................................. 56
Figure 3-53 Reference design of active GNSS antenna.................................................................. 57
Figure 3-54 Reference layout of GNSS antenna traces .................................................................. 58
Figure 3-55 Specifications of MM9329-2700RA1 ............................................................................ 59
Figure 3-56 RF connections............................................................................................................. 59

N720 OpenLinux
Hardware User Guide
Copyright © Neoway Technology Co., Ltd
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Figure 3-57 Pulse wave for an incoming call ................................................................................... 63
Figure 3-58 RING indicator for SMS ................................................................................................ 64
Figure 3-59 Process of entering sleep mode ................................................................................... 64
Figure 3-60 Incoming call service process....................................................................................... 65
Figure 3-61 Outgoing call service process....................................................................................... 65
Figure 3-62 Process of exiting from sleep mode ............................................................................. 65
Figure 3-63 Reference design of USB_BOOT................................................................................. 66
Figure 6-1 N720 dimensions ............................................................................................................ 74
Figure 6-2 N720 Openlinux label ..................................................................................................... 75
Figure 6-3 N720 OpenLinux packing with vacuum bag and tray ..................................................... 76
Figure 6-4 Packaging process ......................................................................................................... 76
Figure 7-1 Bottom view .................................................................................................................... 78
Figure 7-2 Recommended Application Foot Print (Top View) .......................................................... 79
Figure 7-3 SMT furnace temperature curve ..................................................................................... 80

N720 OpenLinux
Hardware User Guide
Copyright © Neoway Technology Co., Ltd
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Table of Tables
Table 1-1 Variant and frequency bands.............................................................................................. 1
Table 2-1 IO types and level features................................................................................................. 7
Table 2-2 Pin Description ................................................................................................................... 8
Table 3-1 VDD_1P8 electrical features ............................................................................................ 20
Table 3-2 Compliant standards of peripheral interfaces................................................................... 24
Table 3-3 SD card feature parameters............................................................................................. 32
Table 3-4 Timing parameters of SDC interface ................................................................................ 34
Table 3-5 Timing parameters of I2S interface .................................................................................. 36
Table 3-6 PCM work modes ............................................................................................................. 36
Table 3-7 Parameters of PCM timing in primary mode .................................................................... 38
Table 3-8 Parameters of PCM timing in auxiliary mode................................................................... 39
Table 3-9 Timing parameters of SPI interface.................................................................................. 41
Table 3-10 I2C feature parameters .................................................................................................. 41
Table 3-11 I2C timing parameters (standard mode)......................................................................... 43
Table 3-12 I2C timing parameters (fast mode)................................................................................. 44
Table 3-13 I2C timing parameters (fast mode plus)......................................................................... 44
Table 3-14 SDIO/WLAN feature parameters.................................................................................... 48
Table 3-15 Timing parameters of SDIO/WLAN interface ................................................................. 50
Table 3-16 MUX pins........................................................................................................................ 60
Table 4-1 Electric features................................................................................................................ 67
Table 4-2 Temperature features ....................................................................................................... 67
Table 4-3 ESD protection features ................................................................................................... 68
Table 5-1 Operating Bands .............................................................................................................. 69
Table 5-2 RF TX power .................................................................................................................... 70
Table 5-3 RF RX sensitivity .............................................................................................................. 71

N720 OpenLinux
Hardware User Guide
Copyright © Neoway Technology Co., Ltd
viii
About This Document
Scope
This document is applicable to N720 OpenLinux series.
It defines the features, indicators, and test standards of the N720 OpenLinux module and provides
reference for the hardware design of each interface.
Reference designs in this document are only for reference. Customers should design applications
based on the actual scenarios and conditions.Please contact Neoway FAE if you have any question or
doubt.
Audience
This document is intended for system engineers (SEs), development engineers, and test engineers.
Change History
Issue
Date
Change
Changed By
1.0
2017-02
Initial draft
Dong Liuting
1.1
2017-04
Updated pin definition and description
Modified the description of reset pin
Updated internal connection of GPS
Dong Liuting
1.2
2017-07
Added LTE B12 for NA variant
Added memory and size tolerance
Modified the description of PWRKEY, RESET, UART,
and VDDIO_1P8
Added MUX description of some pins
Modified description
Dong Liuting
1.3
2018-01
Updated variants and bands
Added GNSS features
Added description of SGMII, WLAN, and SD
interfaces
Dong Liuting

N720 OpenLinux
Hardware User Guide
Copyright © Neoway Technology Co., Ltd
ix
Modified the resistance of a resistor in level shifting
circuit 2.
Modified description
1.4
2019-01
Modified the pin definition according to Neoway
Module Pin Definition
Updated Chapter 3.
Updated the block diagram of N720
Added description of USB OTG
Updated packaging process
Modified description
Dong Liuting
Conventions
Symbol
Indication
This warning symbol means danger. You are in a situation that could cause fatal
device damage or even bodily damage.
Means reader be careful. In this situation, you might perform an action that could
result in module or product damages.
Means note or tips for readers to use the module
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Neoway_N720 OpenLinux_Product_Specifications
Neoway_N720 OpenLinux_User_Manual
Neoway_N720 OpenLinux_SDK_Developer_Guide
Neoway_N720 OpenLinux_Upgrade_Guide
Neoway_N720 OpenLinux_EVK_User_Guide
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