Nokia RH-3 Series User manual

CCS Technical Documentation
RH-3 Series Transceivers
Issue 1 06/2003 Confidential Nokia Corporation
Troubleshooting — BB

RH-3
Troubleshooting — BB CCS Technical Documentation
Page 2 Nokia Corporation Confidential Issue 1 06/2003

CCS Technical Documentation Troubleshooting — BB
RH-3
Issue 1 06/2003 Nokia Corporation Confidential Page 3
Contents Page No
Baseband Troubleshooting............................................................................................. 5
RH-3 Baseband Module Overview ..............................................................................5
HW Architecture ..........................................................................................................6
Flash programming ......................................................................................................6
Connections to Baseband.......................................................................................... 6
Baseband Power Up .................................................................................................. 6
Flash Programming Indication.................................................................................. 6
Flashing..................................................................................................................... 7
Power Up and Reset.................................................................................................. 9
Power up with PWR key......................................................................................... 11
Power up when charger is connected...................................................................... 11
RTC alarm power up............................................................................................... 12
Power off ...................................................................................................................12
Power Consumption and Operation modes ...............................................................12
Power Distribution .....................................................................................................13
Clock Distribution .....................................................................................................14
RFClk (19.2 MHz Analog)...................................................................................... 14
RFConvClk (19.2 MHz digital) .............................................................................. 15
CBUSClk Interface ....................................................................................................15
DBUSClk Interface ................................................................................................. 16
SLEEPClk (Digital)................................................................................................. 17
SLEEPClk (Analog)................................................................................................ 17
Charging operation ....................................................................................................18
Battery..................................................................................................................... 18
Charging circuitry ................................................................................................... 18
Charger Detection ................................................................................................... 19
Charge Control........................................................................................................ 20
Audio .........................................................................................................................20
Display and Keyboard ...............................................................................................20
Accessory ...................................................................................................................21
Test Points .................................................................................................................22
Troubleshooting .........................................................................................................23
Top troubleshooting map ...........................................................................................24
Phone is totally dead ............................................................................................... 26
Flash programming doesn‘t work ........................................................................... 27
Power doesn‘t stay on or the phone is jammed....................................................... 29
Charger.................................................................................................................... 31
Audio faults............................................................................................................. 32
Display faults........................................................................................................... 36
Keypad faults........................................................................................................... 38

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Troubleshooting — BB CCS Technical Documentation
Page 4 Nokia Corporation Confidential Issue 1 06/2003

CCS Technical Documentation Troubleshooting — BB
RH-3
Issue 1 06/2003 Nokia Corporation Confidential Page 5
Baseband Troubleshooting
RH-3 Baseband Module Overview
The Baseband module of the RH-3 transceiver is a CDMA dual-band engine. The base-
band architecture is based on the other CDMA DCT4 phones, including NHP-2 and
NPD-1, with a few modifications to support the RH-3 specific features (the new Path-
finder RF and GPS, which is reused from the NPD-4 program).
RH-3 cellular baseband consists of three ASICs: Universal Energy Management (UEM),
Universal Phone Processor (UPP), and FLASH 64Megabit. There is a fourth BB ASIC imple-
menting the GPS receiver in the phone.
The baseband architecture supports a power-saving function called sleep mode. This
sleep mode shuts off the VCTCXO, which is used as system clock source for both RF and
baseband. During the sleep mode, the system runs from a 32 kHz crystal and all the RF
regulators (VR1A, VR1B, VR2, … VR7) are off. The sleep time is determined by network
parameters. Sleep mode is entered when both the MCU and the DSP are in standby mode
and the normal VCTCXO clock is switched off. The phone is waken up by a timer running
from this 32 kHz clock supply. The period of the sleep/wake up cycle (slotted cycle) is
1.28N seconds, where N= 0, 1, 2, depending on the slot cycle index.
RH-3 supports standard Nokia 2-wire and 3-wire chargers (ACP-x and LCH-x). However,
the 3-wire chargers are treated as 2-wire chargers. The PWM control signal for control-
ling the three-wire charger is ignored. UEM ASIC and EM SW control charging.
BL-5C Li-ion battery is used as main power source for RH-3. BL-5C belongs to the new
family of Lynx batteries. One of the biggest differences between the Lynx and the older
batteries is that the temperature sensor for the battery has been removed from the bat-
terypck and is placed in the phone. BL-5C has nominal capacity of 850 mAh.
RH-3 supports Tomahawk accessories. The system connector for the RH-3 phones is
14-pin Tomahawk connector. The accessories supported include headset (HDB-4), loopset
(LPS-4), HF Basic Car Kit (BHF-1), advanced Car Kit (CarK-126), data cable (DKU-5), and
the data/Flash cable (DKU-5F). The detection is based on the digital ID read from the
accessories. For detail information, please refer HDca2 BB module specification
(DHX01477-EN).

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Page 6 Nokia Corporation Confidential Issue 1 06/2003
HW Architecture
Figure 1: RH-3/RH-3P Top-level Diagram
Flash programming
Connections to Baseband
The Flash programming equipment is connected to the baseband using test pads for gal-
vanic connection. The test pads are allocated in such a way that they can be accessed
when the phone is assembled. The flash programming interface uses the VPP, FBUSTX,
FBUSRX, MBUS, and BSI connections for the connection to the baseband. The connection
is through the UEM, which means that the logic levels are corresponding to 2.7V. Power
is supplied using the battery contacts.
Baseband Power Up
The baseband power is controlled by the flash prommer in production and in re-pro-
gramming situations. Applying supply voltage to the battery terminals the baseband will
power up. Once the baseband is powered, flash-programming indication is done as
described in the following section.
Flash Programming Indication
Flash programming is indicated to the UPP using MBUSRX signal between UPP and UEM.
The MBUS signal from the baseband to the flash prommer is used as clock for the syn-
chronous communication. The flash prommer keeps the MBUS line low during UPP boot
to indicate that the flash prommer is connected. If the UPP MBUSRX signal is low on
UPP, the MCU enters flash programming mode. In order to avoid accidental entry to the
flash-programming mode, the MCU only waits for a specified time to get input data from
the flash prommer. If the timer expires without any data being received, the MCU will
JEDI_B
CELL/PCS: Modulator,
Upconverter, Driver
VHF PLL
UHF PLL
VHF VCO
Det_Buffer
Tomahawk
connector
UPP8M
UEM
Regulated supplies
& IQ Signals
Flash
AudioConv
CBus
RFConvClk
DBus
FlsCtrl
VCore
3
3
2
SleepX
LCD/
Keypad
4
YODA
IFVGA, IQ Demod,
BB Filters, VHF VCO
& VHF PLL
MBus
FBus
2
2
UEMInt
PURX
SleepClk
AuxDa
16
8
VIO
2
2
Ostrich
Conn.
SIMIF
VIO
KLight/DLight/CalLED
PwrOnX
3LS
2
3
9
7JTAG
Conn.
RX IF AGC PDM
KeyB[10:0]
LCDCtrl
11
3
OSC1
OSC2 32 Khz
XEAR XMIC
Charger 2
2 2
19.2MHz
VCTCXO
ALFRED
LNA, RFA,
mixer & IFA
Isolator
Cellular
Duplexer
External
Antenna
PCS
Duplexer
Cellular
PCS
Isol ator
Orca
Cell PA
TX IF AGC PDM
Power
Detector
PATemp
RFBus
TX RF AGC PDM
TX_GATE
4 4 3
4RxIQD
TxIQD
P_DET
PA_TEMP
AFC_DAC
RxIQ
VBat
BSI
BTemp
2.8-4.2v
PWR_OUT
183.6 IF
TxIQ
SPDT
Internal
Antenna
RH-3 Dual Band CDMA + GPS
Shamu
PCS PA
MBus
FBus
ExtAd[23:16]
ExtAdDa[15:0]
STIBus
JTAG
VCore
FIL_SEL1 & 2
PCS UHF
VCO
TX VHF LO
RX VHF
LO
PCS RF
SAW
CELL RF SAW
PCS RF
SAW
CELL RF
SAW
Diplexer
Ext
Conn
PCS/CELL_SEL
Rx_SW2
Rx_SW1
VR5
VR4
VIO VR3 VR6 VR7
Cell_vco_sel
Buffered 19.2 MHz
VR1A/B to VR7
VIO VR3VR7
DET_ref
Dc-DC
Converter
D0
D1
D2
VR2 Vbat
Vdc-dc Tx_gate
Dual Reg
VR8 & VR9
VR8 VR9
Vbat
PCS_vco_sel
UHF_CP
UHF PCS LO
UHF Cell LO
D0-3
CELL UHF
VCO
3
Vref1/2
Iref1/2
Vref1,2
Iref1,2
4
2
Headset
connector
2 2
4
SIM
Card
3
Microphone
Earpiece
Vibra
Buzzer
2
2
Gophers GPS
module
Timestamp
GPSRX
GPSTX
GPS_INT_UCLK
GPSENRESET
PAEN
GPS antenna

CCS Technical Documentation Troubleshooting — BB
RH-3
Issue 1 06/2003 Nokia Corporation Confidential Page 7
continue the boot sequence. The MBUS signal from UEM to the external connection is
used as clock during flash programming. This means that flash-programming clock is
supplied to UPP on the MBUSRX signal.
The flash prommer indicates the UEM that flash programming/reprogramming by writing
an 8-bit password to the UEM. The data is transmitted on the FBUSRX line and the UEM
clocks the data on the FBUSRX line into a shift register. When the 8 bits have been
shifted in the register, the flash prommer generates a falling edge on the BSI line. This
loads the shift register content in the UEM into a compare register. If the 8 bits in the
compare registers matches with the default value preset in the UEM, the flash prommer
shall pull the MBUS signal to UEM low in order to indicate to the MCU that the flash
prommer is connected. The UEM reset state machine performs a reset to the system,
PURX low for 20 ms. The UEM flash programming mode is valid until MCU sets a bit in
the UEM register that indicates the end of flash programming. Setting this bit also clears
the compare register in the UEM previously loaded at the falling edge of the BSI signal.
During the flash programming mode the UEM watchdogs are disabled. Setting the bit
indicating end of flash programming enables and resets the UEM watchdog timer to its
default value. Clearing the flash programming bit also causes the UEM to generate a
reset to the UPP.
The BSI signal is used to load the value into the compare register. In order to avoid spuri-
ous loading of the register, the BSI signal will be gated during UEM master reset and dur-
ing power on when PURX is active. The BSI signal should not change state during normal
operation unless the battery is extracted; in this case, the BSI signal will be pulled high,
note a falling edge is required to load the compare register.
Flashing • Using FBUSTX, FBUSRX, MBUS, and BSI lines does flash program-
ming.
• When phone is connected to the prommer, the prommer will first set BSI
to "1" and then uses FBUSRX for writing and MBUS for clocking. The
prommer will indicate to UEM that flash programming will take place by
writing 8-bit password to UEM after BSI is set to high. After the pass-
word is checked, BSI is set back to "0”. See Figure 1 on page 6.
• MCU will indicate to prommer that it has been noticed, by using
FBUSTX signal. After this it reports UPP type ID and is ready to receive
secondary boot code to its internal SRAM. (See Figure 2 on page 8).

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Figure 2: Flashing starts by BSI being pulled up and password being sent to UEM
• This boot code asks MCU to report prommer phone’s configuration
information, including flash device type. Now prommer can select and
send algorithm code to MCU SRAM (and SRAM/Flash self-tests can be
executed). (See Figure 3 on page 8 and Figure 4 on page 9.)
Figure 3: Flashing, continued
CH1 = BSI
CH2 = MBUS
CH3 = FBUSTX
CH4 = FBUSR
X
Measure points
Production test patte
rn
(J396)
FLASH_1
CH1 = PURX
CH2 = MBUS
CH3 = FBUSTX
CH4 = FBUSRX
Measure points
Production test patter
n
(J396)
FLASH_2

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Figure 4: Flashing, continued
Power Up and Reset
Power up and reset is controlled by the UEM ASIC. RH-3 baseband can be powered up in
the following ways:
• By the Power button, which means grounding the PWRONX pin of the
UEM
• By connect the charger to the charger input
• By the RTC Alarm, when the RTC logic has been programmed to give
an alarm
After receiving one of the above signals, the UEM counts a 20ms delay and then enters
its reset mode. The watchdog starts up, and if the battery voltage is greater than Vcoff+,
a 200ms delay is started to allow references, etc. to settle. After this delay elapses, the
VFLASH1 regulator is enabled. Then, 500us later VR3, VANA, VIO, and VCORE are enabled.
Finally the Power Up Reset (PURX ) line is held low for 20 ms. This reset, PURX, is sent to
UPP; resets are generated for the MCU and the DSP. During this reset phase, the UEM
forces the VCTCXO regulator on — regardless of the status of the sleep control input sig-
nal to the UEM. The FLSRSTx from the UPP is used to reset the flash during power up and
to put the flash in power down during sleep. All baseband regulators are switched on at
the UEM power on — except for the SIM regulator and Vflash2. Vsim and Vflash2 are not
used. The UEM internal watchdogs are running during the UEM reset state, with the
longest watchdog time selected. If the watchdog expires, the UEM returns to power off
state. The UEM watchdogs are internally acknowledged at the rising edge of the PURX
signal in order to always give the same watchdog response time to the MCU.
The following timing diagram (Figure 5 on page 10) represents UEM start-up sequence
CH1 = PURX
CH2 = MBUS
CH3 = FBUSTX
CH4 = FBUSRX
Measure points
Production test pattern
(J396)
FLASH_3
Data transfer has
started (Fbus_Rx)

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from reset to power-on mode.
Figure 5: Power on sequence and timing
Reference signal
PwrOnX
Charger Detection
RTC
UEMRSTX
VFlash1
VIO
VCORE
VANA
VR3
19.2MHz Clk
PURX
t1 t2 t4t3
32kHz XTAL
t1 = 20ms
t2 = 200ms
t3 = 500us
t4 = 20ms

CCS Technical Documentation Troubleshooting — BB
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Figure 6: Measured power on sequence and timing
Power up with PWR key
When the Power on key is pressed, the UEM enters the power-up sequence. Pressing the
power key causes the PWRONX pin on the UEM to be grounded. The UEM PWRONX sig-
nal is not part of the keypad matrix. The power key is only connected to the UEM. This
means that when pressing the power key an interrupt is generated to the UPP that starts
the MCU. The MCU then reads the UEM interrupt register and notice that it is a PWRONX
interrupt. The MCU now reads the status of the PWRONX signal using the UEM control
bus, CBUS. If the PWRONX signal stays low for a certain time the MCU accepts this as a
valid power on state and continues with the SW initialization of the baseband. If the
power on key does not indicate a valid power-on situation, the MCU powers off the
baseband.
Power up when charger is connected
In order to be able to detect and start charging in a cases where the main battery is fully
discharged (empty) and hence UEM has no supply (NO_SUPPLY or BACKUP mode of
UEM), charging is controlled by START-UP CHARGING circuitry.
Whenever VBAT level is detected to be below master reset threshold (VMSTR-), charging is
controlled by START_UP charge circuitry. Connecting a charger forces VCHAR input to
rise above charger detection threshold, VCHDET+. By detection start-up charging is
started. UEM generates 100mA constant output current from the connected charger’s
output voltage. As battery charges its voltage rises, and when VBAT voltage level higher
than master reset threshold limit (VMSTR+) is detected START_UP charge is terminated.
Monitoring the VBAT voltage level is done by charge control block (CHACON). MSTRX=‘1’
output reset signal (internal to UEM) is given to UEM’s RESET block when VBAT>VMSTR+

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and UEM enters into reset sequence.
If VBAT is detected to fall below VMSTR during start-up charging, charging is cancelled. It
will restart if new rising edge on VCHAR input is detected (VCHAR rising above VCHDET+).
RTC alarm power up
If phone is in POWER_OFF mode when RTC alarm occurs the wake-up procedure. After
baseband is powered on, an interrupt is given to MCU. When RTC alarm occurs during
ACTIVE mode, the interrupt for MCU is generated.
Power off
The Baseband switch power-off mode if any of following statements is true:
• Power key is pressed
• Battery voltage is too low (VBATT < 3.2 V)
• Watchdog timer register expires
The Power-down procedure is controlled by the UEM.
Power Consumption and Operation modes
In the POWER-OFF mode, the power (VBAT) is supplied to UEM, VIBRA, LED-Driver, PA
and PMIC.
In the SLEEP mode, both processors, MCU and DSP, are in stand-by mode. Both proces-
sors control sleep mode. When SLEEPX signal is detected low by the UEM, the phone
enters SLEEP mode. VIO and VFLASH1 regulators are put into low quiescent current
mode, and VANA and VFLASH2 regulators are disabled. All RF regulators are disabled
during SLEEP mode. When SLEEPX signal is detected high by the UEM, the phone enters
ACTIVE mode and all functions are activated.
The sleep mode is exited either by the expiration of a sleep clock counter in the UEM or
by some external interrupt, generated by a charger connection, key press, headset con-
nection, etc.
In sleep mode, VCTCXO is shut down and 32 kHz sleep clock oscillator is used as refer-
ence clock for the baseband.
The average current consumption of the phone in sleep mode can vary depending mainly
on SW; however, on average is about 9 mA.
In the ACTIVE mode, the phone is in normal operation, scanning for channels, listening
to a base station, transmitting and processing information. There are several sub-states
in the active mode depending on the phone present state of the phone such as: burst
reception, burst transmission, if DSP is working, etc.

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In active mode the RF regulators are controlled by SW writing into UEM’s registers
wanted settings: VR1A and VR1B can be enabled or disabled. VSIM can be enabled or
disabled and its output voltage can be programmed to be 1.8V or 3.3V. VR2 and VR4 -
VR7 can be enabled or disabled or forced into low quiescent current mode. VR3 is always
enabled in active mode and disabled during Sleep mode and cannot be control by SW.
In the CHARGING mode, the charging can be performed in parallel with any other oper-
ating mode. A BSI resistor inside the battery pack indicates the battery type/size. The
resistor value corresponds to a specific battery capacity. This capacity value is related to
the battery technology.
The battery voltage, temperature, size, and charging current are measured by the UEM,
and the charging software running in the UPP controls it.
The charging control circuitry (CHACON) inside the UEM controls the charging current
delivered from the charger to the battery and phone. The battery voltage rise is limited
by turning the UEM switch off, when the battery voltage has reached 4.2 V. Charging
current is monitored by measuring the voltage drop across a 220 mOhm resistor.
Power Distribution
In normal operation, the baseband is powered from the phone‘s battery. The battery con-
sists of one Lithium-Ion cell capacity of 850 mAh, and some safety and protection cir-
cuits to prevent harm to the battery.
The baseband contains components that control power distribution to whole phone
excluding the power amplifier (PA), which have a continuous power rail direct from the
battery. The battery feeds power directly to following parts of the system: UEM, RF Pas,
Vibra, Buzzer, Samrtcover Interface, and LED Driver.
The heart of the power distribution to the phone is the power control block inside UEM.
It includes all the voltage regulators and feeds the power to the whole system. UEM han-
dles hardware functions of power up so that regulators are not powered and power up
reset (PURX) are not released if battery voltage is less than 3 V.
HDCA2 Baseband is powered from five different UEM regulators (VANA, VIO, VFLASH1,
and VFLASH2) and the core voltage, which provide nominal voltages and currents
according to Table 1.
UEM supplies also voltages VR1A, VR1B, VR2, VR3, VR4, VR5, VR6, and VR7 for RF. See
Table 2.

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Table 2: RH-3 RF regulators
The charge pump that is used by VR1A and VR1B is constructed around UEM. The charge
pump works with 1.2 MHz oscillator and gives a 4.75 V regulated output voltage to RF.
Clock Distribution
RFClk (19.2 MHz Analog)
The main clock signal for the baseband is generated from the voltage and temperature
controlled crystal oscillator VCTCXO (G500). This 19.2 MHz sine wave clock signal is fed
to RFCLK pin of UPP. (See Figure 7 on page 15 for the waveform.)
Table 1: RH-3 Baseband regulators
Regulator Maximum current
(mA) Vout (V) Notes
VCORE 300 1.5 Output voltage selectable 1.0V/1.3V/1.5V/1.8V
Power up default 1.5V
VIO 150 1.8 Enabled always except during power-off mode
VFLASH1 70 2.78 Enabled always except during power-off mode
VFLASH2 40 2.78 Enabled only when the system is awake (Off
during sleep and power off-modes)
VANA 80 2.78
VSIM 25 3.0 Enabled only when SIM card is used
Regulator Maximum current
(mA) Vout (V) Notes
VR1A 10 4.75 Enabled when cell transmitter is on
VR1B 10 4.75 Enabled when the PCS transmitter is on
VR2 100 2.78 Enabled when the transmitter is on
VR3 20 2.78 Enabled when SleepX is high
VR4 50 2.78 Enabled when the receiver is on
VR5 50 2.78 Enabled when the receiver is on
VR6 50 2.78 Enabled when the transmitter is on
VR7 45 2.78 Enabled when the receiver is on

CCS Technical Documentation Troubleshooting — BB
RH-3
Issue 1 06/2003 Nokia Corporation Confidential Page 15
Figure 7: Waveform of 19.2MHz clock from RF to UPP and GPS BB Asic
RFConvClk (19.2 MHz digital)
The UPP distributes the 19.2MHz internal clock to the DSP and MCU, where SW multi-
plies this clock by seven for the DSP and by two for the MCU. (See Figure 8 on page 15.)
Figure 8: RFCovCLk waveform
CBUSClk Interface
A 1.2 MHz clock signal is use for CBUS, which is used by the MCU to transfer data
between UEM and UPP. (See Figure 9 on page 16 for Cbus data transfer.)

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Figure 9: Cbus Data Transfer
DBUSClk Interface
A 9.6 MHz clock signal is use for DBUS, which is used by the DSP to transfer data
between UEM and UPP. (See Figure 10 on page 16.)
Figure 10: Dbus data transferring
The system clock is stopped during sleep mode by disabling the VCTCXO power supply
(VR3) from the UEM regulator output by turning off the controlled output signal SleepX
from UPP.

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SLEEPClk (Digital)
The UEM provides a 32kHz sleep clock for internal use and to UPP, where it is used for
the sleep mode timing. (Figure 11 on page 17.)
Figure 11: 32kHz Digital output from UEM
SLEEPClk (Analog)
However, when the system enters sleep mode or power off mode, the external 32KHz
crystal provides a reference to the UEM RTC circuit to turn on the phone during porwer
off or sleep mode. (See Figure 12 on page 17.)
Figure 12: 32kHz analog waveform at 32KHz crystal input

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Charging operation
Battery
In RH-3, a Lithium-Ion cell battery with a capacity of 850 mAh is used. Reading a resis-
tor inside the battery pack on the BSI line indicates the battery type and size. The tem-
perature sensor for BTEMP is inside the phone and position on the board in a way that it
always has the same temperature as ther battery itself.
Temperature and capacity information are needed for charge control. The resistor for
capacity info is connected to BSI pin of battery connector. Phone has 100 kΩpull-up
resistors for this line so that they can be read by A/D inputs in the phone.
See Figure 13 on page 18 and Figure 14 on page 18 for the details.
Figure 13: BL-5C battery pack pin order
Figure 14: Interconnection diagram inside the battery pack
Charging circuitry
The UEM ASIC controls charging depending on the charger being used and the battery
size. External components are needed for EMC, reverse polarity and transient protection
of the input to the baseband module. The charger connection is through the system con-
nector interface. The RH-3 baseband is designed to support DCT3 chargers from an elec-
trical point of view. Both 2- and 3-wire type chargers are supported. For the 3-wire
charger, the control line is not supported and not connected to the Baseband ASICs. See
Figure 15 on page 19 for details.

CCS Technical Documentation Troubleshooting — BB
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Figure 15: Charging circuitry
Charger Detection
Connecting a charger creates voltage on VCHAR input of the UEM. When VCHAR input
voltage level is detected to rise above 2 V (VCHdet+ threshold) by UEM charging starts.
VCHARDET signal is generated to indicate the presence of the charger for the SW. The
charger identification/acceptance is controlled by EM SW.
The charger recognition is initiated when the EM SW receives a ”charger connected”
interrupt. The algorithm basically consists of the following three steps:
1 Check that the charger output (voltage and current) is within safety limits.
2 Identify the charger as a two-wire or three-wire charger.
3 Check that the charger is within the charger window (voltage and current).
If the charger is accepted and identified, the appropriate charging algorithm is initiated.
Figure 16: Charging circuit
R200
X102 battery
________
F100 0
1.5A
L100
C106
T
omahawk Charger
connector
42R/100MHz
1n0 CHARGER(4:0
)
+ VCHAR
X102
1
2
GND
GND
V100
1PMT16AT3

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Charge Control
In active mode charging is controlled by UEM’s digital part. Charging voltage and current
monitoring is used to limit charging into safe area. For that reason UEM has programma-
ble charging cut-off limits:
VBATLim1=3.6 V (Default)
VBATLim2L=5.0 V and
VBATLim2H=5.25 V.
VBATLim1, 2L, 2H are designed with hystereses. When the voltage rises above VBATLim1,
2L, 2H+ charging is stopped by turning charging switch OFF. No change in operational
mode is done. After voltage has decreased below VBATLim- charging re-starts.
There are two PWM frequencies in use depending on the type of the charger: two-wire
charger uses a 1Hz and a three-wire charger uses a 32Hz. Duty cycle range is 0% to
100%. Maximum charging current is limited to 1.2 A.
Audio
The audio control and processing in RH-3 is provided by UEM, which contains the audio
codec, and UPP — which contains the MCU and DSP blocks, handling and processing the
audio data signals.
The baseband supports three microphone inputs and two earpiece outputs. The micro-
phone inputs are MIC1, MIC2, and MIC3. MIC1 input is used for the phone's internal
microphone; MIC2 input is used for headsets (HDB-4, BHF-1. and CarK-126), Loopset
(LPS-4). MIC3 input is used for third-party accessories (2.5mm Jack). Every microphone
input can have either a differential or single ended ac connection to UEM circuit. In
RH-3, the internal microphone (MIC1) and MIC2 are differential and MIC3 microphones
are single-ended. The microphone signals from different sources are connected to sepa-
rate inputs at UEM. Inputs for the microphone signals are differential type. Also,
MICBIAS1 is used for MIC1 and MICBIAS2 is used for MIC2 and MIC3.
Display and Keyboard
LEDs are used for LCD and keypad illumination in RH-3. There are three LEDs for LCD and
four LEDs for keypad. The LEDs are supplied by a driver circuit which consists of a charge
pump and several current source, which are partly integrated into the driver and partly
realized by discretes.
A monochrome LCD is used in RH-3. Interface is using 9-bit data transfer. The interface
is quite similar to DCT3 type interface, except Command/Data information is transferred
together with the data. D/C bit set during each transmitted byte by MCU SW.
Figure 17 on page 21 is the waveform for LCD interface.