Pentek 52663 User manual

GETTING STARTED GUIDE
MODEL 52663
4−Channel 200 MHz A/D
with 1100 Digital Downconverters
Cobalt®Family VPX Board
Setting the Standard for
Digital Signal Processing
Pentek, Inc.
One Park Way
Upper Saddle River, NJ 07458
[phone]
www.pentek.com
Manual Part Number: 820.52663
Rev: 2.2 - June 17, 2015

Page 2 Model 52663 Getting Started Guide
Copyright
Copyright © 2014−2015, Pentek, Inc. All Rights Reserved. Contents of this publication may not be reproduced in any form
without written permission.
The Linux kernel is Copyright © by Linus B. Torvalds, under the terms of the General Public License (GPL).
Trademarks
Pentek, Cobalt, GateFlow, and ReadyFlow are registered trademarks of Pentek, Inc.
Linux is a registered trademark of Linus B. Torvalds. Microsoft and Windows are trademarks or registered trademarks of
Microsoft Corporation. OpenVPX is a trademark of VITA. PCI Express and PCIe are registered trademarks of PCI−SIG.
Xilinx, Virtex−6, Foundation ISE, iMPACT, and Platform Cable USB are registered trademarks of Xilinx Inc.
Manual Revision History
Date Revision Comments
3/26/14 1.0 Initial Release.
4/28/14 1.1 Removed the battery and battery installation instructions from What’s in the Box? because the bat−
tery now ships installed in Model 52663.
6/5/14 1.2 Added JTAG board to What’s in the Box?
12/10/14 1.3 Added information about the Pentek Model 5201 VPX carrier PCB jumpers to Before You Begin:
Jumper and Switch Settings.
4/20/15 2.0 Added information about the carrier OpenVPX Slot Profile to Before You Begin: Consider the
VPX Backplane. Added information about YourPentek to Documentation for This Product.
6/11/15 2.1 Revised What’s in the Box? and Installing the Hardware to note that two VPX slots are required.
6/17/15 2.2 Removed Option 703. Added Pentek model numbers for terminator board and 26−pin socket.
Printed in the United States of America.

Model 52663 Getting Started Guide Page 3
Rev. 2.1
What’s in the Box?
Your shipment of the Pentek Model 52663 should include the items on the following
list. If anything is missing or damaged, contact Pentek immediately at (201) 818−5900.
Please save the shipping container and packing material in case reshipment is required.
The list above includes all the standard parts that are shipped with the Pentek Model
52663. The options for this product are described in this Getting Started Guide and in the
Pentek Model 52663 Installation Manual (included in the box).
NOTE: Model 52663 requires two VPX slots: one in which to install the Model 52663
assembly and a vacant slot to the right of it, required to accommodate the
JTAG board.
NOTE: If your Model 52663 has Option 741, you must use a 5HP width (1") VPX slot.
Quantity Part Number Description
1002.52663 Model 52663 board (consisting of a Model 71663
mounted on a Model 5201 carrier)
1 002.71504 Terminator boarda
a. To purchase, use Pentek Model 2140-999.
1 004.71605 JTAG board
2 385.30150 Screws for JTAG board
1 807.71605 Instruction sheet for JTAG board
3 353.02607 26−pin socket for ribbon cable (sync)b
b. To purchase, use Pentek Model 2140-998.
2 feet 378.62602 26−conductor ribbon cable, 30GA 025 (sync)
2 356.00015 Shorting plugs
1 900.10153 Hex key, 3/32” (option 763 only)
1 808.52663 Instruction Manual Kit (all included manuals)

Page 4 Model 52663 Getting Started Guide
Rev. 2.1
Introduction
This document describes the Pentek Model 52663 Cobalt®Family VPX board, its asso−
ciated software, what to consider before installation, and installation steps.
Before You Begin: Description of Hardware
Pentek’s Cobalt Family Model 52663 is a multichannel, high−speed data converter.
Using the 3U VPX card format, the Model 52663 includes four 200−MHz, 16−bit A/D
converters and 1100 Digital Downconverters (DDCs).
The Pentek Model 52663 consists of one Pentek Model 71663 XMC module mounted on
a Pentek Model 5201 VPX carrier, assembled and tested as a single board. It is ready to
plug into a chassis with a single 3U VPX slot. The Model 5201 carrier features built−in
support for PCI Express®(PCIe®).
The Pentek Model 52663 Installation Manual (800.52663) provides installation instructions
for the Model 52663, and the Pentek Model 71660 Operating Manual (800.71660) and Pen−
tek Model 71663 Addendum Manual (800.71663) describe the operation and programming
of the Pentek 71663 XMC module.
Before You Begin: Consider the VPX Backplane
The Pentek Model 5201 carrier is configured in accordance with the VITA 65
OpenVPX™ standard, which defines VPX Slot Profiles for various signal connections.
Before installing Model 52663, you will need to know or consider the following:
Is your VPX backplane connection x4 or x8 PCIe?
VPX P0 is pinned out in accordance with the VITA 46.0 VPX Baseline Standard.
VPX P1 (Slot Profile SLT3−PAY−1F) has one Fat Pipe Data Plane (x4 PCIe interface).
VPX P2 is not connected.
Ensure that the VPX chassis has enough cooling and power capabilities for the
number of installed modules. Refer to the specifications in Section 1.6 of the Model
52663 Installation Manual.

Model 52663 Getting Started Guide Page 5
Rev. 2.1
Before You Begin: Jumper and Switch Settings
As shipped from the factory, all jumpers and switches are set in default positions on the
Pentek Model 52663. The default operating parameters they select may or may not meet
your requirements. Therefore, consider the following before installation:
Pentek Model 71663 XMC Module Switches
FPGA MGT Clock Operation: Primary and secondary PCIe clock frequency, auxil−
iary MGT clock frequency, secondary PCIe clock disable, auxiliary MGT clock dis−
able, and primary and secondary PCIe clock source
FPGA Configuration: FLASH write protect, FPGA configuration enable, FPGA con−
figuration select, configuration select enable, XMC JTAG enable, JTAG chain mode
For example, Switch SW1−1allows you to change the setting for the primary PCIe
clock frequency from 250 MHz (the factory default) to 100 MHz. To preview the 71663
XMC module switch settings you’ll need to consider for the Model 52663, refer to
Section 2.4 of the Model 52663 Installation Manual.
NOTE: The Model 52663 module is shipped to boot with the Gen 1 x8 PCIe default
FPGA code. However, the 5201 carrier limits this to x4 Gen 2. If you want a
different default, see Section 2.4.2 of the Model 52663 Installation Manual.
Pentek Model 5201 VPX Carrier PCB Jumpers
XMC JTAG: Jumper block JB1 includes or bypasses the 71624 XMC as part of the
JTAG chain from the Pentek JTAG connector (J5).
XMC Reset Source: Jumper block JB3 selects the source of the reset signal sent to the
XMC interface (VPX SYSRESET or Board Power On).
XMC MVMRO: Jumper block JB4 enables/disables MVMRO (XMC Write Prohibit)
for the XMC interface.
To preview the jumper settings you’ll need to consider for the 5201 carrier PCB, refer to
Section 2.7 of the Model 52624 Installation Manual.
NOTE: To access all jumpers, you must remove the XMC module from the VPX
carrier, as described in Section 2.3 of the Model 52624 Installation Manual.
Pentek Model 5201 VPX Carrier PCB Switches
Clock Driver Operation: DIP switch SW1 selects modes for the XMC interface clock
drivers. SW1 sets the following functions: clock power down, SRC stop, PLL bypass,
and PLL bandwidth.
XMC Geographic Address: DIP switch SW2 selects the Geographic Address bits
(GA0, GA1, GA2) for the XMC site interface.
To preview the switch settings you’ll need to consider for the 5201 carrier PCB, refer to
Section 2.8 of the Model 52663 Installation Manual (800.52663).

Page 6 Model 52663 Getting Started Guide
Rev. 2.1
Before You Begin: Description of Software
Board Support Software for the Pentek Model 71663 XMC
Pentek’s ReadyFlow®Board Support Packages (BSP) contain software support for the
Model 71663 XMC. This includes a device driver for the 71663, plus the ReadyFlow
Board Support Library data structures and routines. The following available BSPs
allow high−level programming for various workstation platforms. Refer to the User’s
Guide indicated for each platform:
• Model 4994A Option 166/661/662/176 ReadyFlow BSP for Linux®(816.71660)
• Model 4995A Option 166/661/662/176 ReadyFlow BSP for Windows®(815.71660)
Pentek’s ReadyFlow®Board Support Libraries contain a set of C−language routines
for the Model 71663. Refer to the Programmer’s Reference for Models 71660, 71661, 71662
(801.71660).
Because of the complexity of the GSM IP core, the Model 71663 FPGA is not supported
with a Pentek GateFlow®FPGA Design Kit.

Model 52663 Getting Started Guide Page 7
Rev. 2.1
Before You Begin: Consider the Product’s Options
Timing and Synchronization
The following timing and synchronization options are available for the Model 71663
XMC module’s A/D converters (all input/output signals are the same as defined for
the standard Model 71660):
• Onboard VCXO and clock synthesizer: An onboard voltage controlled crystal
oscillator (VCXO) and internal FPGA registers provide onboard sources for all sync,
gate, and clock signals.
• External clock: The front panel has one SSMC coaxial connector, labeled CLK, for
input of an external sample clock. The external clock signal must be a sine wave or
square wave of +0 dBm to +10 dBm, with a frequency range from 10 to 500 MHz. The
external clock input can be used as the sample clock for the A/D converters. This
input is enabled using Sync Bus Control Register 1 (see the Model 71660 Operating
Manual). The clock source selected by these bits is input to a CDC7005 Clock
Synthesizer that generates separate output clocks, each programmable as sub−
multiples of the input frequency. One of the CDC7005 output clocks (Y0) provides
ADC timing.
NOTE: Ensure that the ADC clock never exceeds the ADS5485 rated clock speed
during any change of frequency with the input clock signal.
• Trigger input: The front panel has one SSMC coaxial connector, labeled TRIG, for
input of an external trigger. The external trigger signal must be an LVTTL signal. The
trigger input can be used as a gate or trigger for A/D signal processing. This input is
enabled using Sync Bus Control Register 2 TTL SRC bits (see the Model 71660
Operating Manual).
NOTE: The front panel TTL Gate and Sync signals are 5V tolerant but they must
not have any negative voltage applied. They are terminated with a 392−
ohm resistor to 3.3V and a 392−ohm resistor to ground.
•26−pin sync bus front panel connector: This connector (labeled SYNC/GATE)
provides clock, sync, and gate input/output pins for the Low−Voltage Positive Emit−
ter−Coupled Logic (LVPECL) Sync Bus. It allows multiple modules to be
synchronized. When the Model 71663 is a bus Master, these pins output LVPECL
Sync Bus signals to other slave units. When the 71663 is a bus Slave, these pins input
LVPECL signals from a bus Master. This connector also accepts two Low−Voltage
TTL (LVTTL) Gate/ Sync inputs. For a description of the SYNC/GATE connector pin
configuration, refer to the Model 52663 Installation Manual.
NOTE: When connecting LVPECL Sync Bus pins to additional Model 71663
modules, the LVPECL pins on the LAST unit must be terminated. Pentek
includes a terminating board, part # 002.71504, with your shipment for
this purpose. (Additional terminating boards can be ordered with Pentek
model 2140−999.)

Page 8 Model 52663 Getting Started Guide
Rev. 2.1
FPGA Digital Interfaces
Model 52663 includes a Xilinx Virtex−6 FPGA. The FPGA serves as a control and status
engine with data and programming interfaces to each of the onboard resources includ−
ing the A/D converters and RAM memory.
The Model 78663 Virtex−6 FPGA SX315T is factory−configured for the GSM IP core,
and because of its complexity, some typical Cobalt options are not available, including
parallel user I/O (option 104) or user gigabit serial I/O (option 105). For the same rea−
son, the GateFlow FPGA Design Kit is not available for Model 78663.
Documentation Required for Installation
NOTE: Some manuals are used for more than one Pentek product. The manuals listed
below are all used for Model 52663.
•Pentek Model 52663 Installation Manual (800.52663): Describes the installation and
connections for the Model 52663.
•Pentek Model 71660 Operating Manual (800.71660): Describes the operation and
programming of the Model 71663 XMC module (a component of the Model 52663).
• Pentek Model 71663 Addendum Manual (800.71663): Describes any additions to the
resources described in the Model 71660 Operating Manual for programming the DDC
and Interpolator Core resources (the Model 71663 is part of the Model 52663).
•Installation and Getting Started Guide for the Pentek ReadyFlow software for the
workstation platform you’re using (815.71660 for Windows, 816.71660 for Linux).

Model 52663 Getting Started Guide Page 9
Rev. 2.1
Step 1: Unpacking and Inspecting the Unit
After unpacking, inspect the unit carefully for possible damage to connectors or com−
ponents. Refer to page 3 for a list of what should be in the box. If anything is damaged
or missing, contact Pentek immediately at (201) 818−5900. Please save the shipping
container and packing material in case reshipment is required.
Step 2: Checking the Switch Settings
At the factory, all DIP switches on the Model 52663 are installed in default positions.
The default parameters selected may or may not meet your requirements.
As described above in Before You Begin: Jumper and Switch Settings, the switches con−
trol various configuration settings. Before installing Model 52663, review Sections 2.4
and 2.8 in the Model 52663 Installation Manual to determine whether you need to
change any settings.
NOTE: You should only change the switches that are described in the Model 71660
Operating Manual and Model 52663 Installation Manual −all others are
reserved for factory test and setup purposes only.
Step 3: Installing the Hardware
The Model 52663 consists of one Pentek Model 71663 XMC module mounted on a Pen−
tek Model 5201 3U VPX carrier. This carrier conforms to the 3U height VPX card format
as per VITA 46.0 (VPX Baseline Standard specification). To install the Model 52663, fol−
low the procedure in Section 2.11 (Installing the Model 52663 in a VPX Card Cage) in
the Model 52663 Installation Manual.
NOTE: Model 52663 requires two VPX slots: one in which to install the Model 52663
assembly and a vacant slot to the right of it, required to accommodate the
JTAG board.
NOTE: If your Model 52663 has Option 741, you must use a 5HP width (1") VPX slot.
NOTE: The JTAG PCB on the Model 52663 board (on the Model 71663 XMC module)
is used for downloading new FPGA configuration code. If you do not plan to
use the JTAG PCB, you can remove it before installing Model 52663. If you do
plan to use the JTAG PCB, you should remove it before you deploy the Model
52663 board.

Page 10 Model 52663 Getting Started Guide
Rev. 2.1
Step 4: Installing the Cabling
Connect a cable for each analog signal your application requires to the Pentek Model
71663 XMC front panel SSMC socket receptacles on the Pentek Model 52663. These are
labeled IN 1, 2, 3, and 4: one for each ADC input channel.
The other cabling you install on the Model 52663’s front panel depends on how you
want to handle timing and synchronization (see Timing and Synchronization). Several
boards can be synchronized on the sync bus.
Step 5: Installing the Software
ReadyFlow Software
Pentek's ReadyFlow Libraries are software packages designed to provide software
development tools for specific Pentek products on specific operating systems or plat−
forms. The installation procedure is different for each platform:
Linux −The installation steps can be summarized as follows:
• Installing ReadyFlow in a Linux system
• Installing WinDriver (required to run example programs)
• Building the ReadyFlow example programs
• Building the ReadyFlow board support libraries
For complete details, refer to Chapter 2 of the Model 4994A Option 166/661/662/176
User’s Guide (816.71660).
Windows −You must install the Pentek ReadyFlow package BEFORE you attempt to boot
the Model 52663 under Windows. The installation steps can be summarized as follows:
• Installing ReadyFlow in a Windows system
• Initializing the hardware (Model 52663) in Windows (responding to the New
Hardware Wizard)
• Building the ReadyFlow example programs
• Building the ReadyFlow board support libraries
For complete details, refer to Chapter 2 of the Model 4995A Option 166/661/662/176
User’s Guide (815.71660).

Model 52663 Getting Started Guide Page 11
Rev. 2.1
Step 6: Using the Software
ReadyFlow Software
The User’s Guide for each ReadyFlow BSP provides instructions for using the Ready−
Flow software. Chapter 3 provides the following:
• Introduction to ReadyFlow −Provides an overview of how the software is used.
• Using ReadyFlow −Provides details about using ReadyFlow, along with a modified
code snippet from an example program.
• Using Linked Lists −Describes how to set up ADC Trigger Controller Linked Lists
along with a code snippet from an example program.
Chapter 4 describes the ReadyFlow data structures and routines that access the Linux
or Windows device driver functions.
Chapter 5 describes Command Line use and operation.
Chapter 6 describes Signal Analyzer use and operation.

Page 12 Model 52663 Getting Started Guide
Rev. 2.1
Documentation for This Product
Any of the documentation listed below that is not supplied with the Model 52663 can
be found at www.pentek.com.
Product Documentation
Some manuals are used for more than one Pentek product. The manuals listed below
are all used for Model 52663.
Other Technical Documentation
Catalogs:
• FPGA Resources Selection Guide
• Pentek Product Catalog
• Product Selection Guide: http://www.pentek.com/selectguide/SelectGuide.cfm
Handbooks:
• Critical Techniques for High−Speed A/Ds In Real−Time Systems
• High−speed Switched Serial Fabrics Improve System Design
• Putting FPGAs to Work For Software Radio
• Software Radio Handbook
Receive the Latest Information with YourPentek
To receive automatic notification about updates to this product’s documentation, set up
a YourPentek profile at http://www.pentek.com/go/ypmanual. YourPentek will also
notify you of any lifecycle changes for this product.
Part No Type / Description
800.52663 Installation Manual - Model 52663 4-Ch. 200 MHz A/D with 1100 DDCs Cobalt Family VPX Board
800.71660 Operating Manual - Model 71660 4-Channel 200 MHz A/D Cobalt Family XMC Module
800.71663 Addendum Manual - Model 71663 4-Ch. 200 MHz A/D with 1100 DDCs Cobalt Family XMC Module
800.71603 Addendum: Model 716xx Reprogram FPGA from FLASH
801.71660 Programmer's Reference - ReadyFlow Board Support Libraries for Models 71660, 71661, 71662
809.7x660 Supplemental Manual - Vendor Data Sheets for Model 7x660 Series Operating Manuals
815.71660 User's Guide - Model 4995A Option 166/661/662/176 Windows ReadyFlow BSP for Models 71660,
71661, 71662, 71760
816.71660 User's Guide - Model 4994A Option 166/661/662/176 Linux ReadyFlow BSP for Models 71660,
71661, 71662, 71760