RadiSys EPC-3307 Application guide

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Myy 2002
EPC®-3307
Hardware
Reference
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May 2002
Copyright ©2002byRadiSys Corporation.
All rights reserved.
EPC, INtime, iRMX, and RadiSys are registered trademarks of RadiSys Corporation. ASM, Brahma, DAI, DAQ,
MultiPro, SAIB, Spirit, and ValuePro are trademarks of RadiSys Corporation.
DAVID,MAUI, OS-9, SoftStax, andOS-9000, are registered trademarksof RadiSys Microware Communications
Software Division, Inc. FasTrak, Hawk, and UpLinkare trademarksof RadiSys Microware
Communications Software Division, Inc.
† All other trademarks, registered trademarks, service marks, and trade names are the property of their
respective owners.
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iii
Contents
Chapter 1: Overview.
Feature summary .............................................................................................................................. 2.
CompactPCI bus............................................................................................................................... 4.
Specifications ................................................................................................................................... 4.
Chapter 2: Configuration and installation.
Setting jumpers and headers ............................................................................................................. 8.
Flash .......................................................................................................................................... 8.
MFG .......................................................................................................................................... 9.
Inserting the EPC-3307..................................................................................................................... 9.
Maintaining and upgrading the EPC-3307........................................................................................ 10.
Removing the EPC-3307 ............................................................................................................ 10.
Replacing the battery ................................................................................................................. 10.
Chapter 3: BIOS configuration.
BIOS setup screens............................................................................................................................ 13.
Menu map.................................................................................................................................. 14.
Navigation ................................................................................................................................. 14.
Main Setup menu ............................................................................................................................. 15.
Primary/Secondary Master/Slave sub-menus............................................................................... 16.
Keyboard Features sub-menu ..................................................................................................... 21.
UBE Shadow Control sub-menu................................................................................................. 23.
About shadow memory regions ........................................................................................... 23.
Advanced menu ................................................................................................................................25.
Console Redirection sub-menu................................................................................................... 29.
I/O Device Configuration sub-menu ........................................................................................... 31.
PCI Configuration sub-menu...................................................................................................... 33.
Cache Memory sub-menu .......................................................................................................... 34.
Advanced Chipset Control sub-menu ......................................................................................... 39.
Boot menu ........................................................................................................................................ 40.
Exit menu ......................................................................................................................................... 41.
CMOS Save and Restore sub-menu............................................................................................ 43.
Chapter 4: Theory of operation.
Organization..................................................................................................................................... 46.
Block diagram ............................................................................................................................ 46.
Features ............................................................................................................................................ 46.
CPU module............................................................................................................................... 46.
Memory map ....................................................................................................................... 47.
Interrupt usage..................................................................................................................... 47.
Flash boot device ................................................................................................................. 47.
BIOS ROM and ROM shadowing ....................................................................................... 48.
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EPC-3307 Hardware Reference
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440GX host bridge..................................................................................................................... 49.
440GX PCI bus ................................................................................................................... 49.
DRAM/SDRAM memory controller .................................................................................... 50.
PIIX4E PCI-ISA bridge ............................................................................................................... 51.
PCI-ISA bridge..................................................................................................................... 51.
IDE controller...................................................................................................................... 51.
Compatibility devices........................................................................................................... 51.
Enhanced USB controller ..................................................................................................... 52.
SMBus interface and implementation................................................................................... 52.
RTC..................................................................................................................................... 52.
Intel 21554 PCI-PCI bridge ........................................................................................................ 53.
CPU board reset on host command over CompactPCI......................................................... 54.
Reset Control register .......................................................................................................... 54.
H.110 telephony interface .......................................................................................................... 55.
EPC-3307 CT architecture................................................................................................... 55.
General purpose I/Os ........................................................................................................... 57.
Clocking .............................................................................................................................. 57.
5.0V PMC site............................................................................................................................ 58.
CompactPCI Hot Swap .............................................................................................................. 58.
PCI bus implementation and devices .......................................................................................... 59.
PCI Ethernet controllers....................................................................................................... 59.
Battery ....................................................................................................................................... 60.
Super I/O.................................................................................................................................... 60.
Floppy disk .......................................................................................................................... 60.
COM ports .......................................................................................................................... 61.
Keyboard and mouse controller ........................................................................................... 61.
IPMI baseboard management controller (BMC) ......................................................................... 61.
HDD Option.............................................................................................................................. 62.
Special features........................................................................................................................... 62.
CPLD ISA interface.............................................................................................................. 62.
Watchdog timer.......................................................................................................................... 63.
Front panel red/green LED ......................................................................................................... 64.
Last Reset Source ....................................................................................................................... 65.
Local interrupt control register................................................................................................... 65.
Reset controller .......................................................................................................................... 66.
Hot Swap signals ....................................................................................................................... 67.
CompactPCI features register ..................................................................................................... 67.
IPMI special utility ..................................................................................................................... 68.
BIOS bank switching (build-time option) ................................................................................... 68.
Power monitoring, consumption, and reset generation ............................................................... 70.
Board dimensions and specifications .......................................................................................... 70.
Appendix A: Chipset and I/O map............................................................................................... 73.
Appendix B: Interrupts.................................................................................................................... 83.
Appendix C: Connectors.
Connector locations.......................................................................................................................... 86.
CompactPCI connectors ................................................................................................................... 87.
J1 connector............................................................................................................................... 87.
J2 connector............................................................................................................................... 88.
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Contents
v
J3 connector............................................................................................................................... 90.
J4 connector............................................................................................................................... 91.
J5 connector............................................................................................................................... 92.
PMC A connectors............................................................................................................................ 93.
J11 connector ............................................................................................................................ 93.
J12 connector ............................................................................................................................ 94.
J13 connector ............................................................................................................................ 95.
J14 connector ............................................................................................................................ 96.
PMC B connectors ............................................................................................................................ 97.
J21 connector ............................................................................................................................ 97.
J22 connector ............................................................................................................................ 98.
J24 connector............................................................................................................................. 99.
IDE (primary) ................................................................................................................................... 100.
Memory card connectors .................................................................................................................. 101.
J9 ............................................................................................................................................... 101.
J8 ............................................................................................................................................... 103.
Ethernet (optional)............................................................................................................................ 104.
RS-232 serial port (COM 1) ............................................................................................................. 104.
Front panel ....................................................................................................................................... 105.
LEDs .......................................................................................................................................... 105.
Reset switch ............................................................................................................................... 105.
Appendix D: Error messages.
Boot failures ..................................................................................................................................... 107.
Appendix E: Rear Transition module (RTM).
Features ............................................................................................................................................ 109.
Block diagram................................................................................................................................... 110.
CPU board I/O ........................................................................................................................... 110.
Installing and configuring the RTM.................................................................................................. 111.
Inserting the RTM...................................................................................................................... 111.
Removing the RTM.................................................................................................................... 112.
Connectors ....................................................................................................................................... 113.
Connector locations ................................................................................................................... 113.
Backplane J3 .............................................................................................................................. 114.
Backplane J5 .............................................................................................................................. 115.
Ethernet ..................................................................................................................................... 115.
COM 1 header ........................................................................................................................... 116.
COM 2 ...................................................................................................................................... 116.
IDE (secondary) ......................................................................................................................... 117.
Keyboard/mouse ........................................................................................................................ 117.
PIM (PMC I/O module) ............................................................................................................. 118.
USB ............................................................................................................................................ 120.
Appendix F: PMC modules.
Installing a PMC module on the main board .................................................................................... 121.
Disconnecting the PMC module........................................................................................................ 122.
Appendix G: Re-programming the flash chip.
About the flash chip.......................................................................................................................... 123.
About re-programming the flash chip ............................................................................................... 124.
Before you begin ............................................................................................................................... 126.
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EPC-3307 Hardware Reference
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Creating a Flash Boot diskette .......................................................................................................... 127.
Using phlash.exe to re-program the flash chip .................................................................................. 129.
Using BIOS configuration options to re-program the flash chip ........................................................ 130.
Using jumpers to re-program the flash chip ...................................................................................... 131.
Glossary............................................................................................................................................... 133.
Index..................................................................................................................................................... 141.
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Contents
vii
Figures
Figure 1-1. The EPC-3307....................................................................................................................... 1.
Figure 2-1. EPC-3307 CPU board: jumper locations ............................................................................... 8.
Figure 2-2. Flash header settings ............................................................................................................. 8.
Figure 3-1. BIOS Main Setup menu......................................................................................................... 15.
Figure 3-2. Primary/Secondary Master/Slave sub-menus.......................................................................... 17.
Figure 3-3. Keyboard Features sub-menu ................................................................................................ 21.
Figure 3-4. UBE Shadow Control sub-menu............................................................................................ 23.
Figure 3-5. Advanced menu..................................................................................................................... 25.
Figure 3-6. Console Redirection sub-menu.............................................................................................. 29.
Figure 3-7. I/O Device Configuration sub-menu...................................................................................... 31.
Figure 3-8. PCI Configuration sub-menu................................................................................................. 33.
Figure 3-9. Cache Memory sub-menu ..................................................................................................... 34.
Figure 3-10. Advanced Chipset Control sub-menu .................................................................................. 39.
Figure 3-11. Boot menu........................................................................................................................... 40.
Figure 3-12. Exit menu............................................................................................................................ 41.
Figure 3-13. CMOS Save and Restore sub-menu..................................................................................... 43.
Figure 4-1. EPC-3307: block diagram ..................................................................................................... 46.
Figure 4-2. Flash boot device memory..................................................................................................... 49.
Figure 4-2. EPC-3307 CT architecture .................................................................................................... 55.
Figure 4-3. BIOS paging .......................................................................................................................... 69.
Figure C-1. EPC-3307 Main board: connectors....................................................................................... 86.
Figure E-1. EPC-3307 Rear Transition module: connectors..................................................................... 113.
Figure F-1. Installing a PMC module....................................................................................................... 121.
Figure F-2. Separating a PMC module from the main board ................................................................... 122.
Figure G-1. Flash chip configuration ....................................................................................................... 123.
Figure G-2. Flash chip re-programming coverage .................................................................................... 124.
Figure G-3. Flash chip re-programming process flow .............................................................................. 125.
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EPC-3307 Hardware Reference
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Tables
Table 1-1. EPC-3307 environmental specifications.................................................................................. 4.
Table 4-1. 440GX unsupported commands ............................................................................................. 50.
Table 4-2. T8105 summary ..................................................................................................................... 55.
Table 4-3. T8105 I/O map....................................................................................................................... 55.
Table 4-4. T8105 signals ......................................................................................................................... 56.
Table 4-5. T8105 clock sources............................................................................................................... 57.
Table 4-6. PCI device configuration......................................................................................................... 59.
Table 4-7. CPLD I/O ports ...................................................................................................................... 62.
Table 4-8. CPLD indexes for function registers ....................................................................................... 63.
Table 4-9. Watchdog control register....................................................................................................... 64.
Table 4-10. Front panel user LED control ............................................................................................... 64.
Table 4-11. Last Reset Source register ..................................................................................................... 65.
Table 4-12. Local interrupt enables ......................................................................................................... 65.
Table 4-13. Reset control register ............................................................................................................ 66.
Table 4-14. Hot Swap signals.................................................................................................................. 67.
Table 4-15. CompactPCI features register ............................................................................................... 67.
Table 4-16. CompactPCI geographical address........................................................................................ 68.
Table 4-17. IPMI special utility ............................................................................................................... 68.
Table 4-18. BIOS control register ............................................................................................................ 69.
Table 4-19. Flash banks........................................................................................................................... 69.
Table 4-20. Reset trip points ................................................................................................................... 70.
Table 4-21. Power consumption .............................................................................................................. 70.
Table A-1. First (8-bit) DMA controller .................................................................................................. 73.
Table A-2. First interrupt controller ........................................................................................................ 73.
Table A-3. PCI arbiter control................................................................................................................. 73.
Table A-4. Time/counter functions .......................................................................................................... 74.
Table A-5. Keyboard controller ............................................................................................................... 74.
Table A-6. Real-time clock ...................................................................................................................... 74.
Table A-7. POST checkpoint ................................................................................................................... 74.
Table A-8. DMA page registers: Intel EX 82371EB of PC/AT ................................................................. 75.
Table A-9. Port A .................................................................................................................................... 75.
Table A-10. VGA controller .................................................................................................................... 75.
Table A-11. Second interrupt controller .................................................................................................. 75.
Table A-12. Power management controller.............................................................................................. 75.
Table A-13. Second (16-bit) DMA controller .......................................................................................... 76.
Table A-14. Coprocessor interface........................................................................................................... 76.
Table A-15. VGA controller .................................................................................................................... 76.
Table A-16. Secondary IDE ..................................................................................................................... 76.
Table A-17. CPLD................................................................................................................................... 77.
Table A-18. Primary IDE......................................................................................................................... 77.
Table A-19. ISA Plug and Play................................................................................................................. 77.
Table A-20. EGA..................................................................................................................................... 77.
Table A-21. Serial I/O (COM 4) port ...................................................................................................... 77.
Table A-22. Serial I/O (COM 2) port ...................................................................................................... 78.
Table A-23. Secondary IDE ..................................................................................................................... 78.
Table A-24. Parallel I/O (LPT1) port ....................................................................................................... 78.
Table A-25. EPP port............................................................................................................................... 78.
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Contents
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Table A-26. VGA controller .................................................................................................................... 78.
Table A-27. EGA controller..................................................................................................................... 79.
Table A-28. CGA controller .................................................................................................................... 79.
Table A-29. COM 3 serial poert.............................................................................................................. 79.
Table A-30. Floppy disk controller.......................................................................................................... 79.
Table A-31. Primary IDE......................................................................................................................... 80.
Table A-32. Serial I/O (COM 1) port ...................................................................................................... 80.
Table A-33. Interrupts ............................................................................................................................. 80.
Table A-34. ECP registers........................................................................................................................ 80.
Table A-35. ISA Plug and Play................................................................................................................. 80.
Table A-36. 443BX configuration address register .................................................................................. 81.
Table A-37. PIIX4E................................................................................................................................. 81.
Table A-38. 443BX configuration data register ....................................................................................... 81.
Table B-1. Interrupts ............................................................................................................................... 83.
Table C-1. CompactPCI J1 connector...................................................................................................... 87.
Table C-2. CompactPCI J2 connector...................................................................................................... 88.
Table C-3. CompactPCI connector J3...................................................................................................... 90.
Table C-4. CompactPCI connector J4...................................................................................................... 91.
Table C-5. CompactPCI connector J5...................................................................................................... 92.
Table C-6. J11 pinout (32-bit local PCI).................................................................................................. 93.
Table C-7. J12 pinout (32-bit local PCI).................................................................................................. 94.
Table C-8. J13 pinout (PMC-to-T8105 local streams) ............................................................................. 95.
Table C-9. J14 pinout (PMC-to-RTM’s PIM connector).......................................................................... 96.
Table C-10. J21 pinout (32-bit local PCI)................................................................................................ 97.
Table C-11. J22 pinout (32-bit local PCI)................................................................................................ 98.
Table C-12. J24 pinout (rear I/O configuration) ...................................................................................... 99.
Table C-13. Primary IDE connector ....................................................................................................... 100.
Table C-14. J9 (connector A, Blue Heron memory card) ......................................................................... 101.
Table C-15. Connector A, Blue Heron memory card ............................................................................... 102.
Table C-16. J8 (connector B, Blue Heron memory card).......................................................................... 103.
Table C-17. Connector B, Blue Heron memory card ............................................................................... 104.
Table C-18. RJ45 phone jack pin-out ...................................................................................................... 104.
Table C-19. RJ45 phone jack pin-out ...................................................................................................... 104.
Table E-1. EPC-3307 Rear Transition module: block diagram ................................................................ 110.
Table E-2. Backplane connector J3 .......................................................................................................... 114.
Table E-3. Backplane connector J5 .......................................................................................................... 115.
Table E-4. RJ45 phone jack pin-out ........................................................................................................ 115.
Table E-5. H1 (COM 1) pin-out.............................................................................................................. 116.
Table E-6. DB-9 (COM 2) pin-out........................................................................................................... 116.
Table E-7. Secondary IDE connector ...................................................................................................... 117.
Table E-8. Keyboard/mouse pin-out ........................................................................................................ 117.
Table E-9. PIM connector pin-out: J20.................................................................................................... 118.
Table E-10. PIM connector pin-out: J24.................................................................................................. 119.
Table E-11. USB connector pin-out ......................................................................................................... 120.
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EPC-3307 Hardware Reference
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xi
Before you begin
This guide provides the information you need to install the EPC-3307 and configure
its BIOS. It contains detailed hardware reference information for OEMs, system
integrators, and others who use the EPC-3307 as a component of their
CompactPCI†bus systems.
In addition, this manual assumes that you are familiar with PC sytems based on the
Intel x86 architecture and have some familiarity with CompactPCI bus architecture.
About this guide
Contents
Chapter Description
1Overview Introduces the EPC-3307, briefly describes its
features, and lists specifications.
2Configuration and
installation
Explains how to install the EPC-3307 in a
CompactPCI mainframe and how to install driver
software.
3BIOS configuration Explains how to configure the BIOS using the built-
in BIOS setup menus.
4Theory of operation Describes how EPC-3307 components provide a
CompactPCI bus compatible embedded computer
with standard PC peripherals and a PCI and ISA
interfaces.
AChipset and I/O map Maps the addresses used for I/O and by the
chipset registers.
BInterrupts Lists DMA channel and IRQ assignments to the
peripherals supported by the EPC-3307.
CConnectors Details the location, form, and pin-outs of the
connectors used in the EPC-3307.
DError messages Provides explanations of common error messages
and start-up codes.
ERear Transition
module (RTM)
Describes how to install, configure, and use the
Rear Transition Module (RTM).
FPMC modules
Describes how to install an optional PMC module.
GRe-programming the
flash chip
Details how to update or recover your system BIOS,
Flash Boot Device (FBD), and Boot Block by
re-programming all or part of the EPC-3307’s
flash chip
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EPC-3307 Hardware Reference
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Notational conventions
This manual uses the following conventions:
• Screen text and syntax strings appear in this font.
• All numbers are decimal unless otherwise stated.
• Bit 0 is the low-order bit. If a bit is set to 1, the associated description is true
unless otherwise stated.
Where to get more information
About the EPC-3307
You can find out more about EPC-3307 from these sources:
•World Wide Web: RadiSys maintains an active site on the World Wide Web. The
site contains current information about the company and locations of sales
offices, new and existing products, contacts for sales, service, and technical
support information. You can also send e-mail to RadiSys using the web site.
Requests for sales, service, and technical support information receive
prompt response.
•Other: If you purchased your RadiSys product from a third-party vendor, you
can contact that vendor for service and support.
About related RadiSys products
EPC-3306: The EPC-3306 is a high-performance single-slot CompactPCI module
that operates as system controller. It incorporates two PMC sites for flexibility using
a variety of PMC modules such as SVGA, LAN adapter or WAN adapters. It offers
a choice of three memory configurations to address different needs up to 512 MB.
For more information about the EPC-3306, see the RadiSys web site.
Notes indicate important
information about the product.
Tips indicate other techniques or
procedures you can use to
save
time or understand the product.
The globe indicates a World Wide
Web address.
The book indicates a book or file.
ESD cautions indicate situations that
may cause damage to hardware
via electro-static discharge (ESD).
Cautions indicate potentially hazardous
situations which, if not avoided, may
result in minor or moderate injury, or
damage to data or hardware. It may
also alert you about unsafe practices.
Warnings indicate potentially hazardous
situations which, if not avoided, can
result in death or serious injury.
Danger indicates imminently hazardous
situations which, if not avoided, will
result in death or serious injury.
When sending e-mail for technical support, please include information
about both the hardware and software, plus a detailed description of the
problem, including how to reproduce it.
To access the RadiSys web site, enter this URL in your web browser:
http://www.radisys.com
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1
Overview Chapter 1
The EPC-3307, a CompactPCI†Peripheral Processor Board, operates in a 6U
peripheral slot of a CompactPCI system.
The EPC-3307 hardware is compatible with all major PC software environments
including Microsoft†Windows†95, Windows 98, and Windows NT†4.0. It can
also run other PC operating systems, including Linux†, Solaris†, and DOS.
The EPC-3307 includes these subsystems:
The EPC-3307 requires a backplane that supports the CompactPCI Specification
Revision 2.1 and the pinouts detailed in Table E-2, Backplane connector J3 and
Table E-3, Backplane connector J5.
Figure 1-1. The EPC-3307
CPU board
A single-slot system
controller which plugs
into a 6U System Slot of
a CompactPCI system.
Rear Transition module
A rear I/O transition module
which plugs into a rear I/O
slot of a CompactPCI system.
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EPC-3307 Hardware Reference
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You can set up the EPC-3307 in these physical configurations:
The EPC-3307 can be fitted with a PMC module, a PCI Mezzanine card that
conforms to IEEE P1386.1. For more information about PMC modules, see
Appendix F, PMC modules.
Feature summary
The EPC-3307 is a CompactPCI, peripheral processor board designed around the
Intel PIII BGA2 mobile processor and the GX/PIIX4E chipset. As a peripheral
processor, the EPC-3307 typically operates in a peripheral slot of a CompactPCI
backplane. It can operate in a System Slot, but the EPC-3307 does not provide
clocking, arbitration, or bus enumeration.
The Intel 21554, a non-transparent PCI-to-PCI bridge, allows operation in a
peripheral slot. The H.110 telephony bus interface, supplied by the Lucent T8105,
provides for transfer of telephony data from the H.110 bus to PMC Site A (J13).
The EPC-3307 uses both soldered-down SDRAM and a RadiSys custom memory
module. The Intel GX chipset allows the use of 256mbit SDRAM components.
The EPC-3307 board includes:
•BGA2 Pentium III processor: Runs at 700 MHz and includes a 100 MHz Front
Side Bus plus a 256kbyte on-die cache.
•GX North Bridge: Includes a 100 MHz memory bus and a 33MHz, 32-bit local
PCI bus. It supports 256 Mbit SDRAMS but does not use the AGP Graphics port.
•Intel South Bridge PIIX4E chip: This PCI-to-ISA bridge includes two
independent EIDE channesl and battery-backed real-time clock.
•64-bit CompactPCI interface: Located on J1/J2, this interface uses Intel 21554
non-transparent PCI bridge with I/O slot compatibility.
•Lucent T8105 Time-slot interchanger: Provides H.110 to PMC interface,
accepts local streams to/from RadiSys Tempest PMC, and accepts local streams
from RadiSys Hornet PMC (not validated).
When configuring ... You can add one of these options...
PMC slot 1 • A hard disk drive.
• One PMC (including the RadiSys Tempest TDM PMC).
PMC slot 2 • One PMC.
• Up to 2 memory modules.
The EPC-3307 does not require a RadiSys-manufactured PMC. The EPC-3307
can accept most PMC types excluding those that either require a disk BIOS in
the EPC or do not fit by form factor.
This section describes CPU board features. For more information about RTM
features, see Appendix E, Rear Transition module (RTM).
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Chapter 1: Overview
3
•PMC sites:
•PMC site A: A 32-bit PMC site with rear I/O interface on J14 to
CompactPCI J5. The rear I/O routes to PIM on the RTM for
user-configurable rear-I/O.
•PMC site B: 32-bit PMC site. Includes a build-time option for rear I/O
interface on J24 to cPCI J3.
Not fully compliant with CMC specification. Connector keepouts on the
PCB near the front panel have been violated.
• Hot Swappable.
• Supports IPMI.
• On-board SDRAM operating at 100MHz; 256MB or 512MB of ECC SDRAM
on board. Provides up to 2G with two RadiSys memory modules.
• Optional Rear Transition Module provides:
• COM 1 RS232 (DB9). •COM 1 RS232 (10 pin header).
• One USB connector. •Connectors for mouse and keyboard.
• A header for secondary •Two Ethernet ports that support
EIDE. 10/100BASE-T.
• PIM S17E.
• 1MByte Boot Block Flash memory.
• Onboard headers for:
• Floppy •ITP
• Mouse/keyboard •RadiSys manufacturing header
• Port 80 header •CPLD JTAG
• National Semiconductor 87309 Super I/O.
• Front panel interface:
• LEDs: Blue HS LED and User/IPMI controllable Red/Green
LEDProgrammable.
• RJ45 connectors: one each for COM 1 and Ethernet 1 (build-time option).
• Reset button.
• Watchdog timer with programmable timeouts which you can program to
produce hard or soft resets.
The EPC-3307 can accept the RadiSys memory module, available in 256 MByte,
512MByte, and 1GByte densities. You can stack two memory cards on the main
board, although you can use only one of each memory module density. The
following system memory configuration are possible:
• 512Mbyte onboard with ECC.
• 1.0Gbyte with a 512M RadiSys memory module with ECC.
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EPC-3307 Hardware Reference
4
• 1.5Gbyte with a 1G RadiSys memory module with ECC.
• 2.0Gbyte with a 512M and a 1G RadiSys memory modules with ECC.
The memory is PC100 or better and can operate at 100MHz. This SBC incorporates
an IPMI sub-system based on RadiSys SBL-035. IPMI monitors the board’s
“health”. The IPMI circuitry can monitor the health of the computer even if the
computer is not functional. A separate microcontroller monitors vital signs and
reports them across the CompactPCI backplane.
CompactPCI bus
The CompactPCI bus is accessed from the EPC-3307’s PCI bus via an Intel 21554
PCI-to-PCI bridge. This bridge connects the onboard PCI bus (bus 0) with the
CompactPCI bus, which may have as many as seven additional CompactPCI devices
connected to it.
The CompactPCI standard was developed by a consortium of manufacturers
known as the PCI Industrial Computer Manufacturers Group (PICMG).
Specifications
For more information about PICMG and the CompactPCI standard consult
the PICMG website at this URL:
http://www.picmg.org
Table 1-1. EPC-3307 environmental specifications
Characteristic State Value
Mechanical
Dimensions 160.0 mm x 233.35 mm
Board thickness 1.6 mm
Height1
Heat sink and CPU 15.00 mm
Hard disk drive/
bracket assembly
14.77 mm
Environmental
Temperature Operating 0°C to 40°C2
Extended/short
term
–5°C to 50°C2operating for 96 hours
continuous, no more than 360 hours/year.
Storage –40°C to 70°C, 5°C per minute maximum
excursion gradient.
Relative humidity Operating 15% to 90% noncondensing.
Storage 15% to 95% relative humidity.
Shock Operating 5g, 11 ms duration, half-sine shock pulse.
Storage 2g, 11ms duration, half-sine shock pulse.
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Chapter 1: Overview
5
1
This exceeds the maximum height dictated by PICMG 2.0 CompactPCI Specification
R3.0
of 13.71 mm but remains within the mechanical boundary of the slot. For
details, see
Board dimensions and specifications on page 70.
2At point of entry of forced air derated 2°C per 1000 ft (300 m) over 6600 ft
(2000m) with sufficient airflow to keep within the temperature specification.
Operation above 30°C reduces the maximum operational relative humidity.
3
These are system-level tests. The EPC-3307’s conformance to these specifications
may be affected by the rest of the system’s ability to conform. Since the product is
part of a larger system, it is designed and tested to these specifications, but not
agency certified.
Vibration Operating 0.04g
2
/Hz from 5 to 1000 Hz random,
10 min. per sweep cycle
Storage 0.06g2/Hz from 5 to 1000 Hz random,
10 min. per sweep cycle
EMC
Radiated
emissions (EMC)3
Operating Designed and tested to pass (not certified)
EN 55022: 1998, Class B
Immunity
(ESD)
3
Operating Designed and tested to pass (not certified):
• All performance criteria from
IEC 1000-4-2/EN61000-4-2:1995
• 4KV direct contact, performance criteria B
• 6KV direct contact, performance criteria C
• 4KV air discharge, performance criteria B
• 8KV air discharge, performance criteria C
Radiated
immunity3
3V/m test level
Operating
Performance criteria B from IEC 1000-4-3/
EN61000-4-3:1995
Immunity Designed to pass (not certified):
Fast
transient/burst
3
Operating Performance criteria B from IEC 1000-4-
4/EN61000-4-4:1995
Surge voltages
3
Operating Performance criteria B from IEC 1000-4-
5/EN61000-4-5:1995
Conducted
3
Operating Performance criteria B from IEC 1000-4-
6/EN61000-4-6:1995
Safety
Product safety Designed to meet the requirements of
EN60950/UL60950
Table 1-1. EPC-3307 environmental specifications
Characteristic State Value
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EPC-3307 Hardware Reference
6
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7
Configuration and installation Chapter 2
This chapter explains how to install the EPC-3307 in a CompactPCI chassis.
When reading this file online, you can immediately view information about any
installation topic by placing the mouse cursor over a connector name and clicking.
Other setup is done by configuring BIOS options as described in Chapter 3,
BIOS configuration.
For information about... Go to this page...
Setting jumpers and headers ................................................................................... 8
Inserting the EPC-3307 ........................................................................................... 9
Maintaining and upgrading the EPC-3307 ............................................................ 10
Removing the EPC-3307 .................................................................................... 10
Replacing the battery ......................................................................................... 10
Avoid causing ESD (electrostatic discharge) damage:
• Remove modules from their antistatic bags only in a static-free environment.
• Perform the installation process (described later in this chapter) only in a
static-free environment.
• During external cable installation, ensure that the cables are not active. The
EPC-3307 is not designed for hot insertion of any interface.
The EPC-3307 modules, like most other electronic devices, are susceptible to
ESD damage. ESD damage is not always immediately obvious. It can cause a
partial breakdown in semiconductor devices that might not result in immediate
failure.
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