RadiSys EPC-3307 Application guide

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Myy 2002
EPC®-3307
Hardware
Reference
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May 2002
Copyright ©2002byRadiSys Corporation.
All rights reserved.
EPC, INtime, iRMX, and RadiSys are registered trademarks of RadiSys Corporation. ASM, Brahma, DAI, DAQ,
MultiPro, SAIB, Spirit, and ValuePro are trademarks of RadiSys Corporation.
DAVID,MAUI, OS-9, SoftStax, andOS-9000, are registered trademarksof RadiSys Microware Communications
Software Division, Inc. FasTrak, Hawk, and UpLinkare trademarksof RadiSys Microware
Communications Software Division, Inc.
† All other trademarks, registered trademarks, service marks, and trade names are the property of their
respective owners.
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iii
Contents
Chapter 1: Overview.
Feature summary .............................................................................................................................. 2.
CompactPCI bus............................................................................................................................... 4.
Specifications ................................................................................................................................... 4.
Chapter 2: Configuration and installation.
Setting jumpers and headers ............................................................................................................. 8.
Flash .......................................................................................................................................... 8.
MFG .......................................................................................................................................... 9.
Inserting the EPC-3307..................................................................................................................... 9.
Maintaining and upgrading the EPC-3307........................................................................................ 10.
Removing the EPC-3307 ............................................................................................................ 10.
Replacing the battery ................................................................................................................. 10.
Chapter 3: BIOS configuration.
BIOS setup screens............................................................................................................................ 13.
Menu map.................................................................................................................................. 14.
Navigation ................................................................................................................................. 14.
Main Setup menu ............................................................................................................................. 15.
Primary/Secondary Master/Slave sub-menus............................................................................... 16.
Keyboard Features sub-menu ..................................................................................................... 21.
UBE Shadow Control sub-menu................................................................................................. 23.
About shadow memory regions ........................................................................................... 23.
Advanced menu ................................................................................................................................25.
Console Redirection sub-menu................................................................................................... 29.
I/O Device Configuration sub-menu ........................................................................................... 31.
PCI Configuration sub-menu...................................................................................................... 33.
Cache Memory sub-menu .......................................................................................................... 34.
Advanced Chipset Control sub-menu ......................................................................................... 39.
Boot menu ........................................................................................................................................ 40.
Exit menu ......................................................................................................................................... 41.
CMOS Save and Restore sub-menu............................................................................................ 43.
Chapter 4: Theory of operation.
Organization..................................................................................................................................... 46.
Block diagram ............................................................................................................................ 46.
Features ............................................................................................................................................ 46.
CPU module............................................................................................................................... 46.
Memory map ....................................................................................................................... 47.
Interrupt usage..................................................................................................................... 47.
Flash boot device ................................................................................................................. 47.
BIOS ROM and ROM shadowing ....................................................................................... 48.
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EPC-3307 Hardware Reference
iv
440GX host bridge..................................................................................................................... 49.
440GX PCI bus ................................................................................................................... 49.
DRAM/SDRAM memory controller .................................................................................... 50.
PIIX4E PCI-ISA bridge ............................................................................................................... 51.
PCI-ISA bridge..................................................................................................................... 51.
IDE controller...................................................................................................................... 51.
Compatibility devices........................................................................................................... 51.
Enhanced USB controller ..................................................................................................... 52.
SMBus interface and implementation................................................................................... 52.
RTC..................................................................................................................................... 52.
Intel 21554 PCI-PCI bridge ........................................................................................................ 53.
CPU board reset on host command over CompactPCI......................................................... 54.
Reset Control register .......................................................................................................... 54.
H.110 telephony interface .......................................................................................................... 55.
EPC-3307 CT architecture................................................................................................... 55.
General purpose I/Os ........................................................................................................... 57.
Clocking .............................................................................................................................. 57.
5.0V PMC site............................................................................................................................ 58.
CompactPCI Hot Swap .............................................................................................................. 58.
PCI bus implementation and devices .......................................................................................... 59.
PCI Ethernet controllers....................................................................................................... 59.
Battery ....................................................................................................................................... 60.
Super I/O.................................................................................................................................... 60.
Floppy disk .......................................................................................................................... 60.
COM ports .......................................................................................................................... 61.
Keyboard and mouse controller ........................................................................................... 61.
IPMI baseboard management controller (BMC) ......................................................................... 61.
HDD Option.............................................................................................................................. 62.
Special features........................................................................................................................... 62.
CPLD ISA interface.............................................................................................................. 62.
Watchdog timer.......................................................................................................................... 63.
Front panel red/green LED ......................................................................................................... 64.
Last Reset Source ....................................................................................................................... 65.
Local interrupt control register................................................................................................... 65.
Reset controller .......................................................................................................................... 66.
Hot Swap signals ....................................................................................................................... 67.
CompactPCI features register ..................................................................................................... 67.
IPMI special utility ..................................................................................................................... 68.
BIOS bank switching (build-time option) ................................................................................... 68.
Power monitoring, consumption, and reset generation ............................................................... 70.
Board dimensions and specifications .......................................................................................... 70.
Appendix A: Chipset and I/O map............................................................................................... 73.
Appendix B: Interrupts.................................................................................................................... 83.
Appendix C: Connectors.
Connector locations.......................................................................................................................... 86.
CompactPCI connectors ................................................................................................................... 87.
J1 connector............................................................................................................................... 87.
J2 connector............................................................................................................................... 88.
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Contents
v
J3 connector............................................................................................................................... 90.
J4 connector............................................................................................................................... 91.
J5 connector............................................................................................................................... 92.
PMC A connectors............................................................................................................................ 93.
J11 connector ............................................................................................................................ 93.
J12 connector ............................................................................................................................ 94.
J13 connector ............................................................................................................................ 95.
J14 connector ............................................................................................................................ 96.
PMC B connectors ............................................................................................................................ 97.
J21 connector ............................................................................................................................ 97.
J22 connector ............................................................................................................................ 98.
J24 connector............................................................................................................................. 99.
IDE (primary) ................................................................................................................................... 100.
Memory card connectors .................................................................................................................. 101.
J9 ............................................................................................................................................... 101.
J8 ............................................................................................................................................... 103.
Ethernet (optional)............................................................................................................................ 104.
RS-232 serial port (COM 1) ............................................................................................................. 104.
Front panel ....................................................................................................................................... 105.
LEDs .......................................................................................................................................... 105.
Reset switch ............................................................................................................................... 105.
Appendix D: Error messages.
Boot failures ..................................................................................................................................... 107.
Appendix E: Rear Transition module (RTM).
Features ............................................................................................................................................ 109.
Block diagram................................................................................................................................... 110.
CPU board I/O ........................................................................................................................... 110.
Installing and configuring the RTM.................................................................................................. 111.
Inserting the RTM...................................................................................................................... 111.
Removing the RTM.................................................................................................................... 112.
Connectors ....................................................................................................................................... 113.
Connector locations ................................................................................................................... 113.
Backplane J3 .............................................................................................................................. 114.
Backplane J5 .............................................................................................................................. 115.
Ethernet ..................................................................................................................................... 115.
COM 1 header ........................................................................................................................... 116.
COM 2 ...................................................................................................................................... 116.
IDE (secondary) ......................................................................................................................... 117.
Keyboard/mouse ........................................................................................................................ 117.
PIM (PMC I/O module) ............................................................................................................. 118.
USB ............................................................................................................................................ 120.
Appendix F: PMC modules.
Installing a PMC module on the main board .................................................................................... 121.
Disconnecting the PMC module........................................................................................................ 122.
Appendix G: Re-programming the flash chip.
About the flash chip.......................................................................................................................... 123.
About re-programming the flash chip ............................................................................................... 124.
Before you begin ............................................................................................................................... 126.
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EPC-3307 Hardware Reference
vi
Creating a Flash Boot diskette .......................................................................................................... 127.
Using phlash.exe to re-program the flash chip .................................................................................. 129.
Using BIOS configuration options to re-program the flash chip ........................................................ 130.
Using jumpers to re-program the flash chip ...................................................................................... 131.
Glossary............................................................................................................................................... 133.
Index..................................................................................................................................................... 141.
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Contents
vii
Figures
Figure 1-1. The EPC-3307....................................................................................................................... 1.
Figure 2-1. EPC-3307 CPU board: jumper locations ............................................................................... 8.
Figure 2-2. Flash header settings ............................................................................................................. 8.
Figure 3-1. BIOS Main Setup menu......................................................................................................... 15.
Figure 3-2. Primary/Secondary Master/Slave sub-menus.......................................................................... 17.
Figure 3-3. Keyboard Features sub-menu ................................................................................................ 21.
Figure 3-4. UBE Shadow Control sub-menu............................................................................................ 23.
Figure 3-5. Advanced menu..................................................................................................................... 25.
Figure 3-6. Console Redirection sub-menu.............................................................................................. 29.
Figure 3-7. I/O Device Configuration sub-menu...................................................................................... 31.
Figure 3-8. PCI Configuration sub-menu................................................................................................. 33.
Figure 3-9. Cache Memory sub-menu ..................................................................................................... 34.
Figure 3-10. Advanced Chipset Control sub-menu .................................................................................. 39.
Figure 3-11. Boot menu........................................................................................................................... 40.
Figure 3-12. Exit menu............................................................................................................................ 41.
Figure 3-13. CMOS Save and Restore sub-menu..................................................................................... 43.
Figure 4-1. EPC-3307: block diagram ..................................................................................................... 46.
Figure 4-2. Flash boot device memory..................................................................................................... 49.
Figure 4-2. EPC-3307 CT architecture .................................................................................................... 55.
Figure 4-3. BIOS paging .......................................................................................................................... 69.
Figure C-1. EPC-3307 Main board: connectors....................................................................................... 86.
Figure E-1. EPC-3307 Rear Transition module: connectors..................................................................... 113.
Figure F-1. Installing a PMC module....................................................................................................... 121.
Figure F-2. Separating a PMC module from the main board ................................................................... 122.
Figure G-1. Flash chip configuration ....................................................................................................... 123.
Figure G-2. Flash chip re-programming coverage .................................................................................... 124.
Figure G-3. Flash chip re-programming process flow .............................................................................. 125.
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EPC-3307 Hardware Reference
viii
Tables
Table 1-1. EPC-3307 environmental specifications.................................................................................. 4.
Table 4-1. 440GX unsupported commands ............................................................................................. 50.
Table 4-2. T8105 summary ..................................................................................................................... 55.
Table 4-3. T8105 I/O map....................................................................................................................... 55.
Table 4-4. T8105 signals ......................................................................................................................... 56.
Table 4-5. T8105 clock sources............................................................................................................... 57.
Table 4-6. PCI device configuration......................................................................................................... 59.
Table 4-7. CPLD I/O ports ...................................................................................................................... 62.
Table 4-8. CPLD indexes for function registers ....................................................................................... 63.
Table 4-9. Watchdog control register....................................................................................................... 64.
Table 4-10. Front panel user LED control ............................................................................................... 64.
Table 4-11. Last Reset Source register ..................................................................................................... 65.
Table 4-12. Local interrupt enables ......................................................................................................... 65.
Table 4-13. Reset control register ............................................................................................................ 66.
Table 4-14. Hot Swap signals.................................................................................................................. 67.
Table 4-15. CompactPCI features register ............................................................................................... 67.
Table 4-16. CompactPCI geographical address........................................................................................ 68.
Table 4-17. IPMI special utility ............................................................................................................... 68.
Table 4-18. BIOS control register ............................................................................................................ 69.
Table 4-19. Flash banks........................................................................................................................... 69.
Table 4-20. Reset trip points ................................................................................................................... 70.
Table 4-21. Power consumption .............................................................................................................. 70.
Table A-1. First (8-bit) DMA controller .................................................................................................. 73.
Table A-2. First interrupt controller ........................................................................................................ 73.
Table A-3. PCI arbiter control................................................................................................................. 73.
Table A-4. Time/counter functions .......................................................................................................... 74.
Table A-5. Keyboard controller ............................................................................................................... 74.
Table A-6. Real-time clock ...................................................................................................................... 74.
Table A-7. POST checkpoint ................................................................................................................... 74.
Table A-8. DMA page registers: Intel EX 82371EB of PC/AT ................................................................. 75.
Table A-9. Port A .................................................................................................................................... 75.
Table A-10. VGA controller .................................................................................................................... 75.
Table A-11. Second interrupt controller .................................................................................................. 75.
Table A-12. Power management controller.............................................................................................. 75.
Table A-13. Second (16-bit) DMA controller .......................................................................................... 76.
Table A-14. Coprocessor interface........................................................................................................... 76.
Table A-15. VGA controller .................................................................................................................... 76.
Table A-16. Secondary IDE ..................................................................................................................... 76.
Table A-17. CPLD................................................................................................................................... 77.
Table A-18. Primary IDE......................................................................................................................... 77.
Table A-19. ISA Plug and Play................................................................................................................. 77.
Table A-20. EGA..................................................................................................................................... 77.
Table A-21. Serial I/O (COM 4) port ...................................................................................................... 77.
Table A-22. Serial I/O (COM 2) port ...................................................................................................... 78.
Table A-23. Secondary IDE ..................................................................................................................... 78.
Table A-24. Parallel I/O (LPT1) port ....................................................................................................... 78.
Table A-25. EPP port............................................................................................................................... 78.
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Contents
ix
Table A-26. VGA controller .................................................................................................................... 78.
Table A-27. EGA controller..................................................................................................................... 79.
Table A-28. CGA controller .................................................................................................................... 79.
Table A-29. COM 3 serial poert.............................................................................................................. 79.
Table A-30. Floppy disk controller.......................................................................................................... 79.
Table A-31. Primary IDE......................................................................................................................... 80.
Table A-32. Serial I/O (COM 1) port ...................................................................................................... 80.
Table A-33. Interrupts ............................................................................................................................. 80.
Table A-34. ECP registers........................................................................................................................ 80.
Table A-35. ISA Plug and Play................................................................................................................. 80.
Table A-36. 443BX configuration address register .................................................................................. 81.
Table A-37. PIIX4E................................................................................................................................. 81.
Table A-38. 443BX configuration data register ....................................................................................... 81.
Table B-1. Interrupts ............................................................................................................................... 83.
Table C-1. CompactPCI J1 connector...................................................................................................... 87.
Table C-2. CompactPCI J2 connector...................................................................................................... 88.
Table C-3. CompactPCI connector J3...................................................................................................... 90.
Table C-4. CompactPCI connector J4...................................................................................................... 91.
Table C-5. CompactPCI connector J5...................................................................................................... 92.
Table C-6. J11 pinout (32-bit local PCI).................................................................................................. 93.
Table C-7. J12 pinout (32-bit local PCI).................................................................................................. 94.
Table C-8. J13 pinout (PMC-to-T8105 local streams) ............................................................................. 95.
Table C-9. J14 pinout (PMC-to-RTM’s PIM connector).......................................................................... 96.
Table C-10. J21 pinout (32-bit local PCI)................................................................................................ 97.
Table C-11. J22 pinout (32-bit local PCI)................................................................................................ 98.
Table C-12. J24 pinout (rear I/O configuration) ...................................................................................... 99.
Table C-13. Primary IDE connector ....................................................................................................... 100.
Table C-14. J9 (connector A, Blue Heron memory card) ......................................................................... 101.
Table C-15. Connector A, Blue Heron memory card ............................................................................... 102.
Table C-16. J8 (connector B, Blue Heron memory card).......................................................................... 103.
Table C-17. Connector B, Blue Heron memory card ............................................................................... 104.
Table C-18. RJ45 phone jack pin-out ...................................................................................................... 104.
Table C-19. RJ45 phone jack pin-out ...................................................................................................... 104.
Table E-1. EPC-3307 Rear Transition module: block diagram ................................................................ 110.
Table E-2. Backplane connector J3 .......................................................................................................... 114.
Table E-3. Backplane connector J5 .......................................................................................................... 115.
Table E-4. RJ45 phone jack pin-out ........................................................................................................ 115.
Table E-5. H1 (COM 1) pin-out.............................................................................................................. 116.
Table E-6. DB-9 (COM 2) pin-out........................................................................................................... 116.
Table E-7. Secondary IDE connector ...................................................................................................... 117.
Table E-8. Keyboard/mouse pin-out ........................................................................................................ 117.
Table E-9. PIM connector pin-out: J20.................................................................................................... 118.
Table E-10. PIM connector pin-out: J24.................................................................................................. 119.
Table E-11. USB connector pin-out ......................................................................................................... 120.
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