Renesas lSL8273MEVAL1Z User manual

USER’S MANUAL
UG036
Rev 0.00
August 7, 2015
lSL8273MEVAL1Z
Evaluation Board
UG036 Rev 0.00 Page 1 of 17
August 7, 2015
Description
The ISL8273M is a 80A step-down DC/DC power supply
module with an integrated digital PWM controller, dual-phase
synchronous power switches, inductors and passives. Only
input/output capacitors and minimal passives are needed to
finish the design. 80A of continuous output current can be
delivered without a need of airflow or heatsink. The ISL8273M
uses ChargeMode™ control (ASCR) architecture, which
responds to a transient load within a single switching cycle.
The ISL8273MEVAL1Z evaluation board is a 4.7inx4.8in
8-layer FR4 board with 2oz. copper on all layers. This
evaluation board comes with placeholders for pin-strap
resistor population to adjust output voltage, switching
frequency, soft-start/stop timing and input UVLO threshold,
ASCR gain and residual parameters and device PMBus™
address. More configurations, such as sequencing, Digital-DC™
(DDC) bus configuration and fault limits can be easily
programmed or changed via PMBus compliant serial bus
interface.
The optional ZLUSBEVAL3Z (USB to PMBus adapter) is
provided with this evaluation board, which connects the
evaluation board to a PC to activate the PMBus
communication interface. The PMBus command set is
accessed by using the PowerNavigator™ evaluation software
from a PC running Microsoft Windows. The ISL8273MEVAL1Z
can operate in pin-strap mode without needing the
ZLUSBEVAL3Z adapter or PMBus communication.
References
ISL8273M datasheet
Key Features
•V
IN range of 4.5V to 14V, VOUT adjustable from 0.6V to 2.5V
•ProgrammableV
OUT, margining, input and output UVP/OVP,
IOUT limit, OTP/UTP, soft-start/stop, sequencing and
external synchronization
• Monitor: VIN, VOUT, IOUT, temperature, duty cycle, switching
frequency and faults
•ChargeMode™
control tunable with PMBus
• Mechanical switch for enable and power-good LED indicator
Specifications
This board has been configured for the following operating
conditions by default:
•V
IN = 5V to 12V
•V
OUT = 1V
•I
MAX = 80A
•f
SW = 364kHz
• Peak efficiency: >90% at 70% load
• Output ripple: <10mVP-P
• ASCR gain = 200, ASCR residual = 90
• On/off delay = 5ms; On/off ramp time = 5ms
Ordering Information
PART NUMBER DESCRIPTION
ISL8273MEVAL1Z ISL8273M evaluation board, ZLUSBEVAL3Z
adapter, USB cable
FIGURE 1. BLOCK DIAGRAM
ISL8273M
VIN
VDD
EN
SDA
SCL
SALRT
VOUT
VSENP
VSENN
SYNC
DDC
VIN
5V TO 12V
PG
INTER-DEVICE CONNECTION
(OPTIONAL)
PMBus DONGLE
CONNECTION
(OPTIONAL)
VOUT 1V
(CAN BE ADJUSTED
0.6V TO 2.5V)

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August 7, 2015
lSL8273MEVAL1Z
FIGURE 2. TOP SIDE
FIGURE 3. BOTTOM SIDE
INTERCONNECTS DDC AND
SYNC BETWEEN BOARDS
CONNECT TO ZLUSBEVAL3Z
DONGLE. FOR MULTIPLE
BOARD EVALUATION,
CONNECT TO PMBus DONGLE
OUT CONNECTION OF OTHER
BOARD
INTERCONNECTS DDC
BETWEEN BOARDS
TO DAISY CHAIN PMBus
CONNECTION
PGOOD LED
ENABLE SWITCH
VOUT REGULATION MONITOR
AND SYNC
RESISTOR PLACEHOLDERS

UG036 Rev 0.00 Page 3 of 17
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lSL8273MEVAL1Z
Recommended Equipment
• DC power supply with minimum 15V/40A sourcing capacity
• Electronic load capable of sinking current up to 80A
• Digital Multimeters (DMMs)
• Oscilloscope with higher than 100MHz bandwidth
Functional Description
The ISL8273MEVAL1Z provides all circuitry required to evaluate
the features of the ISL8273M. A majority of the features of the
ISL8273M, such as compensation-free ChargeMode™ control,
soft-start delay and ramp times, supply sequencing and voltage
margining are available on this evaluation board. For sequencing
evaluation, the board can be connected to any Intersil digital
module evaluation board that supports the DDC bus.
Figures 2 and 3show the board images of the ISL8273MEVAL1Z
evaluation board.
Quick Start Guide
Pin-strap Option
ISL8273MEVAL1Z can be configured in pin-strap mode with
standard 1% 0603 resistors. PMBus interface is not required to
evaluate ISL8273M in pin-strap mode. Output voltage (VOUT),
switching frequency (fSW), soft-start/stop delay and ramp time,
input undervoltage protection (UVLO) threshold, ASCR gain and
residual, and device PMBus address can be changed by
populating recommended resistors at placeholders provided in
the evaluation board. By default, the evaluation board operates
in pin-strap mode and regulates at VOUT = 1V, fSW = 364kHz,
soft-start/stop delay time = 5ms, soft-start/stop ramp
time = -5ms to 5ms, UVLO = 4.5V, ASCR gain = 200, ASCR
residual = 90 and PMBus address = 28h. Follow these steps to
evaluate the ISL8273M in pin-strap mode.
1. Set ENABLE switch to “DISABLE”.
2. Connect Load to VOUT lug connectors (J7-J8 and J9-J10).
3. Connect power supply to VIN connectors (J5 and J6). Make
sure power supply is not enabled when making connection.
4. Turn power supply on.
5. Set ENABLE switch to “ENABLE”.
6. Measure 1V VOUT at probe point labeled “VOUT REGULATION
MONITOR” (J11).
7. Observe switching frequency of 364kHz at probe points
labeled “PHASE1” (TP10) and “PHASE2” (TP11).
8. To measure the module efficiency, connect the multimeter
voltage probes at probe points labeled “VIN” (TP1), “GND”
(TP2) and “VOUT” (TP12).
9. To change VOUT, disconnect board from the setup and
populate a 1% standard 0603 resistor at RVSET placeholder
location on bottom layer. Refer to the “Output Voltage
Resistor Settings” table in the ISL8273M datasheet for
recommended values. By default, VOUT_MAX is set to 110%
of VOUT set by pin-strap resistor.
10. To change switching frequency, disconnect board from the
setup and populate a 1% standard 0603 resistor at the RFSET
placeholder location on bottom layer. Refer to the “Switching
Frequency Resistor Settings” table in the ISL8273M
datasheet for recommended values.
11. To change soft-start/stop delay and ramp time, disconnect
board from the setup and populate a 1% standard 0603
resistor at R6placeholder location on bottom layer. Refer to
the “Soft Start/Stop Resistor Settings” table in the ISL8273M
datasheet for recommended values.
12. To change UVLO, disconnect board from the setup and
populate a 1% standard 0603 resistor at the R6placeholder
location on bottom layer. Refer to the “UVLO Resistor Settings”
table in the ISL8273M datasheet for recommended values.
Notice that the UVLO programming shares the same pin with
soft-start/stop programming.
13. To change ASCR gain and residual, disconnect board from the
setup and populate a 1% standard 0603 resistor at the R7
placeholder location on bottom layer. Refer to the “ASCR
Resistor Settings” table and the design guide matrix in the
ISL8273M datasheet for recommended values.
PMBus Option
ISL8273MEVAL1Z can be evaluated for all features using the
provided ZLUSBEVAL3Z dongle and PowerNavigator™ evaluation
software. Follow these steps to evaluate theISL8273M with
PMBus option.
1. Install PowerNavigator™ software from the following Intersil
website: www.intersil.com/powernavigator
2. Set ENABLE switch to “DISABLE”.
3. Connect Load to VOUT lug connectors (J7-J8 and J9-J10).
4. Connect power supply to VIN connectors (J5 and J6). Make
sure power supply is not enabled when making connection.
5. Connect the ZLUSBEVAL3Z dongle (USB to PMBus™ adapter)
to the ISL8273MEVAL1Z board using the 6-pin male
connector labeled “PMBus DONGLE IN”.
6. Turn power supply on.
7. Connect supplied USB cable from computer USB to
ZLUSBEVAL3Z dongle.
8. Launch PowerNavigator™ software.
9. It is optional to load a predefined setup from a configuration
file using the PowerNavigator™ software. The ISL8273M
device on the board operates in pin-strap mode from factory
default, but the user may modify the operating parameters
through the evaluation software or by loading a predefined
set-up from a configuration file. A sample “Configuration File”
on page 7 is provided and can be copied to a notepad editor
to make desired changes. The default pin-strap
configurations will be overwritten if a user-defined
configuration file is loaded.
10. Set the ENABLE switch to “ENABLE”. Alternatively, the PMBus
ON_OFF_CONFIG and OPERATION commands may be used
from the PowerNavigator™ software to allow PMBus Enable.
11. Monitor and configure the ISL8273MEVAL1Z board using the
PMBus commands in the evaluation software. To store the
configuration changes, disable the module and use the
command STORE_USER_ALL. To restore factory default

UG036 Rev 0.00 Page 4 of 17
August 7, 2015
lSL8273MEVAL1Z
settings, disable the module and use the command
RESTORE_FACTORY and STORE_USER_ALL.
12. PowerNavigator™ tutorial videos are available on the Intersil
website. www.intersil.com/powernavigator
13. For sequencing via Digital-DC Bus (DDC) or to evaluate
multiple Intersil digital power products using a single
ZLUSBEVAL3Z dongle, the ISL8273M can be daisy chained
with other digital power evaluation boards. The PMBus
address can be changed by placing a 1% standard 0603
resistor at the R4placeholder location on the bottom layer.
Refer to the “SMBus Address Resistor Selection” table in the
ISL8273M datasheet for recommended values.
Evaluation Board Information
If input voltage is less than 5.3V, tie the VCC test point directly to
VIN or to a separate 5V power supply for best efficiency.
If external synchronization is used, connect the SYNC test point to
the external clock. Note that the external clock signal should be
active before the module is enabled.
VOUT Transient Response Check
The ISL8273MEVAL1Z board has a built-in transient load test
circuit (see the schematic in Figure 4). A 100A N-Channel
MOSFET (Manufacturer PN: BSC010NE2LSI) is connected across
VOUT and PGND next to the remote voltage sensing location
(CVSEN). A 10mΩcurrent-sense resistor R54 is used for
monitoring the drain-to-source current of the MOSFET. For a
transient load test, inject the gate drive pulse signal at J16. The
load current can be monitored through J15. Because the MOSFET
will operate in the saturation region instead of the linear region
when the gate turn-on signal is applied, the pulse width and duty
cycle of the gate signal must be limited small enough to avoid
MOSFET overheating (recommended duty cycle should be less
than 2%). The amplitude of the gate driver pulse voltage can be
adjusted to obtain a desired transient load current step size.
Thermal Considerations and
Current Derating
Board layout is very critical in order to make the module operate
safely and deliver maximum allowable power. To work in the high
temperature environments and carry large currents, the board
layout needs to be carefully designed to maximize thermal
performance. To achieve this, select enough trace width, copper
weight and the proper connectors.
The ISL8273MEVAL1Z evaluation board is designed for running
80A at room temperature without additional cooling systems
needed. However, if the output voltage is increased or the board
is operated at elevated temperatures, then the available current
is derated. Refer to the derated current curves in the ISL8273M
datasheet to determine the maximum output current the
evaluation board can supply. JA is measured by inserting a
thermocouple inside the module to measure peak junction
temperature.
PCB Layout Guidelines
The ISL8273MEVAL1Z board layout has been optimized for
electrical performance, low loss and good thermal performance.
The key features of the ISL8273MEVAL1Z layout are:
• Large PGND planes and a separate SGND plane. The SGND
plane is connected to PGND on the second layer with a single
point connection. Multiple vias are used for small pins such as
J16, H16, K16, M5, M14, M17 and N5 to connect to inner
SGND or PGND layer.
• Ceramic capacitors between VIN and PGND, VOUT and PGND,
and bypass capacitors between VDD, VDRV and the ground
plane are placed close to the module to minimize high
frequency noise. Some output ceramic capacitors are placed
close to the VOUT pads in the direction of the load current path
to create a low impedance path for the high frequency inductor
ripple current.
• Large copper areas are used for power path (VIN, PGND, VOUT)
to minimize conduction loss and thermal stress. Multiple vias
are used to connect the power planes in different layers.
• Remote sensing traces are connected from the regulation
point to VSENP and VSENN pins. The two traces are placed in
parallel, to achieve tight output voltage regulation. The
regulation point is on the right side of the board in between the
VOUT power lugs and the PGND power lugs.
• Multiple vias are used to connect PAD14 and 16 (SW1 and
SW2) to inner layers for better thermal performance. The inner
layer SW1 and SW2 traces are limited in area and are
surrounded by PGND planes to avoid noise coupling. Caution
was taken that no sensitive traces, such as the remote sensing
traces, were placed close to these noisy planes.
• SWD1 (L3) and SWD2 (P10) pins are connected to SW1 and
SW2 pads respectively with short loop wires of 40mil width.
The wire width should be at least 20mils.
FIGURE 4. SCHEMATIC FOR TRANSIENT LOAD MEASUREMENT
VOUT
J16
47k
10m
J15
BSC010NE2LSI
TRANSIENT LOAD
PULSE INPUT
TRANSIENT LOAD
MONITOR



UG036 Rev 0.00 Page 5 of 17 August 7, 2015
lSL8273MEVAL1Z
ISL8273MEVAL1Z Schematic
FIGURE 5. SCHEMATIC
RELEASED BY:
DRAW N BY:
SHEET
HRDWR ID
DATE:
DATE:
DATE:
TESTER
FILENAME:
MASK# REV.
OF
DATE:ENGINEER:
TITLE:
UPDATED BY:
TIM KLEMANN
ISL8273M/ISL8273MEVAL1ZA
11/14/2014
11
ISL8273MEVAL1Z
SCHEMATIC
EVALUATION BOARD
ISL8273M 80A
TAO TAO
TIM KLEMANN
04/21/2015
A1
GND
TO SEQUEL
FROM PREQUELFROM PREQUEL
TO SEQUEL
GND
PGND TIED TO SGND
DISABLE
ENABLE
UNDER DUT
COMMUNICATION CONNECTION INTER-DEVICE CONNECTION
DDC
DDC
EN
PG
PG
PG
PHASE1
PHASE2
SA
SALRT
SALRT
SCL
SCL
SDA
SDA
SYNC
SYNC
UVLO
V25
VCC
VCC
VCC
VCC
VCC
VI2C
VIN
VMON
VOUT
VOUT
VOUT
VOUT
VR5
VR55
VR6
VSENN
VSENP
R3
4.75K
J15
R5
DNP
TP8
J10
C1
0.1UF
SW1
1
2
3
TP3
3
5
12
4
6
J2
1 2
3 4
5 6
TP6
3
5
12
4
6
J3
1 2
3 4
5 6
C3
470UF
R54 0.01
C6
22UF
100UF
C27
SCL
SDA
SALRT
VIN VIN VIN
PGND
NC
VDRV1
SA
VDRV1
NC
VSET
EN
VOUT
VSENP
VSENN
VOUT
NC
NC
PG
ASCR
VDRV
VDRV
SS/UVLO
CS
MGN
PGND PGND
VCC
V25
VR5 VR6
SWD2
SWD1
SW1
PGND
SW2
PGND
PGND
PGND
PGND
PGND
VMON
SGND
SGND
SGND
SGND
SGND
DDC
SYNC
PGND PGND
VR
VR55
NC
NC
VDD
U1
ISL8273MAIRZ
PAD6
M14
K16
J16
H16
C9
D4
C7
C8
C5
C6
G4
F4
D13
E4
C10
C11
C12
C13
PAD8
N6 PAD9
N16 PAD11
M1
G15 K14
L14
M13 L2
M10
PAD10 PAD12 R8
M5 R17
M17
N5 E14
D14
G14
D5
F15
E15
PAD15
PAD16
P11
PAD7
PAD4
PAD2
H3
H4
PAD13
PAD14
L3
PAD5
PAD3
PAD1
J8
3
5
12
4
6
J1
1 2
3 4
5 6
TP5
C23
100UF
R4
DNP
R57
47K
DNP
R6
100UF
C21
J7
J5
DNP
R7
RVSET
21.5K
C16
100UF
C8
10UF
C30
100UF
1.5K
R8
J16
47UF
C7
0
R12
C12 10UF
22UF
CVSEN
J6
22UF
C5
470UF
C18
470UF
C24
TP2
C13
100UF
TP4
0
R11
R13
200
R10 10K
RED GRN
D1
I00000273
12 34
47UF
C26
C31
470UF
22UF
C4
100UF
C14
100UF
C28
12
J11
C17
10UF
470UF
C19
C9
10UF
470UF
C25
TP1
TP12
C2
22UF
C22
100UF
TP9
6.65K
R2
TP11
2N7002L
Q1
1
2
3
10UF
C10
C32
470UF
RFSET
17.8K
BSC010NE2LSI
U2
1
2
3
4 5
6
7
8
C29
100UF
R1
100K
TP10
C20
100UF
10UF
C11
J9
1.5K
R9
100UF
C15
TP7
3
5
12
4
6
J4
1 2
3 4
5 6

UG036 Rev 0.00 Page 6 of 17
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lSL8273MEVAL1Z
Bill of Materials
REFERENCE DESIGNATORS QTY MANUFACTURER MANUFACTURER PART DESCRIPTION
C1 1 PANASONIC ECJ-2VB1E104K CAP, SMD, 0805, 0.1µF, 25V, 10%, X7R, ROHS
CVSEN 1 JOHANSON
DIELECTRICS INC
6R3R15X226KV4E CAP, SMD, 0805, 22µF, 6.3V, 10%, X5R, ROHS
C8, C9, C10, C11, C12, C17 6 VENKEL C1206X7R250-106KNE CAP, SMD, 1206, 10µF, 25V, 10%, X7R, ROHS
C13-C16, C20-C23, C27-C30 12 MURATA GRM31CR60J107ME39L CAP, SMD, 1206, 100µF, 6.3V, 20%, X5R, ROHS
C2, C4, C5, C6 4 MURATA GRM32ER71C226KE18L CAP, SMD, 1210, 22µF, 16V, 10%, X7R, ROHS
C7, C26 2 TDK C3225X5R1C476M CAP, SMD, 1210, 47µF, 16V, 20%, X5R, ROHS
C18, C19, C24, C25, C31, C32 6 SANYO 6TPE470MI CAP-POSCAP, LOW ESR, SMD, D4, 470µF, 6.3V, 20%,
18mΩ, ROHS
C3 1 PANASONIC EEE-1EA471P CAP, SMD, 10mm, 470µF, 25V, 20%, ALUM.ELEC.,
380mA, ROHS
J5, J6 2 JOHNSON
COMPONENTS
108-0740-001 CONN-JACK, BANANA-SS-SDRLESS, VERTICAL, ROHS
TP1-TP12 12 KEYSTONE 5005 CONN-COMPACT TEST PT, VERTICAL, RED, ROHS
J11, J15, J16 3 BERG/FCI 69190-202HLF CONN-HEADER, 1x2, RETENTIVE, 2.54mm, 0.230x0.120,
ROHS
J2, J4 2 SAMTEC SSQ-103-02-T-D-RA CONN-SOCKET STRIP, TH, 2x3, 2.54mm, TIN, R/A, ROHS
J1, J3 2 SAMTEC TSW-103-08-T-D-RA CONN-HEADER, 2x3, BRKAWY, 2.54mm, TIN, R/A, ROHS
D1 1 LUMEX SSL-LXA3025IGC-TR LED, SMD, 3x2.5mm, 4P, RED/GREEN, 12/20MCD, 2V
U1 1 INTERSIL ISL8273MAIRZ IC-80A DIGITAL DC/DC MODULE, 42P, HDA, ROHS
Q1 1 ON SEMICONDUCTOR 2N7002LT1G TRANSISTOR-MOS, N-CHANNEL, SMD, SOT23, 60V,
115mA, ROHS
U2 1 INFINEON
TECHNOLOGY
BSC010NE2LSI TRANSIST-MOS, N-CHANNEL, 8P, PG-TDSON-8, 25V, 100A,
ROHS
R4-R7 0 RESISTOR, SMD, 0603, 0.1%, MF, DNP-PLACE HOLDER
R11, R12 2 VENKEL CR0603-10W-000T RES, SMD, 0603, 0Ω, 1/10W, TF, ROHS
R10 1 KOA RK73H1JT1002F RES, SMD, 0603, 10k, 1/10W, 1%, TF, ROHS
R1 1 VENKEL CR0603-10W-1003FT RES, SMD, 0603, 100k, 1/10W, 1%, TF, ROHS
R8, R9 2 VENKEL CR0603-10W-1501FT RES, SMD, 0603, 1.5k, 1/10W, 1%, TF, ROHS
RFSET 1 PANASONIC ERJ-3EKF1782V RES, SMD, 0603, 17.8k, 1/10W, 1%, TF, ROHS
R13 1 VENKEL CR0603-10W-2000FT RES, SMD, 0603, 200Ω, 1/10W, 1%, TF, ROHS
RVSET 1 VENKEL CR0603-10W-2152FT RES, SMD, 0603, 21.5k, 1/10W, 1%, TF, ROHS
R57 1 YAGEO RC0603FR-0747KL RES, SMD, 0603, 47k, 1/10W, 1%, TF, ROHS
R3 1 VENKEL CR0603-10W-4751FT RES, SMD, 0603, 4.75k, 1/10W, 1%, TF, ROHS
R2 1 YAGEO RC0603FR-076K65L RES, SMD, 0603, 6.65k, 1/10W, 1%, TF, ROHS
R54 1 VISHAY WSL2512R0100FEA RES-CURR.SENSE, SMD, 2512, 0.01Ω, 1W, 1%, ROHS
SW1 1 C&K COMPONENTS GT13MCBE SWITCH-TOGGLE, THRU-HOLE, 5PIN, SPDT, 3POS, ON-OFF-
ON, ROHS
J7-J10 4 BERG/FCI KPA8CTP HDWARE,MTG, CABLE TERMINAL,6-14AWG, LUG and
SCREW, ROHS

UG036 Rev 0.00 Page 7 of 17
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lSL8273MEVAL1Z
Configuration File
Sample Configuration File for ISL8273M Module. Copy and paste (from RESTORE_FACTORY TO ### End User Store) to a notepad and
save it as Confile_file_name.txt. The # symbol is used for a comment line. Following settings are already loaded to ISL8273M module
as factory defaults.
RESTORE_FACTORY # reset device to the factory setting
STORE_USER_ALL # Clears user memory space
# VOUT Related
VOUT_COMMAND
VOUT_MAX
VOUT_MARGIN_HIGH
VOUT_MARGIN_LOW
VOUT_OV_FAULT_LIMIT
VOUT_OV_FAULT_RESPONSE 0x80 # Disable and no retry
VOUT_OV_WARN_LIMIT
VOUT_UV_WARN_LIMIT
VOUT_UV_FAULT_LIMIT
VOUT_UV_FAULT_RESPONSE 0x80 # Disable and no retry
POWER_GOOD_ON
VOUT_TRANSITION_RATE 0xba00 # 1 mV/us
VOUT_DROOP 0x0000 # 0 mV/A
VOUT_CAL_OFFSET 0x0000 # 0 mV/A
# IOUT Related
IOUT_CAL_GAIN 0xb370 # 0.86 mV/A
IOUT_CAL_OFFSET 0x0000 # 0 A
IOUT_OC_FAULT_LIMIT
IOUT_UC_FAULT_LIMIT
MFR_IOUT_OC_FAULT_RESPONSE 0x80 # Disable and no retry
MFR_IOUT_UC_FAULT_RESPONSE 0x80 # Disable and no retry
ISENSE_CONFIG
# Other Faults
OT_FAULT_LIMIT 0xebe8 # 125 °C
OT_FAULT_RESPONSE 0x80 # Disable and no retry
OT_WARN_LIMIT 0xeb70 # 110 °C
UT_WARN_LIMIT 0xdc40 # -30 °C
UT_FAULT_LIMIT 0xe530 # -45 °C
UT_FAULT_RESPONSE 0x80 # Disable and no retry
VIN_OV_FAULT_LIMIT 0xd380 # 14 V
VIN_OV_FAULT_RESPONSE 0x80 # Disable and no retry
VIN_OV_WARN_LIMIT 0xd353 # 13.3 V
VIN_UV_WARN_LIMIT 0xca5d # 4.73 V
VIN_UV_FAULT_LIMIT 0xca40 # 4.5 V
VIN_UV_FAULT_RESPONSE 0x80 # Disable and no retry
#Enable, Timing and Sequence Related
ON_OFF_CONFIG 0x16 # Pin Enable, Soft Off
TON_DELAY 0xca80 # 5 ms
TON_RISE 0xca80 # 5 ms
TOFF_DELAY 0xca80 # 5 ms
TOFF_FALL 0xca80 # 5 ms
POWER_GOOD_DELAY 0xca00 # 4 ms
FREQUENCY_SWITCH
SYNC_CONFIG 0x00 # Use Pin-strap for FSW setting
SEQUENCE 0x0000 # Sequence Disabled
# Manufacturer Related
MFR_ID Intersil Corp # Example Only
MFR_MODEL # Example Only
MFR_REVISION Rev-1 # Example Only
MFR_LOCATION Milpitas, CA # Example Only
MFR_DATE 09/05/2014 # Example Only
MFR_SERIAL 1234 # Example Only
USER_DATA_00 Module # Example Only
# Advance Settings
USER_CONFIG 0x80 # ASCR on for Start, Open Drain PG
DDC_CONFIG 0x0a01 # DDC rail ID = 10, 2-phase
DDC_GROUP 0x00000000 # All Broadcast disabled
# Loop Compensation
ASCR_CONFIG # ASCR gain = , Residual =
STORE_USER_ALL # Store all above settings to NVRAM
### End User Store

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lSL8273MEVAL1Z
Layout
FIGURE 6. SILKSCREEN TOP
FIGURE 7. TOP LAYER COMPONENT SIDE

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lSL8273MEVAL1Z
FIGURE 8. LAYER 2
FIGURE 9. LAYER 3
Layout (Continued)

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FIGURE 10. LAYER 4
FIGURE 11. LAYER 5
Layout (Continued)