Samsung S3C8248 User manual

23-S3-C8248/C8245/P8245/C8247/C8249/P8249-032002
USER'S MANUAL
S3C8248/C8245/P8245
/C8247/C8249/P8249
8-Bit CMOS
Microcontrollers
Revision 3

S3C8248/C8245/P8245/C8247/C8249/P8249 PRODUCT OVERVIEW
1-1
1PRODUCT OVERVIEW
S3C8-SERIES MICROCONTROLLERS
Samsung's S3C8 series of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range
of integrated peripherals, and various mask-programmable ROM sizes. Among the major CPU features are:
—Efficient register-oriented architecture
—Selectable CPU clock sources
—Idle and Stop power-down mode release by interrupt
—Built-in basic timer with watchdog function
A sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more
interrupt sources and vectors. Fast interrupt processing (within a minimum of four CPU clocks) can be assigned
to specific interrupt levels.
S3C8248/C8245/P8245/C8247/C8249/P8249 MICROCONTROLLER
The S3C8248/C8245/P8245/C8247/C8249/P8249
single-chip CMOS microcontroller are fabricated
using the highly advanced CMOS process, based on
Samsung’s newest CPU architecture.
The S3C8248, S3C8245, S3C8247, S3C8249 are a
microcontroller with a 8K-byte, 16K-byte, 24K-byte.
32K-byte mask-programmable ROM embedded
respectively.
The S3P8245 is a microcontroller with a 16K-byte
one-time-programmable ROM embedded.
The S3P8249 is a microcontroller with a 32K-byte
one-time-programmable ROM embedded.
Using a proven modular design approach, Samsung
engineers have successfully developed the
S3C8248/C8245/P8245/C8247/C8249/P8249 by
integrating the following peripheral modules with the
powerful SAM8 core:
—Six programmable I/O ports, including five 8-bit
ports and one 5-bit port, for a total of 45 pins.
—Eight bit-programmable pins for external
interrupts.
—One 8-bit basic timer for oscillation stabilization
and watchdog functions (system reset).
—Two 8-bit timer/counter and two 16-bit
timer/counter with selectable operating modes.
—Watch timer for real time.
—8-input A/D converter
—Serial I/O interface
The S3C8248/C8245/P8245/C8247/C8249/P8249
is versatile microcontroller for camera, LCD and
ADC application, etc. They are currently available in
80-pin TQFP and 80-pin QFP package
OTP
The S3P8245/P8249 are OTP (One Time Programmable) version of the S3C8245/C8249 microcontroller. The
S3P8245 microcontroller has an on-chip 16K-byte one-time-programmable EPROM instead of a masked ROM.
The S3P8249 microcontroller has an on-chip 32K-byte one-time-programmable EPROM instead of a masked
ROM. The S3P8245 is comparable to the S3P8245, both in function and in pin configuration.
The S3P8249 is comparable to the S3P8249, both in function and in pin configuration.

PRODUCT OVERVIEW S3C8248/C8245/P8245/C8247/C8249/P8249
1-2
FEATURES
Memory
•ROM: 32K-byte (S3C8249/P8249)
•ROM: 16K-byte (S3C8245/P8245)
•RAM: 1056-Byte (S3C8249/P8249, S3C8247)
•RAM: 544-Byte (S3C8245/P8245, S3C8248)
•Data memory mapped I/O
Oscillation Sources
•Crystal, ceramic, RC (main)
•Crystal for subsystem clock
•Main system clock frequency 1-10 MHz
(3 MHz at 1.8 V, 10 MHz at 2.7 V)
•Subsystem clock frequency: 32.768 kHz
•CPU clock divider (1/1, 1/2, 1/8, 1/16)
Two Power-Down Modes
•Idle (only CPU clock stops)
•Stop (System clock stops)
Interrupts
•6 level 8 vector 8 internal interrupt
•2 level 8 vector 8 external interrupt
45 I/O Pins
•45 configurable I/O pins
Basic Timer
•Overflow signal makes a system reset.
•Watchdog function
8-Bit Timer/Counter A
•Programmable 8-bit timer
•Interval, capture, PWM mode
•Match/capture, overflow interrupt
8-Bit Timer/Counter B
•Programmable 8-bit timer
•Carrier frequency generator
16-Bit Timer/Counter 0
•Programmable 16-bit timer
•Match interrupt generates
16-Bit Timer/Counter 1
•Programmable 16-bit timer
•Interval, capture, PWM mode
•Match/capture, overflow interrupt
Watch Timer
•Real-time and interval time measurement
•Clock generation for LCD
•Four frequency outputs for buzzer sound
LCD Controller/Driver
•Maximum 16-digit LCD direct drive capability
•Display modes: static, 1/2 duty (1/2 bias)
•1/3 duty (1/2 or 1/3 bias), 1/4 duty (1/3 bias)
A/D Converter
•Eight analog input channels
•50 µs conversion speed at 1 MHz fADC clock
•10-bit conversion resolution
8-Bit Serial I/O Interface
•8-bit transmit/receive mode
•8-bit receive mode
•LSB-first/MSB-first transmission selectable
•Internal/external clock source
Voltage Booster
•LCD display voltage supply
•S/W control en/disable
•3.0 V drive
Voltage Detector
•Programmable detection voltage
(2.2 V, 2.4 V, 3.0 V, 4.0 V)
•En/Disable S/W selectable
Instruction Execution Times
•400 ns at 10 MHz (main)
•122 us at 32.768 kHz (subsystem)
Operating Temperature Range
•-40 °C to 85 °C
Operating Voltage Range
•1.8 V to 5.5 V
Package Type
•80-pin QFP
•80-pin TQFP
S3C8249’s ROM version device
•S3C8247 (ROM 24K-byte)
S3C8245’s ROM version device
•S3C8248 (ROM 8K-byte)

S3C8248/C8245/P8245/C8247/C8249/P8249 PRODUCT OVERVIEW
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BLOCK DIAGRAM
544/1056 Byte
Register File
OSC/
RESET Basic Timer Watch Timer
I/O Port and Interrupt Control
16/32-Kbyte
ROM
SAM88 RC CPU
8-Bit
Timer/
Counter B
16-Bit
Timer/
Counter 0
16-Bit
Timer/
Counter 1
I/O Port 0
I/O Port 1
A/D
Converter
I/O Port 2
8-Bit
Timer/
Counter A
I/O Port 3
TAOUT/TAPWM/P3.1
TACLK/P3.2
TACAP/P3.3
TBPWM/P3.0
T1CAP/P1.0
T1CLK/P1.1
T1OUT/T1PWM/P1.2
P0.0-P0.7/
INT0-INT7
P1.0-P1.7
AVREF
AVSS
P2.0-P2.7/
ADC0-ADC7
LCD
Driver
Serial I/O
Port
P3.0-P3.4
Voltage
Detector VVLDREF
I/O Port 5
I/O Port 4
Voltage
Booster CB
CA
VLC0-VLC2
COM0-COM3
SEG0-SEG15
SEG16-SEG31
SI/P1.7
SO/P1.5
SCK/P1.6
P4.0-P4.7
P5.0-P5.7
RESET BUZ/P1.4
XOUT XTOUT
XIN XTIN
Figure 1-1. Block Diagram

PRODUCT OVERVIEW S3C8248/C8245/P8245/C8247/C8249/P8249
1-4
PIN ASSIGNMENT
SEG25/P5.1 SEG24/P5.0 SEG23/P4.7 SEG22/P4.6 SEG21/P4.5 SEG20/P4.4 SEG19/P4.3 SEG18/P4.2 SEG17/P4.1 SEG16/P4.0 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10
SEG26/P5.2
SEG27/P5.3
SEG28/P5.4
SEG29/P5.5
SEG30/P5.6
SEG31/P5.7
P3.0/TBPWM
P3.1/TAOUT/TAPWM
P3.2/TACLK
P3.3/TACAP/SDAT
P3.4/SCLK
VDD
VSS
XOUT
XIN
TEST
XTIN
XTOUT
RESET
P0.0/INT0
P0.1/INT1
P0.2/INT2
P0.3/INT3
P0.4/INT4
S3C8248/C8245
/C8247/C8249
(80-QFP-1420C)
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
25 26 27 28 28 30 31 32 33 34 35 36 37 38 39 40
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
COM3
COM2
COM1
COM0
VLC2
VLC1
VLC0
CA
CB
AVSS
AVREF
P2.7/ADC7/VVLDREF
P2.6/ADC6
P2.5/ADC5
P0.5/INT5 P0.6/INT6 P0.7/INT7
P1.0/T1CAP
P1.1/T1CLK
P1.2/T1OUT/T1PWM
P1.3
P1.4/BUZ
P1.5/SO
P1.6/SCK
P1.7/SI
P2.0/ADC0 P2.1/ADC1 P2.2/ADC3 P2.3/ADC4 P2.4/ADC4
Figure 1-2. S3C8248/C8245/C8247/C8249 Pin Assignments (80-QFP)

S3C8248/C8245/P8245/C8247/C8249/P8249 PRODUCT OVERVIEW
1-5
SEG25/P5.1 SEG24/P5.0 SEG23/P4.7 SEG22/P4.6 SEG21/P4.5 SEG20/P4.4 SEG19/P4.3 SEG18/P4.2 SEG17/P4.1 SEG16/P4.0 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6
SEG26/P5.2
SEG27/P5.3
SEG28/P5.4
SEG29/P5.5
SEG30/P5.6
SEG31/P5.7
P3.0/TBPWM
P3.1/TAOUT/TAPWM
P3.2/TACLK
P3.3/TACAP/SDAT
P3.4/SCLK
V DD
V SS
X OUT
X IN
TEST
XT IN
XT OUT
RESET
P0.0/INT0
S3C8248/C8245
/C8247/C8249
(80-TQFP-1212)
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
21 22 23 24 25 26 27 28 28 30 31 32 33 34 35 36 37 38 39 40
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
COM3
COM2
COM1
COM0
V LC2
V LC1
V LC0
CA
CB
AV SS
AV REF
P2.7/ADC7/V LDREF
P2.6/ADC6
P2.5/ADC5
P0.1/INT1 P0.2/INT2 P0.3/INT3 P0.4/INT4 P0.5/INT5 P0.6/INT6 P0.7/INT7
P1.0/T1CAP
P1.1/T1CLK
P1.2/T1OUT/T1PWM
P1.3
P1.4/BUZ
P1.5/SO
P1.6/SCK
P1.7/SI
P2.0/ADC0 P2.1/ADC1 P2.2/ADC3 P2.3/ADC4 P2.4/ADC4
Figure 1-3. S3C8248/C8245/C8247/C8249 Pin Assignments (80-TQFP)

PRODUCT OVERVIEW S3C8248/C8245/P8245/C8247/C8249/P8249
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PIN DESCRIPTIONS
Table 1-1. S3C8248/C8245/C8247/C8249 Pin Descriptions
Pin
Names Pin Type Pin Description Circuit Type Pin
Numbers (note) Share
Pins
P0.0–P0.7 I/O I/O port with bit programmable pins;
Schmitt trigger input or output mode
selected by software; software assignable
pull-up. P0.0–P0.7 can be used as inputs
for external interrupts INT0–INT7
(with noise filter and interrupt control).
D–4 20–27 INT0–INT7
P1.0–1.7 I/O I/O port with bit programmable pins; Input
or output mode selected by software;
Open-drain output mode can be selected
by software; software assignable pull-up.
Alternately P1.0–P1.7 can be used as SI,
SO, SCK, BUZ, T1CAP, T1CLK, T1OUT,
T1PWM
E–2 28-35 SI, SO, SCK,
BUZ, T1CAP
T1CLK
T1OUT
T1PWM
P2.0–P2.7 I/O I/O port with bit programmable pins;
normal input and AD input or output
mode selected by software; software
assignable pull-up.
F–10
F–18 36–42, 43 ADC0–ADC6
VVLDREF
(ADC7)
P3.0–P3.4 I/O I/O port with bit programmable pins. Input
or push-pull output with software
assignable pull-up. Alternately P3.0–P3.3
can be used as TACAP, TACLK, TAOUT,
TAPWM, TBPWM
D–2 7–11 TACAP
TACLK
TAOUT
TAPWM
TBPWM
P4.0–P4.7 I/O I/O port with bit programmable pins.
Push-pull or open drain output and input
with software assignable pull-up.
P4.0–P4.7 can alternately be used as
outputs for LCD SEG
H–14 71–78 SEG16–SEG23
P5.0–P5.7 I/O Have the same characteristic as port 4 H–14 79–6 SEG24–SEG31

S3C8248/C8245/P8245/C8247/C8249/P8249 PRODUCT OVERVIEW
1-7
Table 1-1. S3C8248/C8245/C8247/C8249 Pin Descriptions (Continued)
Pin
Names Pin Type Pin Description Circuit Type Pin
Numbers (note) Share
Pins
ADC0–ADC6
ADC7 IA/D converter analog input channels F–10 F–18 36–42 43 P2.0–P2.6 P2.7
AVREF –A/D converter reference voltage – 44 –
AVSS –A/D converter ground – 45 –
INT0–INT7 IExternal interrupt input pins D–4 20–27 P0.0–P0.7
RESET ISystem reset pin
(pull-up resistor: 250 kΩ)B19 –
TEST I0 V: Normal MCU operating
5 V: Test mode
12 V: for OTP writing
– 16 –
SDAT, SCLK OSerial OTP interface pins; serial data
and clock D–2 10, 11 P3.3, P3.4
VDD, VSS –Power input pins for CPU operation
(internal) and Power input for OTP
Writing
–12, 13 –
XOUT, XIN –Main oscillator pins –14, 15 –
SCK, SO, SI I/O Serial I/O interface clock signal E–2 33–35 P1.5–P1.7
VVLDREF IVoltage detector reference voltage
input F–18 43 P2.7
TACAP ITimer A Capture input D–2 10 P3.3
TACLK ITimer A External clock input D–2 9P3.2
TAOUT/TAPWM OTimer A output and PWM output D–2 8P3.1
TBPWM OTimer B PWM output D–2 7P3.0
T1CAP ITimer 1 Capture input E–2 28 P1.0
T1CLK ITimer 1 External clock input E–2 29 P1.1
T1OUT/T1PWM OTimer 1 output and PWM output E–2 30 P1.2
COM0–COM3 OLCD common signal output H51–54 –
SEG0–SEG15 OLCD segment output H55–70 –
SEG16–SEG23 OLCD segment output H–14 71–78 P4.0–P4.7
SEG24–SEG31 OLCD Segment output H–14 79–6 P5.0–P5.7
VLC0–VLC2 OLCD power supply – 48–50 –
BUZ O0.5, 1, 2 or 4 kHz frequency output for
buzzer sound with 4.19 MHz main
system clock or 32768 Hz subsystem
clock
E–2 32 P1.4
CA, CB –Capacitor terminal for voltage booster – 46–47 –

PRODUCT OVERVIEW S3C8248/C8245/P8245/C8247/C8249/P8249
1-8
PIN CIRCUITS
In
VDD
Figure 1-4. Pin Circuit Type B (RESETRESET)
P-Channel
N-Channel
V DD
Out
Output
Disable
Data
Figure 1-5. Pin Circuit Type C
P-Channel
I/O
Output
Disable
Data Circuit
Type C
Pull-up
Enable
VDD
Figure 1-6. Pin Circuit Type D-2 (P3)
I/O
Output
Disable
Data Pin Circuit
Type C
Pull-up
Enable
VDD
Noise
Filter
Ext.INT
Input
Normal
VDD
Figure 1-7. Pin Circuit Type D-4 (P0)

S3C8248/C8245/P8245/C8247/C8249/P8249 PRODUCT OVERVIEW
1-9
VDD
Output
Disable
Data
Pull-up
Resistor
VDD
I/O
P-CH
N-CH
Schmitt Trigger
Open drain
Enable
Figure 1-8. Pin Circuit Type E-2 (P1)
Pull-up
Enable
Circuit
Type C
Data
Output
Disable
ADCEN
To ADC
Data
VDD
I/O
Figure 1-9. Pin Circuit Type F-10 (P2.0–P2.6)
Pull-up
Enable
Circuit
Type C
Data
Output
Disable
ADC & VLD
Enable
Data
To ADC
VLDREF
I/O
VDD
Figure 1-10. Pin Circuit Type F-18 (P2.7/VLDREF)
Out
VLC1
SEG/
COM
VLC0
VLC2
Figure 1-11. Pin Circuit Type H (SEG/COM)