Siemens SIMATIC S7-400H User guide

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SIMATIC
Fault-tolerant systems
S7-400H
System Manual
03/2012
A5E00267695-11
Preface
1
Fault-tolerant automation
systems
2
S7-400H setup options
3
Getting Started
4
Assembly of a CPU 41x–H
5
Special functions of a
CPU 41x-H
6
PROFIBUS DP
7
PROFINET
8
Consistent data
9
Memory concept
10
System and operating states
of the S7–400H
11
Link-up and update
12
Using I/Os in S7–400H
13
Communication
14
Configuring with STEP 7
15
Failure and replacement of
components during operation
16
System modifications during
operation
17
Continued on next page

Siemens AG
Industry Sector
Postfach 48 48
90026 NÜRNBERG
GERMANY
A5E00267695-11
Ⓟ 04/2012 Technical data subject to change
Copyright © Siemens AG 2012.
All rights reserved
Legal information

Fault-tolerant systems
S7-400H
System Manual
Continuation
Synchronization modules
18
S7-400 cycle and response
times
19
Technical data
20
Characteristic values of
redundant automation
systems
A
Stand-alone operation
B
Differences between fault-
tolerant systems and
standard systems
C
Function modules and
communication processors
supported by the S7-400H
D
Connection examples for
redundant I/Os
E

Legal information
Warning notice system
This manual contains notices you have to observe in order to ensure your personal safety, as well as to prevent
damage to property. The notices referring to your personal safety are highlighted in the manual by a safety alert
symbol, notices referring only to property damage have no safety alert symbol. These notices shown below are
graded according to the degree of danger.
DANGER
indicates that death or severe personal injury will result if proper precautions are not taken.
WARNING
indicates that death or severe personal injury may result if proper precautions are not taken.
CAUTION
with a safety alert symbol, indicates that minor personal injury can result if proper precautions are not taken.
CAUTION
without a safety alert symbol, indicates that property damage can result if proper precautions are not taken.
NOTICE
indicates that an unintended result or situation can occur if the relevant information is not taken into account.
If more than one degree of danger is present, the warning notice representing the highest degree of danger will
be used. A notice warning of injury to persons with a safety alert symbol may also include a warning relating to
property damage.
Qualified Personnel
The product/system described in this documentation may be operated only by personnel qualified for the specific
task in accordance with the relevant documentation, in particular its warning notices and safety instructions.
Qualified personnel are those who, based on their training and experience, are capable of identifying risks and
avoiding potential hazards when working with these products/systems.
Proper use of Siemens products
Note the following:
WARNING
Siemens products may only be used for the applications described in the catalog and in the relevant technical
documentation. If products and components from other manufacturers are used, these must be recommended
or approved by Siemens. Proper transport, storage, installation, assembly, commissioning, operation and
maintenance are required to ensure that the products operate safely and without any problems. The permissible
ambient conditions must be complied with. The information in the relevant documentation must be observed.
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All names identified by ® are registered trademarks of Siemens AG. The remaining trademarks in this publication
may be trademarks whose use by third parties for their own purposes could violate the rights of the owner.
Disclaimer of Liability
We have reviewed the contents of this publication to ensure consistency with the hardware and software
described. Since variance cannot be precluded entirely, we cannot guarantee full consistency. However, the
information in this publication is reviewed regularly and any necessary corrections are included in subsequent
editions.
Siemens AG
Industry Sector
Postfach 48 48
90026 NÜRNBERG
GERMANY
A5E00267695-11
Ⓟ 04/2012 Technical data subject to change
Copyright © Siemens AG 2012.
All rights reserved

S7-400H
System Manual, 03/2012, A5E00267695-11 5
Table of contents
1 Preface .................................................................................................................................................... 19
1.1 Preface.........................................................................................................................................19
2 Fault-tolerant automation systems........................................................................................................... 25
2.1 Redundant SIMATIC automation systems...................................................................................25
2.2 Increasing the availability of plants ..............................................................................................27
3 S7-400H setup options ............................................................................................................................ 31
3.1 S7-400H setup options ................................................................................................................31
3.2 Rules for the assembly of fault-tolerant stations..........................................................................33
3.3 The S7–400H basic system .........................................................................................................34
3.4 I/O modules for S7–400H.............................................................................................................36
3.5 Communication ............................................................................................................................37
3.6 Tools for configuration and programming....................................................................................38
3.7 The user program ........................................................................................................................39
3.8 Documentation.............................................................................................................................40
4 Getting Started ........................................................................................................................................ 41
4.1 Getting Started.............................................................................................................................41
4.2 Requirements...............................................................................................................................41
4.3 Hardware assembly and commissioning of the S7–400H ...........................................................42
4.4 Examples of the response of the fault-tolerant system to faults..................................................44
4.5 Special layout features of SIMATIC Manager..............................................................................45
5 Assembly of a CPU 41x–H....................................................................................................................... 47
5.1 Operator controls and display elements of the CPUs..................................................................47
5.2 Monitoring functions of the CPU ..................................................................................................52
5.3 Status and error displays .............................................................................................................55
5.4 Mode switch .................................................................................................................................60
5.4.1 Function of the mode switch ........................................................................................................60
5.4.2 Performing a memory reset .........................................................................................................62
5.4.3 Cold restart / Warm restart...........................................................................................................64

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5.5 Design and function of the memory cards .................................................................................. 65
5.6 Using memory cards ................................................................................................................... 67
5.7 Multi Point Interface MPI/DP (X1) ............................................................................................... 70
5.8 PROFIBUS DP interface (X2, X3)............................................................................................... 71
5.9 PROFINET interface (X5) ........................................................................................................... 71
5.10 Overview of the parameters for the S7-400H CPUs................................................................... 74
6 Special functions of a CPU 41x-H............................................................................................................ 77
6.1 Security levels ............................................................................................................................. 77
6.2 Encrypting blocks ........................................................................................................................ 79
6.3 Resetting the CPU to the factory state........................................................................................ 81
6.4 Updating the firmware without a memory card ........................................................................... 83
6.5 Firmware update in RUN mode .................................................................................................. 85
6.6 Reading service data .................................................................................................................. 86
7 PROFIBUS DP ........................................................................................................................................ 87
7.1 CPU 41x–H as PROFIBUS DP master ....................................................................................... 87
7.1.1 DP address ranges of CPUs 41x-H ............................................................................................ 88
7.1.2 CPU 41xH as PROFIBUS DP master......................................................................................... 88
7.1.3 Diagnostics of a CPU 41xH operating as PROFIBUS DP master.............................................. 91
8 PROFINET .............................................................................................................................................. 95
8.1 Introduction ................................................................................................................................. 95
8.2 PROFINET IO systems............................................................................................................... 97
8.3 Blocks in PROFINET IO.............................................................................................................. 99
8.4 System status lists for PROFINET IO ....................................................................................... 101
8.5 Device replacement without removable medium/programming device .................................... 103
8.6 Shared Device........................................................................................................................... 103
8.7 Media redundancy..................................................................................................................... 104
8.8 System redundancy .................................................................................................................. 106
9 Consistent data...................................................................................................................................... 111
9.1 Consistency of communication blocks and functions ............................................................... 112
9.2 Consistency rules for SFB 14 "GET" or read variable, and SFB 15 "PUT" or write variable.... 113
9.3 Consistent reading and writing of data from and to DP standard slaves/IO devices................ 113
10 Memory concept .................................................................................................................................... 117
10.1 Overview of the memory concept of S7-400H CPUs................................................................ 117

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11 System and operating states of the S7–400H........................................................................................ 121
11.1 Introduction ................................................................................................................................121
11.2 System states of the S7–400H...................................................................................................124
11.2.1 The system states of the S7-400H ............................................................................................124
11.2.2 Displaying and changing the system state of a fault-tolerant system........................................125
11.2.3 System status change from the STOP system state .................................................................126
11.2.4 System status change from the standalone mode system status .............................................126
11.2.5 System status change from the redundant system state...........................................................127
11.2.6 System diagnostics of a fault-tolerant system ...........................................................................128
11.3 The operating states of the CPUs..............................................................................................130
11.3.1 STOP mode ...............................................................................................................................131
11.3.2 STARTUP mode ........................................................................................................................132
11.3.3 LINK-UP and UPDATE modes ..................................................................................................133
11.3.4 RUN mode .................................................................................................................................133
11.3.5 HOLD mode ...............................................................................................................................135
11.3.6 ERROR-SEARCH mode............................................................................................................135
11.4 Self-test......................................................................................................................................137
11.5 Evaluation of hardware interrupts in the S7-400H system ........................................................140
12 Link-up and update................................................................................................................................ 141
12.1 Effects of link-up and updating...................................................................................................141
12.2 Conditions for link-up and update ..............................................................................................142
12.3 Link-up and update sequence....................................................................................................143
12.3.1 Link-up sequence.......................................................................................................................147
12.3.2 Update sequence.......................................................................................................................149
12.3.3 Switch to CPU with modified configuration or expanded memory configuration.......................152
12.3.4 Disabling of link-up and update..................................................................................................154
12.4 Time monitoring .........................................................................................................................155
12.4.1 Time response ...........................................................................................................................158
12.4.2 Determining the monitoring times ..............................................................................................159
12.4.3 Performance values for link-up and update ...............................................................................166
12.4.4 Influences on time response......................................................................................................167
12.5 Special features in link-up and update operations.....................................................................168
13 Using I/Os in S7–400H .......................................................................................................................... 169
13.1 Introduction ................................................................................................................................169
13.2 Using single-channel, one-sided I/Os ........................................................................................171
13.3 Using single-channel switched I/O.............................................................................................173
13.4 Connecting redundant I/O to the PROFIBUS DP interface .......................................................177
13.4.1 Signal modules for redundancy .................................................................................................187
13.4.2 Evaluating the passivation status ..............................................................................................206
13.5 Other options for connecting redundant I/Os.............................................................................207

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14 Communication...................................................................................................................................... 213
14.1 Communication services ........................................................................................................... 213
14.1.1 Overview of communication services........................................................................................ 213
14.1.2 PG communication.................................................................................................................... 214
14.1.3 OP communication.................................................................................................................... 215
14.1.4 S7 communication..................................................................................................................... 215
14.1.5 S7 routing.................................................................................................................................. 217
14.1.6 Time synchronization ................................................................................................................ 222
14.1.7 Data set routing......................................................................................................................... 224
14.1.8 SNMP network protocol ............................................................................................................ 226
14.1.9 Open Communication Via Industrial Ethernet........................................................................... 227
14.2 Basics and terminology of fault-tolerant communication .......................................................... 231
14.3 Usable networks........................................................................................................................ 235
14.4 Usable communication services ............................................................................................... 235
14.5 Communication via S7 connections..........................................................................................236
14.5.1 Communication via S7 connections - one-sided mode............................................................. 237
14.5.2 Communication via redundant S7 connections......................................................................... 240
14.5.3 Communication via point-to-point CP on the ET 200M............................................................. 241
14.5.4 Custom connection to single-channel systems......................................................................... 243
14.6 Communication via fault-tolerant S7 connections..................................................................... 244
14.6.1 Communication between fault-tolerant systems ....................................................................... 247
14.6.2 Communication between fault-tolerant systems and a fault-tolerant CPU ............................... 250
14.6.3 Communication between fault-tolerant systems and PCs ........................................................ 251
14.7 Communication performance.................................................................................................... 254
14.8 General issues regarding communication................................................................................. 256
15 Configuring with STEP 7........................................................................................................................ 259
15.1 Configuring with STEP 7........................................................................................................... 259
15.1.1 Rules for arranging fault-tolerant station components.............................................................. 260
15.1.2 Configuring hardware................................................................................................................ 260
15.1.3 Assigning parameters to modules in a fault-tolerant station ..................................................... 261
15.1.4 Recommendations for setting the CPU parameters ................................................................. 262
15.1.5 Networking configuration........................................................................................................... 263
15.2 Programming device functions in STEP 7 ................................................................................ 264

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16 Failure and replacement of components during operation ..................................................................... 265
16.1 Failure and replacement of components during operation ........................................................265
16.2 Failure and replacement of components during operation ........................................................265
16.2.1 Failure and replacement of a CPU ............................................................................................266
16.2.2 Failure and replacement of a power supply module..................................................................268
16.2.3 Failure and replacement of an input/output or function module ................................................269
16.2.4 Failure and replacement of a communication module...............................................................271
16.2.5 Failure and replacement of a synchronization module or fiber-optic cable ...............................272
16.2.6 Failure and replacement of an IM 460 and IM 461 interface module ........................................275
16.3 Failure and replacement of components of the distributed I/Os ................................................276
16.3.1 Failure and replacement of a PROFIBUS DP master ...............................................................276
16.3.2 Failure and replacement of a redundant PROFIBUS DP interface module ..............................277
16.3.3 Failure and replacement of a PROFIBUS DP slave ..................................................................278
16.3.4 Failure and replacement of PROFIBUS DP cables ...................................................................278
17 System modifications during operation .................................................................................................. 281
17.1 System modifications during operation......................................................................................281
17.2 Possible hardware modifications ...............................................................................................282
17.3 Adding components in PCS 7....................................................................................................286
17.3.1 PCS 7, step 1: Modification of hardware ...................................................................................287
17.3.2 PCS 7, step 2: Offline modification of the hardware configuration ............................................288
17.3.3 PCS 7, step 3: Stopping the reserve CPU.................................................................................288
17.3.4 PCS 7, step 4: Loading a new hardware configuration in the reserve CPU..............................289
17.3.5 PCS 7, step 5: Switch to CPU with modified configuration........................................................289
17.3.6 PCS 7, step 6: Transition to redundant system mode ...............................................................291
17.3.7 PCS 7, step 7: Editing and downloading the user program.......................................................292
17.3.8 PCS7, Using free channels on an existing module....................................................................293
17.3.9 Adding interface modules in PCS 7 ...........................................................................................294
17.4 Removing components in PCS 7...............................................................................................295
17.4.1 PCS 7, step 1: Editing the hardware configuration offline .........................................................296
17.4.2 PCS 7, step 2: Editing and downloading the user program.......................................................297
17.4.3 PCS 7, step 3: Stopping the reserve CPU.................................................................................298
17.4.4 PCS 7, step 4: Downloading a new hardware configuration to the reserve CPU......................298
17.4.5 PCS 7, step 5: Switching to CPU with modified configuration...................................................299
17.4.6 PCS 7, step 6: Transition to redundant system mode ...............................................................300
17.4.7 PCS 7, step 7: Modification of hardware ...................................................................................301
17.4.8 Removing interface modules in PCS 7 ......................................................................................302
17.5 Adding components in STEP 7..................................................................................................303
17.5.1 STEP 7, step 1: Adding hardware..............................................................................................304
17.5.2 STEP 7, step 2: Offline modification of the hardware configuration ..........................................305
17.5.3 STEP 7, step 3: Expanding and downloading OBs ...................................................................305
17.5.4 STEP 7, step 4: Stopping the reserve CPU...............................................................................306
17.5.5 STEP 7, step 5: Loading a new hardware configuration in the reserve CPU............................306
17.5.6 STEP 7, step 6: Switch to CPU with modified configuration......................................................307
17.5.7 STEP 7, step 7: Transition to redundant system mode .............................................................308
17.5.8 STEP 7, step 8: Editing and downloading the user program.....................................................309
17.5.9 STEP7, Using free channels on an existing module..................................................................310
17.5.10 Adding interface modules in STEP 7 .........................................................................................311

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17.6 Removing components in STEP 7 ............................................................................................ 313
17.6.1 STEP 7, step 1: Editing the hardware configuration offline ...................................................... 314
17.6.2 STEP 7, step 2: Editing and downloading the user program.................................................... 315
17.6.3 STEP 7, step 3: Stopping the reserve CPU.............................................................................. 315
17.6.4 STEP 7, step 4: Downloading a new hardware configuration to the reserve CPU................... 316
17.6.5 STEP 7, step 5: Switching to CPU with modified configuration................................................ 317
17.6.6 STEP 7, step 6: Transition to redundant system mode ............................................................ 318
17.6.7 STEP 7, step 7: Modification of hardware................................................................................. 319
17.6.8 STEP 7, step 8: Editing and downloading organization blocks................................................. 320
17.6.9 Removing interface modules in STEP 7 ................................................................................... 321
17.7 Editing CPU parameters ........................................................................................................... 323
17.7.1 Editing CPU parameters ........................................................................................................... 323
17.7.2 Step 1: Editing CPU parameters offline .................................................................................... 325
17.7.3 Step 2: Stopping the reserve CPU............................................................................................ 325
17.7.4 Step 3: Downloading a new hardware configuration to the reserve CPU................................. 326
17.7.5 Step 4: Switching to CPU with modified configuration.............................................................. 326
17.7.6 Step 5: Transition to redundant system mode .......................................................................... 328
17.8 Changing the CPU memory configuration ................................................................................ 329
17.8.1 Changing the CPU memory configuration ................................................................................ 329
17.8.2 Expanding load memory ........................................................................................................... 329
17.8.3 Changing the type of load memory ........................................................................................... 331
17.9 Re-parameterization of a module.............................................................................................. 334
17.9.1 Re-parameterization of a module.............................................................................................. 334
17.9.2 Step 1: Editing parameters offline............................................................................................. 335
17.9.3 Step 2: Stopping the reserve CPU............................................................................................ 336
17.9.4 Step 3: Downloading a new hardware configuration to the reserve CPU................................. 336
17.9.5 Step 4: Switching to CPU with modified configuration.............................................................. 337
17.9.6 Step 5: Transition to redundant system mode .......................................................................... 339
18 Synchronization modules....................................................................................................................... 341
18.1 Synchronization modules for S7–400H..................................................................................... 341
18.2 Installation of fiber-optic cables................................................................................................. 346
18.3 Selecting fiber-optic cables ....................................................................................................... 349
19 S7-400 cycle and response times.......................................................................................................... 355
19.1 Cycle time.................................................................................................................................. 356
19.2 Calculating the cycle time ......................................................................................................... 358
19.3 Different cycle times.................................................................................................................. 364
19.4 Communication load ................................................................................................................. 366
19.5 Response time .......................................................................................................................... 369
19.6 Calculating cycle and response times....................................................................................... 375
19.7 Examples of calculating the cycle and response times ............................................................ 376
19.8 Interrupt response time ............................................................................................................. 379
19.9 Example of calculation of the interrupt response time .............................................................. 381
19.10 Reproducibility of delay and watchdog interrupts ..................................................................... 382

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20 Technical data ....................................................................................................................................... 383
20.1 Technical specification of the CPU 412–5H PN/DP; (6ES7 412–5HK06–0AB0).......................383
20.2 Technical specifications of the CPU 414–5H PN/DP; (6ES7 414–5HM06–0AB0) ....................395
20.3 Technical specifications of the CPU 416–5H PN/DP; (6ES7 416–5HK06–0AB0).....................407
20.4 Technical specifications of the CPU 417–5H PN/DP; (6ES7 417–5HK06–0AB0).....................419
20.5 Technical data of memory cards................................................................................................431
20.6 Runtimes of the FCs and FBs for redundant I/Os......................................................................432
A Characteristic values of redundant automation systems........................................................................435
A.1 Basic concepts...........................................................................................................................435
A.2 Comparison of MTBF for selected configurations......................................................................440
A.2.1 System configurations with redundant CPU 417-5H .................................................................440
A.2.2 System configurations with distributed I/Os...............................................................................442
A.2.3 Comparison of system configurations with standard and fault-tolerant communication............446
B Stand-alone operation ........................................................................................................................... 447
C Differences between fault-tolerant systems and standard systems........................................................ 453
D Function modules and communication processors supported by the S7-400H...................................... 457
E Connection examples for redundant I/Os............................................................................................... 461
E.1 SM 321; DI 16 x DC 24 V, 6ES7 321–1BH02–0AA0 .................................................................461
E.2 SM 321; DI 32 x DC 24 V, 6ES7 321–1BL00–0AA0..................................................................462
E.3 SM 321; DI 16 x AC 120/230V, 6ES7 321–1FH00–0AA0 .........................................................463
E.4 SM 321; DI 8 x AC 120/230 V, 6ES7 321–1FF01–0AA0...........................................................464
E.5 SM 321; DI 16 x DC 24V, 6ES7 321–7BH00–0AB0 ..................................................................465
E.6 SM 321; DI 16 x DC 24V, 6ES7 321–7BH01–0AB0 ..................................................................466
E.7 SM 326; DO 10 x DC 24V/2A, 6ES7 326–2BF01–0AB0 ...........................................................467
E.8 SM 326; DI 8 x NAMUR, 6ES7 326–1RF00–0AB0....................................................................468
E.9 SM 326; DI 24 x DC 24 V, 6ES7 326–1BK00–0AB0 .................................................................469
E.10 SM 421; DI 32 x UC 120 V, 6ES7 421–1EL00–0AA0................................................................470
E.11 SM 421; DI 16 x DC 24 V, 6ES7 421–7BH01–0AB0 .................................................................471
E.12 SM 421; DI 32 x DC 24 V, 6ES7 421–1BL00–0AB0..................................................................472
E.13 SM 421; DI 32 x DC 24 V, 6ES7 421–1BL01–0AB0..................................................................473
E.14 SM 322; DO 8 x DC 24 V/2 A, 6ES7 322–1BF01–0AA0 ...........................................................474
E.15 SM 322; DO 32 x DC 24 V/0,5 A, 6ES7 322–1BL00–0AA0 ......................................................475
E.16 SM 322; DO 8 x AC 230 V/2 A, 6ES7 322–1FF01–0AA0..........................................................476
E.17 SM 322; DO 4 x DC 24 V/10 mA [EEx ib], 6ES7 322–5SD00–0AB0 ........................................477
E.18 SM 322; DO 4 x DC 15 V/20 mA [EEx ib], 6ES7 322–5RD00–0AB0 ........................................478
E.19 SM 322; DO 8 x DC 24 V/0.5 A, 6ES7 322–8BF00–0AB0 ........................................................479

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E.20 SM 322; DO 16 x DC 24 V/0.5 A, 6ES7 322–8BH01–0AB0 ..................................................... 480
E.21 SM 332; AO 8 x 12 Bit, 6ES7 332–5HF00–0AB0 ..................................................................... 481
E.22 SM 332; AO 4 x 0/4...20 mA [EEx ib], 6ES7 332–5RD00–0AB0 .............................................. 482
E.23 SM 422; DO 16 x AC 120/230 V/2 A, 6ES7 422–1FH00–0AA0 ............................................... 483
E.24 SM 422; DO 32 x DC 24 V/0.5 A, 6ES7 422–7BL00–0AB0...................................................... 484
E.25 SM 331; AI 4 x 15 Bit [EEx ib]; 6ES7 331–7RD00–0AB0 ......................................................... 485
E.26 SM 331; AI 8 x 12 Bit, 6ES7 331–7KF02–0AB0 ....................................................................... 486
E.27 SM 331; AI 8 x 16 Bit; 6ES7 331–7NF00–0AB0 ....................................................................... 487
E.28 SM 331; AI 8 x 16 Bit; 6ES7 331–7NF10–0AB0 ....................................................................... 488
E.29 AI 6xTC 16Bit iso, 6ES7331-7PE10-0AB0 ............................................................................... 489
E.30 SM331; AI 8 x 0/4...20mA HART, 6ES7 331-7TF01-0AB0....................................................... 490
E.31 SM 332; AO 4 x 12 Bit; 6ES7 332–5HD01–0AB0..................................................................... 492
E.32 SM332; AO 8 x 0/4...20mA HART, 6ES7 332-8TF01-0AB0..................................................... 493
E.33 SM 431; AI 16 x 16 Bit, 6ES7 431–7QH00–0AB0..................................................................... 494
Glossary ................................................................................................................................................ 495
Index...................................................................................................................................................... 499

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Tables
Table 5- 1 LED displays on the CPUs...........................................................................................................48
Table 5- 2 Possible states of the BUS1F, BUS2F and BUS5F LEDs...........................................................57
Table 5- 3 Possible states of the LINK and RX/TX LEDs .............................................................................58
Table 5- 4 Mode switch positions..................................................................................................................61
Table 5- 5 Types of memory card .................................................................................................................67
Table 6- 1 Security levels of a CPU ..............................................................................................................77
Table 6- 2 CPU properties in the factory settings .........................................................................................81
Table 6- 3 LED patterns ................................................................................................................................82
Table 7- 1 CPUs 41x, MPI/DP interface as PROFIBUS DP interface ..........................................................88
Table 7- 2 Meaning of the "BUSF" LED of the CPU 41x operating as DP master .......................................91
Table 7- 3 Reading out the diagnostics information with STEP 7.................................................................91
Table 7- 4 Event detection of the CPU 41xH as a DP master ......................................................................93
Table 8- 1 System and standard functions that are new or have to be replaced..........................................99
Table 8- 2 System and standard functions of PROFIBUS DP that can be emulated in PROFINET IO .....100
Table 8- 3 OBs in PROFINET IO and PROFIBUS DP................................................................................100
Table 8- 4 Comparison of the system status lists of PROFINET IO and PROFIBUS DP ..........................101
Table 10- 1 Memory requirements ................................................................................................................119
Table 11- 1 Overview of S7-400H system states..........................................................................................124
Table 11- 2 Causes of error leading to redundancy loss ..............................................................................133
Table 11- 3 Response to errors during the self-test......................................................................................137
Table 11- 4 Response to a recurring comparison error ................................................................................138
Table 11- 5 Reaction to checksum errors .....................................................................................................138
Table 11- 6 Hardware fault with one-sided call of OB 121, checksum error, second occurrence ................139
Table 12- 1 Properties of link-up and update functions ................................................................................141
Table 12- 2 Conditions for link-up and update ..............................................................................................142
Table 12- 3 Typical values for the user program part ...................................................................................166
Table 13- 1 Interfaces for use of single-channel switched I/O configuration at the PROFIBUS DP
interface .....................................................................................................................................173
Table 13- 2 Interface for use of single-channel switched I/O configuration at the PROFINET interface......174
Table 13- 3 Signal modules for redundancy .................................................................................................187
Table 13- 4 Interconnecting digital output modules with/without diodes.......................................................197
Table 13- 5 Analog input modules and encoders .........................................................................................203
Table 13- 6 Example of redundant I/O, OB 1 part .......................................................................................210
Table 13- 7 Example of redundant I/O, OB 122 part ....................................................................................211
Table 13- 8 For the monitoring times with redundant I/O..............................................................................212

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Table 14- 1 Communication services of the CPUs .......................................................................................213
Table 14- 2 Availability of connection resources...........................................................................................214
Table 14- 3 SFBs for S7 Communication......................................................................................................216
Table 14- 4 Job lengths and "local_device_id" parameter ............................................................................229
Table 17- 1 Modifiable CPU parameters.......................................................................................................323
Table 18- 1 Accessory fiber-optic cable ........................................................................................................349
Table 18- 2 Specification of fiber-optic cables for indoor applications ..........................................................350
Table 18- 3 Specification of fiber-optic cables for outdoor applications........................................................352
Table 19- 1 Cyclic program processing.........................................................................................................356
Table 19- 2 Factors influencing cycle time....................................................................................................358
Table 19- 3 Portion of the process image transfer time, CPU 412-5H..........................................................359
Table 19- 4 Portion of the process image transfer time, CPU 414-5H..........................................................360
Table 19- 5 Portion of the process image transfer time, CPU 416-5H..........................................................361
Table 19- 6 Portion of the process image transfer time, CPU 417-5H..........................................................362
Table 19- 7 Extending the cycle time ............................................................................................................362
Table 19- 8 Operating system execution time at the cycle control point.......................................................363
Table 19- 9 Extended cycle time due to nested interrupts............................................................................363
Table 19- 10 Direct access of the CPUs to I/O modules in the central rack...................................................373
Table 19- 11 Direct access of the CPUs to I/O modules in the expansion unit with local link........................374
Table 19- 12 Direct access of the CPUs to I/O modules in the expansion unit with remote link, setting
100 m .........................................................................................................................................374
Table 19- 13 Example of calculating the response time .................................................................................375
Table 19- 14 Process and interrupt response times; maximum interrupt response time without
communication ...........................................................................................................................379
Table 19- 15 Reproducibility of time-delay and cyclic interrupts of the CPUs ................................................382
Table 20- 1 Runtimes of the blocks for redundant I/Os.................................................................................432

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Figures
Figure 2-1 Operating objectives of redundant automation systems..............................................................25
Figure 2-2 Integrated automation solutions with SIMATIC............................................................................27
Figure 2-3 Example of redundancy in a network without error......................................................................28
Figure 2-4 Example of redundancy in a 1-out-of-2 system with error ...........................................................29
Figure 2-5 Example of redundancy in a 1-out-of-2 system with total failure.................................................29
Figure 3-1 Overview ......................................................................................................................................32
Figure 3-2 Hardware of the S7–400H basic system......................................................................................34
Figure 3-3 User documentation for fault-tolerant systems ............................................................................40
Figure 4-1 Hardware assembly .....................................................................................................................42
Figure 5-1 Arrangement of the control and display elements on CPU 41x-5H PN/DP.................................47
Figure 5-2 Jack connector.............................................................................................................................50
Figure 5-3 Mode switch positions..................................................................................................................60
Figure 5-4 Design of the memory card..........................................................................................................65
Figure 7-1 Diagnostics with CPU 41xH .........................................................................................................92
Figure 7-2 Diagnostics addresses for DP master and DP slave...................................................................93
Figure 8-1 Configuration example of system redundancy with media redundancy ....................................105
Figure 8-2 S7-400H system with IO devices connected in system redundancy.........................................106
Figure 8-3 System redundancy in different views .......................................................................................107
Figure 8-4 PN/IO with system redundancy..................................................................................................109
Figure 8-5 PN/IO with system redundancy..................................................................................................110
Figure 9-1 Properties - DP slave .................................................................................................................116
Figure 10-1 Memory areas of the S7-400H CPUs ........................................................................................117
Figure 11-1 Synchronizing the subsystems ..................................................................................................122
Figure 11-2 System and operating states of the fault-tolerant system..........................................................130
Figure 12-1 Sequence of link-up and update ................................................................................................144
Figure 12-2 Update sequence.......................................................................................................................145
Figure 12-3 Example of minimum signal duration of an input signal during the update ...............................146
Figure 12-4 Meanings of the times relevant for updates...............................................................................156
Figure 12-5 Correlation between the minimum I/O retention time and the maximum inhibit time for
priority classes > 15 ...................................................................................................................160
Figure 13-1 Single-channel switched distributed I/O configuration at the PROFIBUS DP interface ............173
Figure 13-2 Single-channel switched distributed I/O configuration at the PROFINET interface...................174
Figure 13-3 Redundant I/O in central and expansion devices ......................................................................178
Figure 13-4 Redundant I/O in the one-sided DP slave .................................................................................179
Figure 13-5 Redundant I/O in the switched DP slave ...................................................................................180

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Figure 13-6 Redundant I/O in stand-alone mode..........................................................................................181
Figure 13-7 Fault-tolerant digital input module in 1-out-of-2 configuration with one encoder.......................195
Figure 13-8 Fault-tolerant digital input modules in 1-out-of-2 configuration with two encoders....................196
Figure 13-9 Fault-tolerant digital output modules in 1-out-of-2 configuration................................................197
Figure 13-10 Fault-tolerant analog input modules in 1-out-of-2 configuration with one encoder....................199
Figure 13-11 Fault-tolerant analog input modules in 1-out-of-2 configuration with two encoders ..................202
Figure 13-12 Fault-tolerant analog output modules in 1-out-of-2 configuration ..............................................203
Figure 13-13 Redundant one-sided and switched I/O.....................................................................................207
Figure 13-14 Flow chart for OB 1 ....................................................................................................................209
Figure 14-1 S7 routing...................................................................................................................................218
Figure 14-2 S7 routing gateways: MPI - DP - PROFINET ............................................................................219
Figure 14-3 S7 routing: TeleService application example.............................................................................220
Figure 14-4 Data set routing..........................................................................................................................225
Figure 14-5 Example of an S7 connection ....................................................................................................232
Figure 14-6 Example that shows that the number of resulting partial connections depends on the
configuration...............................................................................................................................233
Figure 14-7 Example of linking standard and fault-tolerant systems in a simple bus system.......................237
Figure 14-8 Example of linking standard and fault-tolerant systems in a redundant bus system.................238
Figure 14-9 Example of linking of standard and fault-tolerant systems in a redundant ring .........................238
Figure 14-10 Example of redundancy with fault-tolerant systems and a redundant bus system with
redundant standard connections................................................................................................240
Figure 14-11 Example of connecting a fault-tolerant system to a single-channel third-party system
using switched PROFIBUS DP ..................................................................................................241
Figure 14-12 Example of connecting a fault-tolerant system to a single-channel third-party system
using PROFINET IO with system redundancy...........................................................................242
Figure 14-13 Example of linking a fault-tolerant system to a single-channel third-party system ....................243
Figure 14-14 Example of redundancy with fault-tolerant system and redundant ring.....................................247
Figure 14-15 Example of redundancy with fault-tolerant system and redundant bus system.........................248
Figure 14-16 Example of fault-tolerant system with additional CP redundancy..............................................248
Figure 14-17 Example of redundancy with fault-tolerant system and fault-tolerant CPU ...............................250
Figure 14-18 Example of redundancy with fault-tolerant system and redundant bus system.........................252
Figure 14-19 Example of redundancy with a fault-tolerant system, redundant bus system, and CP
redundancy on PC. ....................................................................................................................252
Figure 14-20 Communication load as a variable of data throughput (basic profile)........................................254
Figure 14-21 Communication load as a variable of response time (basic profile) ..........................................255

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Figure 18-1 Synchronization module.............................................................................................................342
Figure 18-2 Fiber-optic cables, installation using distribution boxes.............................................................353
Figure 19-1 Elements and composition of the cycle time..............................................................................357
Figure 19-2 Different cycle times...................................................................................................................364
Figure 19-3 Minimum cycle time ...................................................................................................................365
Figure 19-4 Formula: Influence of communication load................................................................................366
Figure 19-5 Distribution of a time slice ..........................................................................................................366
Figure 19-6 Dependency of the cycle time on communication load .............................................................368
Figure 19-7 DP cycle times on the PROFIBUS DP network .........................................................................370
Figure 19-8 Shortest response time ..............................................................................................................371
Figure 19-9 Longest response time...............................................................................................................372
Figure A-1 MDT ...........................................................................................................................................436
Figure A-2 MTBF .........................................................................................................................................437
Figure A-3 Common Cause Failure (CCF) ..................................................................................................438
Figure A-4 Availability ..................................................................................................................................439
Figure B-1 Overview: System structure for system modifications during operation....................................451
Figure E-1 Example of an interconnection with SM 321; DI 16 x DC 24 V .................................................461
Figure E-2 Example of an interconnection with SM 321; DI 32 x DC 24 V .................................................462
Figure E-3 Example of an interconnection with SM 321; DI 16 x AC 120/230 V.........................................463
Figure E-4 Example of an interconnection with SM 321; DI 8 x AC 120/230 V...........................................464
Figure E-5 Example of an interconnection with SM 321; DI 16 x DC 24V ..................................................465
Figure E-6 Example of an interconnection with SM 321; DI 16 x DC 24V ..................................................466
Figure E-7 Example of an interconnection with SM 326; DO 10 x DC 24V/2A ...........................................467
Figure E-8 Example of an interconnection with SM 326; DI 8 x NAMUR....................................................468
Figure E-9 Example of an interconnection with SM 326; DI 24 x DC 24 V .................................................469
Figure E-10 Example of an interconnection with SM 421; DI 32 x UC 120 V ...............................................470
Figure E-11 Example of an interconnection with SM 421; DI 16 x 24 V........................................................471
Figure E-12 Example of an interconnection with SM 421; DI 32 x 24 V........................................................472
Figure E-13 Example of an interconnection with SM 421; DI 32 x 24 V........................................................473
Figure E-14 Example of an interconnection with SM 322; DO 8 x DC 24 V/2 A ...........................................474
Figure E-15 Example of an interconnection with SM 322; DO 32 x DC 24 V/0.5 A ......................................475
Figure E-16 Example of an interconnection with SM 322; DO 8 x AC 230 V/2 A .........................................476
Figure E-17 Example of an interconnection with SM 322; DO 16 x DC 24 V/10 mA [EEx ib].......................477
Figure E-18 Example of an interconnection with SM 322; DO 16 x DC 15 V/20 mA [EEx ib].......................478
Figure E-19 Example of an interconnection with SM 322; DO 8 x DC 24 V/0.5 A ........................................479
Figure E-20 Example of an interconnection with SM 322; DO 16 x DC 24 V/0.5 A ......................................480

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Figure E-21 Example of an interconnection with SM 332, AO 8 x 12 Bit ......................................................481
Figure E-22 Example of an interconnection with SM 332; AO 4 x 0/4...20 mA [EEx ib]................................482
Figure E-23 Example of an interconnection with SM 422; DO 16 x 120/230 V/2 A ......................................483
Figure E-24 Example of an interconnection with SM 422; DO 32 x DC 24 V/0.5 A ......................................484
Figure E-25 Example of an interconnection with SM 331, AI 4 x 15 Bit [EEx ib]...........................................485
Figure E-26 Example of an interconnection with SM 331; AI 8 x 12 Bit ........................................................486
Figure E-27 Example of an interconnection with SM 331; AI 8 x 16 Bit ........................................................487
Figure E-28 Example of an interconnection with SM 331; AI 8 x 16 Bit ........................................................488
Figure E-29 Example of an interconnection AI 6xTC 16Bit iso......................................................................489
Figure E-30 Interconnection example 1 SM 331; AI 8 x 0/4...20mA HART...................................................490
Figure E-31 Interconnection example 2 SM 331; AI 8 x 0/4...20mA HART...................................................491
Figure E-32 Example of an interconnection with SM 332, AO 4 x 12 Bit ......................................................492
Figure E-33 Interconnection example 3 SM 332; AO 8 x 0/4...20mA HART.................................................493
Figure E-34 Example of an interconnection with SM 431; AI 16 x 16 Bit ......................................................494

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Preface 1
1.1 Preface
Purpose of this manual
This manual represents a useful reference and contains information on operator inputs,
descriptions of functions, and technical specifications of the S7-400H CPUs.
For information on installing and wiring these and other modules in order to set up an
S7-400H system, refer to the
S7-400 Automation System, Installation manual.
Changes compared to the previous version
The following changes have been made in relation to the previous version of this manual,
SIMATIC, Fault-tolerant systems, Edition 11/2011 (A5E00267693-09):
● The firmware of the CPUs 41x-5H PN/DP has version 6.0
● The CPUs 41x-5H PN/DP feature a PROFINET interface
● CPU 416–5H has been added
● Know-How protection through block encryption (S7 Block Privacy)
● New protection mechanism "signed firmware update" as of STEP7 V5.5 SP2 HF1
● Increase of communication performance
● Reduction of processing times
● Adaptation of work memory and additional quantity frameworks to the CPUs 41x-3
PN/DP V6.0
Differences in system behavior between versions 4.5 and 6.0
● A user program that uses SFC 87 to read out the current connection status and that was
written for a H-CPU V4.x does not return any data on an H-CPU V6.0. The reason is that
the quantity Framework expanded to 120 connections also requires a larger target range
in the program. You must adapt the program accordingly.
● A reserve CPU can take over the role of master at startup, see chapter STARTUP mode
(Page 132).
● In large configurations with many CPs and/or external DP masters it may take up to 30
seconds until a requested restart is performed in the buffered POWER ON mode of the
H-CPU V 6.0, see chapter STARTUP mode (Page 132)
● In contrast to OB 84, the reason for the call is not entered in the start information of
OB 82, see chapter Synchronization modules for S7–400H (Page 341)
● Extended cycle time in case of long synchronization lines, see chapter Synchronization
modules for S7–400H (Page 341)

Preface
1.1 Preface
S7-400H
20 System Manual, 03/2012, A5E00267695-11
● If you use long synchronization lines, you have to extend the monitoring time of the
connection at an H-CPU V6.0, see chapter Communication via fault-tolerant S7
connections (Page 244).
● The startup time of the CPU at power on, the loading time of blocks, as well mas the
startup after a plant modification at runtime can be significantly prolonged by encrypted
blocks; see chapter Encrypting blocks (Page 79).
● The following applies to PROFINET in the fault-tolerant system: The job must be
repeated if it is rejected with return value W#16#80BA when using SFB 52/53/54.
Basic knowledge required
This manual requires general knowledge of automation engineering.
Moreover, it is assumed that the readership has sufficient knowledge of computers or
equipment similar to a PC, such as programming devices, running under the Windows XP,
Windows Vista or Windows 7 operating system. An S7-400H is configured using the STEP 7
basic software, and you should thus be familiar in the handling of this basic software. This
knowledge is provided in the
Programming with STEP 7 manual.
In particular when operating an S7-400H system in potentially explosive atmospheres, you
should always observe the information on the safety of electronic control systems provided in
the appendix of the
S7-400 Automation System, Installation manual.
Scope of the manual
The manual is relevant to the following components:
● CPU 412–5H; 6ES7 412–5HK06–0AB0 as of firmware V6.0
● CPU 414–5H; 6ES7 414–5HM06–0AB0 as of firmware V6.0
● CPU 416–5H; 6ES7 416–5HS06–0AB0 as of firmware V6.0
● CPU 417–5H; 6ES7 417–5HT06–0AB0 as of firmware V6.0
Approvals
For details on certifications and standards, refer to the S7-400 Automation System, Module
Data
manual, Section 1.1, Standards and Certifications.
Further information
For more information on the topics covered in this manual, refer to the following manuals:
Programming with STEP 7 (http://support.automation.siemens.com/WW/view/en/18652056)
Configuring Hardware and Communication Connections with STEP 7
(http://support.automation.siemens.com/WW/view/en/18652631)
System and Standard Functions
(http://support.automation.siemens.com/WW/view/de/44240604/0/en)
PROFINET system description
(http://support.automation.siemens.com/WW/view/en/19292127)