Supero Supero SAS 846 TQ BACKPLANE User manual

Rev. 1.0b
SAS 846 TQ BACKPLANE
USER'S GUIDE
JP54 JP56
JP60
JP58
J22
J26
J29
J10
J12
J14
J16
J25
J23
J24
J30
J32 J8
J5
J6
J7
J39
J42
J48
J46
J40
J47
J41
J38
JP108
JP47
JP26
JP115
JP78
JP69
JP116
JP117
JP52
JP96
JP95
JP37
JP10
JP13
JP46
JP48
JP109
JP110
JP86
JP64
JP63
JP62JP61
JP50
JP35
JP129
JP84
JP97
JP98
JP99
JP100
R245
JP18
D89D51D49D47D45 D36D3 D54D53
JP114
JP112
JP75
JP77 JP66
JP68
BAR CODE
+5V+12V GNDGND+5V+12V GNDGND
3
1
1
3
1
3
1
3
1
3
AC
1
17 32
49
64
2-3: NO RESET
1-2: RESET
2-3: NO RESET
1-2: RESET
2-3: NO RESET
1-2: RESET
22 2320 21
18 19
16 17
14 1512 13
10 11
8 9
6 74 5
3
2
1
0
JP129:9072#3 RESET
JP35:9072#1 RESET
JP50:9072#2 RESET
BUZZER RESET
2-3:NO FAN
1-2:WITH FAN
JP61:FAN#1 SELECT
JP64:FAN#4 SELECT
JP63:FAN#3 SELECT
JP62:FAN#2 SELECT
2-3:NO FAN
1-2:WITH FAN
JP97:FAN#1 SELECT
JP98:FAN#2 SELECT
JP99:FAN#3 SELECT
JP100:FAN#4 SELECT
JP124:I2CRST#6
2-3:I2C
JP121:I2CRST#5
1-2:SGPIO
C C C
OPEN:45
1-2:50 2-3:55
JP107:OH#3 TEMP.
1-2:ID#0 2-3:ID#1
1-2:SGPIO
2-3:I2C
JP123:BP_ID#5
JP126:BP_ID#6
JP122:CTRL_ID#5
JP125:CTRL_ID#6
ACT_IN#16-23 ACT_IN#8-15
ACT_IN#0-7
JP128:I2CRST_SDOUT#6 JP127:I2CRST_SDOUT#5
1-2:SGPIO
2-3:I2C
UPGRADE#3
UPGRADE#2
UPGRADE#1
JP113:BPID_SDIN#6
JP111:BPID_SDIN#5
1-2:SGPIO
2-3:I2C
I2C#5
I2C#6 I2C#3
I2C#4
I2C#2
I2C#1
SIDEBAND#5
SIDEBAND#6
SIDEBAND#3
SIDEBAND#4 SIDEBAND#2
SIDEBAND#1
FAN#4
FAN#3
FAN#2
FAN#1
#23 #22 #21 #20
#19
#18
#17 #16
#15 #14 #13 #12
#11 #10 #9 #8
#7 #6 #5
#4
#3 #2 #1 #0
C
C
C
1-2:50
OPEN:45
JP25:OH#1 TEMP.
2-3:55
JP67:BPID_SDIN#2 JP65:BPID_SDIN#1
1-2:SGPIO
2-3:I2C
2-3:I2C
1-2:SGPIO
JP87:I2CRST_SDOUT#1 JP88:I2CRST_SDOUT#2
JP86:I2CRST#2
2-3:I2C
JP83:I2CRST#1
1-2:SGPIO
JP102:BP_ID#2
1-2:ID#0
JP85:BP_ID#1
2-3:ID#1
JP84:CTRL_ID#1
JP101:CTRL_ID#2
2-3:I2C
1-2:SGPIO
JP74:BPID_SDIN#3 JP76:BPID_SDIN#4
1-2:SGPIO
2-3:I2C
JP45:OH#2 TEMP.
C2-3:55
1-2:50 C
COPEN:45
JP89:I2CRST#3
JP92:I2CRST#4
1-2:SGPIO
2-3:I2C
JP93:I2CRST_SDOUT#3
JP94:I2CRST_SDOUT#4
2-3:I2C
1-2:SGPIO
1-2:SGPIO
2-3:I2C
JP90:CTRL_ID#3
JP103:CTRL_ID#4
1-2:ID#0
2-3:ID#1
JP91:BP_ID#3
JP104:BP_ID#4
REV:1.01
SAS846TQ
#4
SAS
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA

ii
846 TQ Backplane User's Guide
Manual Revision 1.0b
Release Date: November 27, 2007
Unless you request and receive written permission from SUPER MICRO COMPUTER, you may not
copy or otherwise reproduce/distribute any part of this document.
Information in this document is subject to change without notice. Other products and companies
referred to herein are trademarks or registered trademarks of their respective companies or mark
holders.
Copyright © 2007 by SUPER MICRO COMPUTER INC.
All rights reserved.
Printed in the United States of America
The information in this User’s Manual has been carefully reviewed and is believed to be accurate.
The vendor assumes no responsibility for any inaccuracies that may be contained in this document,
makes no commitment to update or to keep current the information in this manual, or to notify any
person or organization of the updates. Please Note: For the most up-to-date version of this
manual, please see our web site at www.supermicro.com.
Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product
described in this manual at any time and without notice. This product, including software, if any,
and documentation may not, in whole or in part, be copied, photocopied, reproduced, translated or
reduced to any medium or machine without prior written consent.
IN NO EVENT WILL SUPERMICRO BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL,
SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO
USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF
SUCH DAMAGES. IN PARTICULAR, SUPERMICRO SHALL NOT HAVE LIABILITY FOR ANY
HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE
COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH
HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between manufacturer and customer shall be governed by the laws of Santa
Clara County in the State of California, USA. The State of California, County of Santa Clara shall
be the exclusive venue for the resolution of any such disputes. Super Micro's total liability for all
claims will not exceed the price paid for the hardware product.

iii
Safety Information and Technical Specifications
Table of Contents
SAS 846 TQ BACKPLANE
Contacting SuperMicro ..................................................................................................iv
Chapter 1 Safety Guidelines
1-1 ESD Safety Guidelines ................................................................................... 1-1
1-2 General Safety Guidelines .............................................................................. 1-1
1-3 A Note to Users ............................................................................................... 1-2
Chapter 2 Jumper Settings and Pin Definitions
2-1 Front Connectors and Jumpers ...................................................................... 2-1
Front Connectors ............................................................................................ 2-1
2-2 Front Connector and Pin Definitions ............................................................... 2-3
2-3 Front Jumper Locations and Pin Definitions ................................................... 2-5
Explanation of Jumpers .............................................................................. 2-5
Fan Jumper Settings ....................................................................................... 2-6
I2C and SGPIO Modes and Jumper Settings ................................................. 2-7
Front LED Indicators ....................................................................................... 2-8
Front Panel LEDs ............................................................................................ 2-8
2-4 Rear Connectors and LED Indicators ............................................................. 2-9

iv
846 TQ Backplane User's Guide
Contact Information
Headquarters
Address: Super Micro Computer, Inc.
980 Rock Ave.
San Jose, CA 95131 U.S.A.
Tel: [phone]
Fax: [phone]
Email: [email protected] (General Information)
[email protected] (Technical Support)
Web Site: www.supermicro.com
Europe
Address: Super Micro Computer B.V.
Het Sterrenbeeld 28, 5215 ML
's-Hertogenbosch, The Netherlands
Tel: [phone]
Fax: [phone]
Email: [email protected] (General Information)
[email protected] (Technical Support)
[email protected] (Customer Support)
Asia-Pacific
Address: Super Micro Computer, Taiwan
4F, No. 232-1, Liancheng Rd.
Chung-Ho 235, Taipei County
Taiwan, R.O.C.
Tel: [phone]
Fax: [phone]
Web Site: www.supermicro.com.tw
Email: [email protected] (Technical Support)
Tel: [phone], ext.132 or 139

1-1
Safety Information and Technical Specifications
Chapter 1
Safety Guidelines
To avoid personal injury and property damage, carefully follow all the safety steps
listed below when accessing your system or handling the components.
1-1 ESD Safety Guidelines
Electric Static Discharge (ESD) can damage electronic components. To prevent
damage to your system, it is important to handle it very carefully. The following
measures are generally sufficient to protect your equipment from ESD.
Use a grounded wrist strap designed to prevent static discharge.
Touch a grounded metal object before removing a component from the antistatic
bag.
Handle the RAID card by its edges only; do not touch its components, peripheral
chips, memory modules or gold contacts.
When handling chips or modules, avoid touching their pins.
Put the card and peripherals back into their antistatic bags when not in use.
1-2 General Safety Guidelines
Always disconnect power cables before installing or removing any components
from the computer, including the backplane.
Disconnect the power cable before installing or removing any cables from the
backplane.
Make sure that the backplane is securely and properly installed on the mother-
board to prevent damage to the system due to power shortage.
•
•
•
•
•
•
•
•

1-2
SAS 846 TQ
1-3 A Note to Users
All images and layouts shown in this user's guide are based upon the latest PCB
Revision available at the time of publishing. The card you have received may or
may not look exactly the same as the graphics shown in this manual.
•

2-1
Safety Information and Technical Specifications
JP54 JP56
JP60
JP58
J22
J26
J29
J10
J12
J14
J16
J25
J23
J24
J30
J32 J8
J5
J6
J7
J39
J42
J48
J46
J40
J47
J41
J38
JP108
JP47
JP26
JP115
JP78
JP69
JP116
JP117
JP52
JP96
JP95
JP37
JP10
JP13
JP46
JP48
JP109
JP110
JP86
JP64
JP63
JP62JP61
JP50
JP35
JP129
JP84
JP97
JP98
JP99
JP100
R245
JP18
D89D51D49D47D45 D36D3 D54D53
JP114
JP112
JP75
JP77 JP66
JP68
BAR CODE
+5V+12V GNDGND
+5V+12V GNDGND
3
1
1
3
1
3
1
3
1
3
AC
1
17 32
49
64
2-3: NO RESET
1-2: RESET
2-3: NO RESET
1-2: RESET
2-3: NO RESET
1-2: RESET
22 2320 21
18 19
16 17
14 1512 13
10 11
8 9
6 74 5
3
2
1
0
JP129:9072#3 RESET
JP35:9072#1 RESET
JP50:9072#2 RESET
BUZZER RESET
2-3:NO FAN
1-2:WITH FAN
JP61:FAN#1 SELECT
JP64:FAN#4 SELECT
JP63:FAN#3 SELECT
JP62:FAN#2 SELECT
2-3:NO FAN
1-2:WITH FAN
JP97:FAN#1 SELECT
JP98:FAN#2 SELECT
JP99:FAN#3 SELECT
JP100:FAN#4 SELECT
JP124:I2CRST#6
2-3:I2C
JP121:I2CRST#5
1-2:SGPIO
C C C
OPEN:45
1-2:50 2-3:55
JP107:OH#3 TEMP.
1-2:ID#0 2-3:ID#1
1-2:SGPIO
2-3:I2C
JP123:BP_ID#5
JP126:BP_ID#6
JP122:CTRL_ID#5
JP125:CTRL_ID#6
ACT_IN#16-23 ACT_IN#8-15
ACT_IN#0-7
JP128:I2CRST_SDOUT#6 JP127:I2CRST_SDOUT#5
1-2:SGPIO
2-3:I2C
UPGRADE#3
UPGRADE#2
UPGRADE#1
JP113:BPID_SDIN#6
JP111:BPID_SDIN#5
1-2:SGPIO
2-3:I2C
I2C#5
I2C#6 I2C#3
I2C#4
I2C#2
I2C#1
SIDEBAND#5
SIDEBAND#6
SIDEBAND#3
SIDEBAND#4 SIDEBAND#2
SIDEBAND#1
FAN#4
FAN#3
FAN#2
FAN#1
#23 #22 #21 #20
#19
#18
#17 #16
#15 #14 #13 #12
#11 #10 #9 #8
#7 #6 #5
#4
#3 #2 #1 #0
C
C
C
1-2:50
OPEN:45
JP25:OH#1 TEMP.
2-3:55
JP67:BPID_SDIN#2 JP65:BPID_SDIN#1
1-2:SGPIO
2-3:I2C
2-3:I2C
1-2:SGPIO
JP87:I2CRST_SDOUT#1 JP88:I2CRST_SDOUT#2
JP86:I2CRST#2
2-3:I2C
JP83:I2CRST#1
1-2:SGPIO
JP102:BP_ID#2
1-2:ID#0
JP85:BP_ID#1
2-3:ID#1
JP84:CTRL_ID#1
JP101:CTRL_ID#2
2-3:I2C
1-2:SGPIO
JP74:BPID_SDIN#3 JP76:BPID_SDIN#4
1-2:SGPIO
2-3:I2C
JP45:OH#2 TEMP.
C2-3:55
1-2:50 C
COPEN:45
JP89:I2CRST#3
JP92:I2CRST#4
1-2:SGPIO
2-3:I2C
JP93:I2CRST_SDOUT#3
JP94:I2CRST_SDOUT#4
2-3:I2C
1-2:SGPIO
1-2:SGPIO
2-3:I2C
JP90:CTRL_ID#3
JP103:CTRL_ID#4
1-2:ID#0
2-3:ID#1
JP91:BP_ID#3
JP104:BP_ID#4
REV:1.01
SAS846TQ
#4
SAS
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
JP54 JP56
JP60
JP58
J22
J26
J29
J10
J12
J14
J16
J25
J23
J24
J30
J32 J8
J5
J6
J7
J39
J42
J48
J46
J40
J47
J41
J38
JP108
JP47
JP26
JP115
JP78
JP69
JP116
JP117
JP52
JP96
JP95
JP37
JP10
JP13
JP46
JP48
JP109
JP110
JP86
JP64
JP63
JP62JP61
JP50
JP35
JP129
JP84
JP97
JP98
JP99
JP100
R245
JP18
D89D51D49D47D45 D36D3 D54D53
JP114
JP112
JP75
JP77 JP66
JP68
BAR CODE
+5V+12V GNDGND
+5V+12V GNDGND
3
1
1
3
1
3
1
3
1
3
AC
1
17 32
49
64
2-3: NO RESET
1-2: RESET
2-3: NO RESET
1-2: RESET
2-3: NO RESET
1-2: RESET
22 2320 21
18 19
16 17
14 1512 13
10 11
8 9
6 74 5
3
2
1
0
JP129:9072#3 RESET
JP35:9072#1 RESET
JP50:9072#2 RESET
BUZZER RESET
2-3:NO FAN
1-2:WITH FAN
JP61:FAN#1 SELECT
JP64:FAN#4 SELECT
JP63:FAN#3 SELECT
JP62:FAN#2 SELECT
2-3:NO FAN
1-2:WITH FAN
JP97:FAN#1 SELECT
JP98:FAN#2 SELECT
JP99:FAN#3 SELECT
JP100:FAN#4 SELECT
JP124:I2CRST#6
2-3:I2C
JP121:I2CRST#5
1-2:SGPIO
C C C
OPEN:45
1-2:50 2-3:55
JP107:OH#3 TEMP.
1-2:ID#0 2-3:ID#1
1-2:SGPIO
2-3:I2C
JP123:BP_ID#5
JP126:BP_ID#6
JP122:CTRL_ID#5
JP125:CTRL_ID#6
ACT_IN#16-23 ACT_IN#8-15
ACT_IN#0-7
JP128:I2CRST_SDOUT#6 JP127:I2CRST_SDOUT#5
1-2:SGPIO
2-3:I2C
UPGRADE#3
UPGRADE#2
UPGRADE#1
JP113:BPID_SDIN#6
JP111:BPID_SDIN#5
1-2:SGPIO
2-3:I2C
I2C#5
I2C#6 I2C#3
I2C#4
I2C#2
I2C#1
SIDEBAND#5
SIDEBAND#6
SIDEBAND#3
SIDEBAND#4 SIDEBAND#2
SIDEBAND#1
FAN#4
FAN#3
FAN#2
FAN#1
#23 #22 #21 #20
#19
#18
#17 #16
#15 #14 #13 #12
#11 #10 #9 #8
#7 #6 #5
#4
#3 #2 #1 #0
C
C
C
1-2:50
OPEN:45
JP25:OH#1 TEMP.
2-3:55
JP67:BPID_SDIN#2 JP65:BPID_SDIN#1
1-2:SGPIO
2-3:I2C
2-3:I2C
1-2:SGPIO
JP87:I2CRST_SDOUT#1 JP88:I2CRST_SDOUT#2
JP86:I2CRST#2
2-3:I2C
JP83:I2CRST#1
1-2:SGPIO
JP102:BP_ID#2
1-2:ID#0
JP85:BP_ID#1
2-3:ID#1
JP84:CTRL_ID#1
JP101:CTRL_ID#2
2-3:I2C
1-2:SGPIO
JP74:BPID_SDIN#3 JP76:BPID_SDIN#4
1-2:SGPIO
2-3:I2C
JP45:OH#2 TEMP.
C2-3:55
1-2:50 C
COPEN:45
JP89:I2CRST#3
JP92:I2CRST#4
1-2:SGPIO
2-3:I2C
JP93:I2CRST_SDOUT#3
JP94:I2CRST_SDOUT#4
2-3:I2C
1-2:SGPIO
1-2:SGPIO
2-3:I2C
JP90:CTRL_ID#3
JP103:CTRL_ID#4
1-2:ID#0
2-3:ID#1
JP91:BP_ID#3
JP104:BP_ID#4
REV:1.01
SAS846TQ
#4
SAS
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
Chapter 2
Jumper Settings and Pin Definitions
2-1 Front Connectors and Jumpers
Front Connectors
Chip: MG 9072
Upgrade Connectors: JP69, JP78
and JP115
ACT_IN: JP26, JP47, and JP108
I2C Connector #1 (JP37) and #2
(JP95)
I2C Connector #3 (JP52) and #4
(JP96)
I2C Connector #5 (JP116) and #6
(JP117)
1.
2.
3.
4.
5.
6.
SideBand Connector #1 (JP66)
and #2 (JP68)
SideBand Connector #3 (JP75)
and #4 (JP77)
SideBand Connector #5 (JP112)
and #6 (JP114)
Power Connectors (4-
pin): JP10, JP13, JP46,
JP48, JP109, and JP110
7.
8.
9.
10.
1
1
10
2
5
3
87
6
22
3
3
4
11
9
1
10
10
10
10

2-2
SAS 846 TQ
SAS Port #0 J5
SAS Port #1 J14
SAS Port #2 J26
SAS Port #3 J40
SAS Port #4 J6
SAS Port #5 J16
SAS Port #6 J29
SAS Port #7 J41
SAS Port #8 J7
SAS Port #9 J22
SAS Port #10 J30
SAS Port #11 J42
SAS Port #12 J8
SAS Port #13 J23
SAS Port #14 J32
SAS Port #15 J46
SAS Port #16 J10
SAS Port #17 J24
SAS Port #18 J38
SAS Port #19 J47
SAS Port #20 J12
SAS Port #21 J25
SAS Port #22 J39
SAS Port #23 J48
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.
25.
26.
27.
28.
29.
30.
31.
32.
33.
34.
JP54 JP56
JP60
JP58
J22
J26
J29
J10
J12
J14
J16
J25
J23
J24
J30
J32 J8
J5
J6
J7
J39
J42
J48
J46
J40
J47
J41
J38
JP108
JP47
JP26
JP115
JP78
JP69
JP116
JP117
JP52
JP96
JP95
JP37
JP10
JP13
JP46
JP48
JP109
JP110
JP86
JP64
JP63
JP62JP61
JP50
JP35
JP129
JP84
JP97
JP98
JP99
JP100
R245
JP18
D89D51D49D47D45 D36D3 D54D53
JP114
JP112
JP75
JP77 JP66
JP68
BAR CODE
+5V+12V GNDGND
+5V+12V GNDGND
3
1
1
3
1
3
1
3
1
3
AC
1
17 32
49
64
2-3: NO RESET
1-2: RESET
2-3: NO RESET
1-2: RESET
2-3: NO RESET
1-2: RESET
22 2320 21
18 19
16 17
14 1512 13
10 11
8 9
6 74 5
3
2
1
0
JP129:9072#3 RESET
JP35:9072#1 RESET
JP50:9072#2 RESET
BUZZER RESET
2-3:NO FAN
1-2:WITH FAN
JP61:FAN#1 SELECT
JP64:FAN#4 SELECT
JP63:FAN#3 SELECT
JP62:FAN#2 SELECT
2-3:NO FAN
1-2:WITH FAN
JP97:FAN#1 SELECT
JP98:FAN#2 SELECT
JP99:FAN#3 SELECT
JP100:FAN#4 SELECT
JP124:I2CRST#6
2-3:I2C
JP121:I2CRST#5
1-2:SGPIO
C C C
OPEN:45
1-2:50 2-3:55
JP107:OH#3 TEMP.
1-2:ID#0 2-3:ID#1
1-2:SGPIO
2-3:I2C
JP123:BP_ID#5
JP126:BP_ID#6
JP122:CTRL_ID#5
JP125:CTRL_ID#6
ACT_IN#16-23 ACT_IN#8-15
ACT_IN#0-7
JP128:I2CRST_SDOUT#6 JP127:I2CRST_SDOUT#5
1-2:SGPIO
2-3:I2C
UPGRADE#3
UPGRADE#2
UPGRADE#1
JP113:BPID_SDIN#6
JP111:BPID_SDIN#5
1-2:SGPIO
2-3:I2C
I2C#5
I2C#6 I2C#3
I2C#4
I2C#2
I2C#1
SIDEBAND#5
SIDEBAND#6
SIDEBAND#3
SIDEBAND#4 SIDEBAND#2
SIDEBAND#1
FAN#4
FAN#3
FAN#2
FAN#1
#23 #22 #21 #20
#19
#18
#17 #16
#15 #14 #13 #12
#11 #10 #9 #8
#7 #6 #5
#4
#3 #2 #1 #0
C
C
C
1-2:50
OPEN:45
JP25:OH#1 TEMP.
2-3:55
JP67:BPID_SDIN#2 JP65:BPID_SDIN#1
1-2:SGPIO
2-3:I2C
2-3:I2C
1-2:SGPIO
JP87:I2CRST_SDOUT#1 JP88:I2CRST_SDOUT#2
JP86:I2CRST#2
2-3:I2C
JP83:I2CRST#1
1-2:SGPIO
JP102:BP_ID#2
1-2:ID#0
JP85:BP_ID#1
2-3:ID#1
JP84:CTRL_ID#1
JP101:CTRL_ID#2
2-3:I2C
1-2:SGPIO
JP74:BPID_SDIN#3 JP76:BPID_SDIN#4
1-2:SGPIO
2-3:I2C
JP45:OH#2 TEMP.
C2-3:55
1-2:50 C
COPEN:45
JP89:I2CRST#3
JP92:I2CRST#4
1-2:SGPIO
2-3:I2C
JP93:I2CRST_SDOUT#3
JP94:I2CRST_SDOUT#4
2-3:I2C
1-2:SGPIO
1-2:SGPIO
2-3:I2C
JP90:CTRL_ID#3
JP103:CTRL_ID#4
1-2:ID#0
2-3:ID#1
JP91:BP_ID#3
JP104:BP_ID#4
REV:1.01
SAS846TQ
#4
SAS
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
ACT FAIL
C
A
CA
1314
15
16
17
23
22 21 20 19
18
242526
2728
12
30 29
313234 33
11

2-3
Safety Information and Technical Specifications
2-2 Front Connector and Pin Definitions
1. MG9072 Chip
The MG9072 is an enclosure management
chip that supports the SES-2 controller and
SES-2 protocols.
2. Upgrade Connectors
The upgrade connectors are designated JP69,
JP78, and JP115 and are used for manufactur-
er's diagnostic purposes only.
3. Activity LED Header
The activity LED header, designated JP26,
JP47 and JP108, is used to indicate the activ-
ity status of each SAS drive. The Activity LED
Header is located on the front panel. For the
Activity LED Header to work properly, connect
using a 10-pin LED cable.
4./5./6. I2C Connectors
The I2C Connectors, designated JP37, JP95,
JP52, JP96, JP116, and JP117, are used to
monitor HDD activity and status. See the table
on the right for pin definitions.
I2C Connector
Pin Definitions
(JP37, JP95, JP52, JP96,
JP116, and JP117)
Pin# Definition
1 Data
2 Ground
3 Clock
4 No Connection

2-4
SAS 846 TQ
Backplane
Main Power
4-Pin Connector
(JP10, JP13, JP46,
and JP48)
Pin# Definition
1+12V
2 and 3 Ground
4+5V
10. Backplane Main Power Connectors
The 4-pin connectors, designated JP10, JP13,
JP46, JP48, JP109, and JP110, provide power
to the backplane. See the table on the right
for pin definitions.
11 - 34. SAS Ports
The SAS ports are used to connect the SAS
drive cables. The 24 ports are designated #0
- #23. Each port is also compatible with SATA
drives.
7./8./9./ Sideband Headers
The sideband headers are designated JP66,
JP68, JP75, JP77, JP112, and JP114. For
SES-2 to work properly, you must connect an
8-pin sideband cable. See the table to the right
for pin definitions.
NOTE: SGPIO is the default setting for this
backplane.
Sideband Headers
(JP66, JP68, JP75, JP77,
JP112 and JP114)
Pin # Definition Pin # Definition
2SGPIO:
SDIN
I2C:
Backplane
Addressing
(SB5)
1 Controller ID
(SB6)
4SGPIO:
SDOUT
I2C: Reset
(SB4)
3 GND (SB2)
6 GND (SB3) 5 SGPIO:
SLOAD
I2C:SDA (SB1)
8 Backplane
ID (SB7)
7SGPIO:
SCLOCK
I2C:SCL (SB0)
10 No Connec-
tion
9 No Connection