Terasic ALTERA MAX 10 NEEK User manual

MAX 10 NEEK User
Manual
1 www.terasic.com
February 4, 2016

MAX 10 NEEK 1 www.terasic.com
February 4, 2016
CONTENTS
Chapter 1  MAX 10 NEEK Development Kit ...................................................... 3 
1.1 Package Contents .......................................................................................................................3
1.2 MAX 10 NEEK System CD.......................................................................................................4
1.3 Getting Help ...............................................................................................................................4
Chapter 2  Introduction of the MAX 10 NEEK Board.......................................... 5 
2.1 Layout and Components.............................................................................................................5
2.2 Block Diagram of the MAX 10 NEEK Board............................................................................7
Chapter 3  Using the MAX 10 NEEK Board ..................................................... 10 
3.1 Configuration of MAX 10 FPGA on MAX 10 NEEK .............................................................10
3.2 Board Status Elements..............................................................................................................16
3.3 Clock Circuitry .........................................................................................................................17
3.4 Peripherals Connected to the FPGA.........................................................................................18
Chapter 4  NEEK10 System Builder ................................................................ 43 
4.1 Introduction ..............................................................................................................................43
4.2 General Design Flow................................................................................................................43
4.3 Using NEEK10 System Builder ...............................................................................................45
Chapter 5  RTL Example Codes ...................................................................... 50 
5.1 PS/2 Mouse Demonstration......................................................................................................50
5.2 Power Monitor..........................................................................................................................53
5.3 ADC Potentiometer ..................................................................................................................55
5.4 DAC Demonstration.................................................................................................................57
5.5 ADC/MIC/LCD Demonstration ...............................................................................................60
5.6 HDMI RX Demonstration ........................................................................................................63
Chapter 6  NIOS Based Example Codes ......................................................... 67 

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February 4, 2016
6. 1Power Monitor...................................................................................................................67
6. 2UART to USB control LED...............................................................................................72
6. 3SD Card Audio Demonstration..........................................................................................75
6. 4DDR3 SDRAM Test by Nios II.........................................................................................80
6. 5Ethernet Socket server.......................................................................................................83
6. 6LCD Painter.......................................................................................................................90
6. 7Digital Accelerometer Demonstration...............................................................................94
6. 8Humidity/Temperature Sensor...........................................................................................96
6. 9LCD CAMERA Demonstration ........................................................................................99
Chapter 7  Application Selector ..................................................................... 105 
7.1 Ready to Run SD Card Demos...............................................................................................105
7.2 Application Selector Details ...................................................................................................106
7.3 Running the Application Selector...........................................................................................107
7.4 Creating Your Own Loadable Applications............................................................................107
7.5 Restoring the Factory Image ..................................................................................................110
Chapter 8 Programming the Configuration Flash Memory ............................ 112 
8.1 Internal Configuration ............................................................................................................112
8.2 Using Dual Compressed Images ............................................................................................114
8.3 Nios II Load In Single Boot Image ........................................................................................117
Chapter 9  Appendix ..................................................................................... 120 
Revision History...........................................................................................................................120
Copyright Statement.....................................................................................................................120

MAX 10 NEEK 3 www.terasic.com
February 4, 2016
Chapter 1
MAX 10 NEEK Development Kit
The MAX 10 NEEK from Terasic is a full featured embedded evaluation kit based upon the
MAX10 family of Altera FPGAs. It offers a comprehensive design environment with everything
embedded developers need to create a processing based system. The MAX 10 NEEK delivers an
integrated platform that includes hardware, design tools, intellectual property and reference designs
for developing a wide range of audio, video and many other exciting applications.
The fully integrated kit allows developers to rapidly customize their processor and IP to suit their
specific needs, rather than constraining their software around the fixed feature set of the processor.
The all-in-one embedded solution, the MAX 10 NEEK, combines a 5-point LCD touch panel and
digital image module that provides developers an ideal platform for multimedia applications,
making the best use of the parallel nature of FPGAs.
1
1. .1 1 P Pa ac ck ka ag ge e C Co on nt te en nt ts s
Figure 1-1 shows a photograph of the MAX 10 NEEK package.
Figure 1-1 The MAX 10 NEEK package contents

MAX 10 NEEK 4 www.terasic.com
February 4, 2016
The MAX 10 NEEK package includes:
The MAX 10 NEEK development board
MAX 10 NEEK Quick Start Guide
One USB cables (Type A to Mini-B) for USB control and FPGA programming and control
5V DC power adapter
Power Cable
1
1. .2 2 M MA AX X 1 10 0 N NE EE EK K S Sy ys st te em m C CD D
The MAX 10 NEEK System CD contains all the documents and supporting materials associated
with MAX 10 NEEK, including the user manual, system builder, reference designs, and device
datasheets. Users can download this system CD from the link: http://cd-max10-neek.terasic.com.
1
1. .3 3 G Ge et tt ti in ng g H He el lp p
Here are the addresses where you can get help if you encounter any problems:
Altera Corporation
101 Innovation Drive San Jose, California, 95134 USA
Email: [email protected]
Terasic Technologies
9F., No.176, Sec.2, Gongdao 5th Rd, East Dist, Hsinchu City, 30070. Taiwan
Email: [email protected]
Tel.: [phone]
Website: max10-neek.terasic.com

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February 4, 2016
Chapter 2
Introduction of the MAX 10 NEEK
Board
2
2. .1 1 L La ay yo ou ut t a an nd d C Co om mp po on ne en nt ts s
Figure 2-1 shows a photograph of the board. It depicts the layout of the board and indicates the
location of the connectors and key components.
Figure 2-1 MAX 10 NEEK development board (top view)

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February 4, 2016
Figure 2-2 MAX 10 NEEK development board (bottom view)
The MAX 10 NEEK board has many features that allow users to implement a wide range of
designed circuits, from simple circuits to various multimedia projects.
The following hardware is provided on the board:
Altera MAX® 10 10M50DAF484C6G device
USB-Blaster II onboard for programming; JTAG Mode
256MB DDR3 SDRAM (64Mx16 and 128Mx8)
64MB QSPI Flash
Micro SD card socket
Five push-buttons
Ten slide switches
Ten red user LEDs
Two 7-segment displays
Three 50MHz clock sources from the clock generator
24-bit CD-quality audio CODEC with line-in, line-out jacks
On-board microphone
HDMI RX, incorporates HDM v1.4a features, including 3D video supporting
800x480 7.0 inch Color LCD with 5-point Capacitive-touch
Gigabit Ethernet PHY with RJ45 connector
UART to USB, USB Mini-B connector
8M pixel MIPI CS2 color camera input

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February 4, 2016
One ambient light sensor
One humidity and temperature sensor
One accelerometer
One external 16 bit digital-to-analog converter (DAC) device with SMA output
Potentiometer input to ADC
Two MAX 10 FPGA ADC SMA inputs
One 2x10 ADC header with 16 analog inputs connected to MAX10 ADCs
2
2. .2 2 B Bl lo oc ck k D Di ia ag gr ra am m o of f t th he e M MA AX X 1 10 0 N NE EE EK K B Bo oa ar rd d
Figure 2-3 is the block diagram of the board. All the connections are established through the MAX
10 FPGA device to provide maximum flexibility for users. Users can configure the FPGA to
implement any system design.
Figure 2-3 Block diagram of MAX 10 NEEK

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February 4, 2016
F
FP PG GA A D De ev vi ic ce e
MAX 10 10M50DAF484C6G Device
Integrated dual ADCs, each ADC supports 1 dedicated analog input and 8 dual function pins
50K programmable logic elements
1,638 Kbits embedded memory
5,888 Kbits user flash memory
4 PLLs
C
Co on nf fi ig gu ur ra at ti io on n a an nd d D De eb bu ug g
On-board USB-Blaster II (mini USB type B connector)
Optional JTAG direct via 10-pin header
One slide switch for dual boot image selection
M
Me em mo or ry y D De ev vi ic ce e
256MB DDR3 SDRAM (64Mx16 and 128Mx8)
512Mb QSPI Flash
Micro SD card socket
C
Co om mm mu un ni ic ca at ti io on n a an nd d E Ex xp pa an ns si io on n H He ea ad de er r
Gigabit Ethernet PHY with RJ45 connector
UART to USB, USB Mini-B connector
PS/2 mouse/keyboard connector
2x6 TMD (Terasic Mini Digital) Expansion Header
D
Di is sp pl la ay y
800x480 7.0 inch Color LCD with 5-point Capacitive-touch
A
Au ud di io o
24-bit CD-quality audio CODEC with line-in, line-out jacks
V
Vi id de eo o I In np pu ut t
HDMI RX, incorporates HDM v1.4a features, including 3D video supporting
8M pixel MIPI CS2 color camera input
A
An na al lo og g
Two MAX 10 FPGA ADC SMA inputs
Potentiometer input to ADC
On-Board MIC input to ADC
2x10 ADC header with 16 analog inputs connected to MAX10 ADCs
One DAC SMA output

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February 4, 2016
S
Sw wi it tc ch he es s, , B Bu ut tt to on ns s, , a an nd d I In nd di ic ca at to or rs s
Five push-buttons
Ten slide switches
Ten red user LEDs
Two 7-segment displays
S
Se en ns so or rs s
Ambient light sensor
Humidity and temperature sensor
Accelerometer
Power monitor
P
Po ow we er r
5V/3A DC input