Terasic DE5a-Net User manual

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CONTENTS
CHAPTER 1 DE5A-NET OPENCL ............................................................................................................................3
1.1 SYSTEM REQUIREMENT ............................................................................................................................................3
1.2 OPENCLARCHITECTURE ..........................................................................................................................................4
CHAPTER 2 OPENCL FOR WINDOWS ..................................................................................................................5
2.1 SOFTWARE INSTALLATION.........................................................................................................................................5
2.2 ENVIRONMENT CONFIGURE ......................................................................................................................................8
2.3 OPENCLENVIRONMENT VERIFY ............................................................................................................................10
2.4 INITIALIZING THE FPGAFOR USING WITH OPENCL................................................................................................12
2.5 OPENCLRUNTIME VERIFY .....................................................................................................................................18
2.6 COMPILE AND TEST OPENCLPROJECT....................................................................................................................20
CHAPTER 3 OPENCL FOR LINUX .........................................................................................................................23
3.1 SOFTWARE INSTALLATION.......................................................................................................................................23
3.2 ENVIRONMENT CONFIGURE ....................................................................................................................................27
3.3 OPENCLENVIRONMENT VERIFY ............................................................................................................................28
3.4 INITIALIZING THE FPGAFOR USE WITH OPENCL....................................................................................................29
3.5 OPENCLRUNTIME VERIFY .....................................................................................................................................34
3.6 COMPILE AND TEST OPENCLPROJECT....................................................................................................................36
CHAPTER 4 APPENDIX ..........................................................................................................................................38
REVISION HISTORY ...................................................................................................................................................48
COPYRIGHT STATEMENT ........................................................................................................................................48

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Chapter 1
DE5a-Net OpenCL
DE5a-Net, an unparalleled and powerful platform for high-speed computation, is now officially also
an Intel certified board for Intel’s Preferred Board Partner Program for OpenCL. It supports both
64-bit Windows and Linux Operation System. This document will introduce you how to setup
OpenCL development environment for DE5a-Net board, and how to compile and execute the
example projects for DE5a-Net. Note that OpenCL coding instruction is not introduced in this
document, but the user can refer to Intel FPGA SDK for OpenCL Programming Guide for more
details.
https://www.altera.com/en_US/pdfs/literature/hb/opencl-sdk/aocl_programming_guide.pdf
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1. .1 1 S Sy ys st te em m R Re eq qu ui ir re em me en nt t
The following items are required to set up OpenCL for DE5a-Net board:
DE5a-Net Board with two 4GB DDR3-SODIMM installed on two SODIMM port.
A Host PC with
USB Host Port
One PCI Express x8/x16 slot with 12V power pin
32GB memory is recommended, 24GB is minimal
2x3 pin 12V Power for DE5a-Net (optional)
An USB Cable (type A to mini-B)
64-bit Windows7/10 or Linux (Redhat 6.5/CentOS 7.0) Installed
Intel Quartus Prime Pro Edition 17.1.0.240 Installed, licensed is required
Intel FPGASDK for OpenCL Pro Edition 17.1.0.240 Installed, license is not required
DE5a-Net OpenCL BSP 17.1 Installed
Visual Studio 2012 C/C++ installed for Windows7/10
GNU development tools for Linux
Note:

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1. Intel FPGA OpenCL only supports 64-bit OS and x86 architecture.
2. We strongly recommend setting the PCIe speed to Gen3x8 in your PC BIOS for good
performance.
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1. .2 2 O Op pe en nC CL L A Ar rc ch hi it te ec ct tu ur re e
An OpenCL project is composed of both OpenCL Kernel and Host Program as shown in Figure
1-1. OpenCL kernel is compiled with Intel FPGA OpenCL compiler provided by the Altera OpenCL
SDK. The Host Program is compiled by Visual Studio C/C++ in Windows or GCC on Linux.
Figure 1-1 Intel FPGA OpenCLArchitecture

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Chapter 2
OpenCL for Windows
This chapter describes how to set up DE5a-Net OpenCL development environment on 64-bit
Windows, and how to compile and test the OpenCL examples for DE5a-Net. For more details about
Intel FPGA OpenCL started guide, please refer to:
https://www.altera.com/en_US/pdfs/literature/hb/opencl-sdk/aocl_getting_started.pdf
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2. .1 1 S So of ft tw wa ar re e I In ns st ta al ll la at ti io on n
This section describes where to get the required software for OpenCL.
Quartus II and OpenCLSDK
Intel Quartus Prime Pro Edition 17.1.0.240 and Intel FPGA SDK for OpenCL Pro Edition
17.1.0.240 can be download from the web site:
http://dl.altera.com/opencl/17.1/?edition=pro
For Quartus II installation, please make sure that the Arria 10 device is included.
Open the link and select the Windows SDK table as Figure 2-1 shows.

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Figure 2-1 OpenCL Windows SDK Files
Visual Studio 2012
If developers don’t have Visual Studio C/C++ 2012, they can use the trial version of Visual Studio
2012 Express. The software can be downloaded from the web site:
https://www.visualstudio.com/vs/older-downloads/
DE5a-Net OpenCLBSP (Board Support Package)
After Quartus II and OpenCL SDK are installed, download the DE5ANET_E1_OpenCL_BSP
_17.1.zip DE5a-Net windows BSP from the web site:
http://de5a-net.terasic.com/cd
Then, decompress DE5ANET_E1_OpenCL_BSP_17.1.zip to the “de5a_net_e1” folder under the
folder “C:\intelFPGA_pro\17.1\hld\board”, as shown in Figure 2-2, where assumed Quartus II is
installed on the folder “C:\ intelFPGA_pro\17.1”.

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Figure 2-2 DE5a-Net OpenCL BSPContent
For more details about DE5a-Net OpenCL BSP, please refer to the Table 1.
Table 1 Windows BSPFile
File or Folder
Description
board_env.xml
eXtensible Markup Language (XML) file that describes the Reference
Platform to the Intel FPGA SDK for OpenCL.
hardware
Contains the Intel Quartus Prime project templates for the a10gx
board variant.
windows64
Contains the MMD library, kernel mode driver, and executable files
of the SDK utilities (that is, install, uninstall, flash, program,
diagnose) for your 64-bit operating system
tests
Contains some OpenCL Design Examples. The following examples
demonstrate how to describe various applications in OpenCL along
with their respective host applications, which you can compile and
execute on a host with an FPGA board that supports the Intel FPGA
SDK for OpenCL.

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2. .2 2 E En nv vi ir ro on nm me en nt t C Co on nf fi ig gu ur re e
Developers need to create and edit some environment variable that Intel FPGA OpenCL SDK
can find the kit location of DE5a-Net correctly
Now, here are the procedures to create the required environment variable on Windows 7:
1. Open the Start menu and right click on Computer. Select Properties.
2. Select Advanced system settings.
3. In the Advanced tab, select Environment Variables.
4. Select New.
5. In the popup dialog, edit New User Variable,type the name in the Variable name edit
box and type the value in the Variable value edit box.
First, edit the environment variable name ALTERAOCLSDKROOT to
INTELFPGAOCLSDKROOT,as shown in Figure 2-3.
Figure 2-3 Edit INTELFPGAOCLSDKROOT Environment Variable
Then, create an environment variable AOCL_BOARD_PACKAGE_ROOT, and set its value as:
“%INTELFPGAOCLSDKROOT%\board\ de5a_net_e1”
as shown in Figure 2-4.
Figure 2-4 Setup AOCL_BOARD_PACKAGE_ROOT Environment Variable
Also, append
"%QUARTUS_ROOTDIR%\bin64 " and

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"%QUARTUS_ROOTDIR%\qsys\bin" and
"%INTELFPGAOCLSDKROOT%\bin" and
"%INTELFPGAOCLSDKROOT%\windows64\bin" and
"%AOCL_BOARD_PACKAGE_ROOT%\windows64\bin"
into the PATH environment variable as shown in Figure 2-5 and Figure 2-6, so the OpenCL SDK
can find the binary file provided by OpenCL BSP.
Figure 2-5 Select “Path” and click “Edit” bottom
Figure 2-6 Edit PATH environment variable

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2. .3 3 O Op pe en nC CL L E En nv vi ir ro on nm me en nt t V Ve er ri if fy y
This section will show how to make sure the OpenCL environment is setup correctly. Firstly, please
open Command Prompt windows by click Windows Start button, clicking All Programs, clicking
Accessories, and then click Command Prompt.
Note: In Windows 10 OS, please open Command Prompt windows by click Windows Start
button, clicking All Programs, clicking Windows System, and then click Command Prompt.
Target AOCL
In Command Prompt window, type “where aoc” command, and make sure the path of the
“aoc.exe” is listed as shown in Figure 2-7.
Figure 2-7 where aoc
Target SDK Version
In Command Prompt window, type “aocl version” command, and make sure the version of the
OpenCL SDK is listed as shown in Figure 2-8.
Figure 2-8 Version of OpenCLSDK
Target Board
In Command Prompt window, type “aoc -list-boards” command, and make sure “de5a_net_e1”

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is listed in Board list as shown in Figure 2-9.
Figure 2-9 ‘de5a_net_e1’ is listed in Board list
For more information about the aoc and aocl, refer to the ‘aoc -h’and ‘aocl help’command.

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2. .4 4 I In ni it ti ia al li iz zi in ng g t th he e F FP PG GA A f fo or r u us si in ng g w wi it th h O Op pe en nC CL L
Board Setup
To use the DE5a-Net Arria 10 FPGA Development Kit with the Intel FPGA SDK for OpenCL, you
must follow the below procedures to set up DE5a-Net board on your PC as shown in Figure 2-10.
1. Make sure your PC is powered off.
2. Insert DE5a-Net board into PCI Express x8 or x16 slot.
3. Connect PC’s 12V PCI Express 6-pin power source to the DE5a-Net (if there’s not, ignore
this step).
4. Connect PC’s USB port to DE5a-Net mini USB port using an USB cable.
Note, the USB cable can be removed later if OpenCL code had been programmed to the startup
configuration flash of DE5a-Net by ‘aocl flash’ command.
Figure 2-10 Setup DE5a-Net board on PC
Bring up the FPGA Board
Before you can use the DE5a-Net Arria 10 FPGA Development Kit with OpenCL, you must
initialize the board with an OpenCL image. Without this image, the board host operating system
does not recognize the PCIe card and the Intel FPGA OpenCL compiler cannot find the device.
Program the FPGA on your DE5a-Net Arria 10 FPGA Development Kit with the top.sof file by

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running the test.bat file in bringup folder as shown in Figure 2-11.
Figure 2-11 Bring up the FPGA board
Perform a soft reboot (sometimes called a warm reboot) of your host system causes your host
system to recognize the DE5a-Net Arria 10 FPGA Development Kit PCIe card.
Driver Installation
Your system must recognize the card so that the Intel FPGA SDK for OpenCL driver can be loaded.
The install utility is used install the kernel driver on the host computer. Users of the Intel FPGA
SDK for OpenCL only need to install the driver once, after that the driver should be automatically
loaded each time the machine reboots.
In Command Prompt window, type ‘aocl install’to install the driver as shown in Figure 2-12.
Note that users need to have administrator privileges to install the driver.

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Figure 2-12 driver installation
For windows7 x64, If it pops dialog“Windows Security”during the installation process，please
choose “Install this driver software anyway” as shown in Figure 2-13 and go on.
Figure 2-13 windows security
When the installation is successful, Jungo WinDriver and FPGA Accelerator board can be found
in the PC Device Manage as shown in Figure 2-14.

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Figure 2-14 Driver Installation Success
For windows10 x64, please refer to the of Chapter 4 Appendix.
‘aocl flash’ program
The flash utility configures the power-on image for the FPGA using the specified aocx file. Calling
into the MMD library implements the flash utility.
In Command Prompt window, type “cd C:\intelFPGA\17.1\hld\board\de5a_net_e1\tests\hello
_world\bin”to go to hello world OpenCL project folder.
Then type “aocl flash acl0 hello_world.aocx” to write hello_world.aocx OpenCL image onto the
startup configuration flash of DE5a-Net.
Before flash programming, the programmer will ask users which startup configuration image area
will be used as shown in Figure 2-15. This is because DE5a-Net provides two startup configuration
image areas, called as Factory Image and User Image. We recommend users to key in ‘1’ to select
User Image area.

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Figure 2-15 Select Flash Page
After users select desired flash area, it will take about 8 minutes for flash programming. Figure
2-16 is the screen shot when flash programming is done successfully.
Figure 2-16 Aocl Flash Successfully
To make sure a correct image is used when FPGA boots up, please make sure the dip switch SW3.4

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on DE5a-Net is changed to the correct location. If a User Image area is selected, the dip switch
SW3.4 on the DE5a-Net should be moved to Up position as shown in Figure 2-17.
Figure 2-17 Set SW3.4 to Up Position (User Image Page)
After flash programming is done successfully and SW3.4 is set to correct position, developers
must power off DE5a-Net board, then turn it back on, and restart the PC.

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2. .5 5 O Op pe en nC CL L R Ru un nt ti im me e V Ve er ri if fy y
Test ‘aocl diagnose’ Command
The diagnose utility reports device information and identifies issues. The diagnose utility first
verifies the installation of the kernel driver and returns the overall information of all the devices
installed in a host machine.
In Command Prompt window, type “aocl diagnose” to check if the initialization completed
successfully. If successful, the programming message displays “DIAGNOSTIC_PASSED” as
shown in Figure 2-18.
Figure 2-18 “aocl diagnose”Messages
Note: It is strongly recommended that users set the PCIe speed at Gen 3 in the BIOS on the host
PC, so that the DE5a-Net negotiates with the host PC at Gen3 as the link speed. If your PC supports
PCIe Gen3x8, but it gets incorrect detected information, you can modify the PCIe settings in the
BIOS, and reboot.
Test ‘aocl program’ Command
The program utility programs the board with the specified aocx file. Check whether the
hello_world OpenCL image configures the FPGA successfully. In Command Prompt window,
type “cd C:\intelFPGA_pro\17.1\hld\board\de5a_net_e1\tests\hello_world\bin”to go to bin folder,
then type “aocl program acl0 hello_world.aocx” to configure the FPGA with hello_world.aocx

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OpenCL image. If the programming message displays “Program succeed” as shown in Figure 2-19,
it means the hello_world OpenCL image is programmed into the FPGA successfully.
Figure 2-19 Aocl Program Successfully

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2. .6 6 C Co om mp pi il le e a an nd d T Te es st t O Op pe en nC CL L P Pr ro oj je ec ct t
This section will show how to compile and test OpenCL kernel and OpenCL Host Program for the
vector_add project. Developers can use the same procedures to compile and test other OpenCL
examples for DE5a-Net.
Compile OpenCL Kernel
The utility aoc (Altera SDK for OpenCL Kernel Compiler) is used to compile the OpenCL
kernel. In Command Prompt window, type “cd C:\intelFPGA_pro\17.1\hld\board\de5a_net_e
1\tests\vector_add” to go to vector_add project folder.
then type “aoc device\vector_add.cl -o bin\vector_add.aocx -board=de5a_net_e1 -v” to compile
the OpenCL kernel. It will take about one hour for compiling. When the compilation process is
finished, OpenCL image file vector_add.aocx is generated. Figure 2-20 is the screenshot when
OpenCL kernel is compiling. For required parameters to compile vector_add.cl, please refer to the
README.html in the vector_add folder. For detailed usage of aoc, please refer to the Intel FPGA
SDK for OpenCL Programming Guide:
https://www.altera.com/en_US/pdfs/literature/hb/opencl-sdk/aocl_programming_guide.pdf
Figure 2-20 OpenCL Kernel Compile