Tews Technologies TPMC816 User manual

The Embedded I/O Compan
y
TPMC816
Two Independent Channels
Extended CAN Bus PMC Module
Version 2.1
User Manual
Issue 2.1.0
October 2011
TEWS TECHNOLOGIES GmbH
Am Bahnhof 7 25469 Halstenbek, Germany
Phone: [phone] Fax: [phone]
e-mail: [email protected] www.tews.com

TPMC816 V.2.1 User Manual Issue 2.1.0 Page 2 of 22
TPMC816-10
2 independent channels extended CAN bus PMC
module
TPMC816-11
1 independent channel extended CAN bus PMC
module
This document contains information, which is
proprietary to TEWS TECHNOLOGIES GmbH. Any
reproduction without written permission is forbidden.
TEWS TECHNOLOGIES GmbH has made any
effort to ensure that this manual is accurate and
complete. However TEWS TECHNOLOGIES GmbH
reserves the right to change the product described
in this document at any time without notice.
TEWS TECHNOLOGIES GmbH is not liable for any
damage arising out of the application or use of the
device described herein.
Style Conventions
Hexadecimal characters are specified with prefix 0x,
i.e. 0x029E (that means hexadecimal value 029E).
For signals on hardware products, an ‚Active Low’ is
represented by the signal name with # following, i.e.
IP_RESET#.
Access terms are described as:
W Write Only
R Read Only
R/W Read/Write
R/C Read/Clear
R/S Read/Set
©2011 by TEWS TECHNOLOGIES GmbH
All trademarks mentioned are property of their respective owners.

TPMC816 V.2.1 User Manual Issue 2.1.0 Page 3 of 22
Issue Description Date
1.0 Module Version 2.0
Exchange PCI – device and physical CAN interface January 2002
1.1 Change default values for Hot Swap Register June 2002
1.2 General Revision December 2002
1.3 Corrections in PCI Target Chip Register Description,
Updated Block Diagram for P14 I/O,
Added I/O Connection Note
January 2005
1.4 New address TEWS LLC September 2006
2.0.0 New notation of User Manual Issue September 2009
2.1.0 New hardware version with new CAN controller October 2011

TPMC816 V.2.1 User Manual Issue 2.1.0 Page 4 of 22
Table of Contents
1PRODUCT DESCRIPTION.........................................................................................6
2TECHNICAL SPECIFICATION...................................................................................7
3LOCAL SPACE ADDRESSING..................................................................................8
3.1 Local I/O Space ...............................................................................................................................8
3.2 Local Memory Space ......................................................................................................................8
3.3 Memory Address Map.....................................................................................................................8
4PCI9030 TARGET CHIP...........................................................................................11
4.1 PCI Configuration Registers (PCR).............................................................................................11
4.1.1 PCI9030 Header.................................................................................................................11
4.1.2 PCI Base Address Initialization ..........................................................................................12
4.2 Local Configuration Register (LCR)............................................................................................13
4.3 Configuration EEPROM................................................................................................................14
4.4 Local Software Reset....................................................................................................................15
5CONFIGURATION HINTS........................................................................................16
5.1 PCI Interrupt Control/Status Register (Address 0x4C) .............................................................16
5.2 Software Reset (Controller and LRESET#).................................................................................16
5.3 Big / Little Endian..........................................................................................................................17
6INSTALLATION........................................................................................................19
6.1 CAN bus Termination ...................................................................................................................19
6.2 Physical Interface..........................................................................................................................19
6.3 Typical operating circuit ..............................................................................................................20
6.4 I/O Connection Note......................................................................................................................20
7PIN ASSIGNMENT ...................................................................................................21
7.1 Front Panel I/O...............................................................................................................................21
7.2 Mezzanine Card Connector P14 ..................................................................................................22

TPMC816 V.2.1 User Manual Issue 2.1.0 Page 5 of 22
List of Figures
Figure 1-1 : Block Diagram................................................................................................................................6
Figure 6-1 : Jumper Location TPMC816.........................................................................................................19
Figure 6-2 : Typical operating circuit...............................................................................................................20
List of Tables
Table 2-1 : Technical Specification ...................................................................................................................7
Table 3-1 : Memory Address Map CAN Controller Channel 0 CANCH0..........................................................9
Table 3-2 : Memory Address Map CAN Controller Channel 1 CANCH1........................................................10
Table 4-1 : PCI9030 Header............................................................................................................................11
Table 4-2 : PCI9030 PCI Base Address Usage..............................................................................................12
Table 4-3 : PCI9030 Local Configuration Register..........................................................................................13
Table 4-4 : Configuration EEPROM TPMC816-10..........................................................................................14
Table 4-5 : Configuration EEPROM TPMC816-11..........................................................................................15
Table 5-1 : Interrupt Control/Status Register INTCSR (Address 0x4C)..........................................................16
Table 5-2 : Local Bus Little/Big Endian ...........................................................................................................17
Table 6-1 : Physical Interface Selection..........................................................................................................19
Table 7-1 : DB9 Male Connector Channel 0 ...................................................................................................21
Table 7-2 : DB9 Male Connector Channel 1 ...................................................................................................21
Table 7-3 : Mezzanine Card Connector P14...................................................................................................22

TPMC816 V.2.1 User Manual Issue 2.1.0 Page 6 of 22
1 Product Description
The TPMC816 is a standard single-width 32 bit PMC module with two complete CAN bus interfaces
using two Innovasic Semiconductor IA82527 CAN controllers. The IA82527 is a form, fit and function
replacement for the Intel 82527 CAN controller. Both channels are completely independent and
support CAN specification 2.0 part A and B (Standard 11 bit identifier and extended 29 bit identifier).
Each channel provides CAN High Speed and modified RS485 as physical interface. The physical
interfaces are optically isolated from the CAN controller and powered by an on board DC/DC converter
for each channel. The TPMC816-11 provides one CAN bus channel.
Figure 1-1 : Block Diagram

TPMC816 V.2.1 User Manual Issue 2.1.0 Page 7 of 22
2 Technical Specification
Logic Interface PCI Mezzanine Card Interface
PCI Target Chip PCI9030 (PLX Technology)
PCI I/O Signaling Voltage
Keying +3.3V and +5.0V
Module Specific Data
CAN Controller Innovasic IA82527
Number of Channels TPMC816-10: 2
TPMC816-11: 1
Physical Interface CAN high speed (according ISO 11898)
Modified RS485
Selectable by jumper for each channel
Bus Line Termination On board 120 ohms, selectable by jumper for each channel
Transfer Rate Up to 1 Mbps at bus line length of up to 40 m
Isolation CAN bus isolated by optocouplers
I/O Interface
Front panel TPMC816-10: two DB9 male connectors
TPMC816-11: one DB9 male connector
P14 Connector TPMC816-10: 64pol. Mezzanine P14 I/O
TPMC816-11: 64pol. Mezzanine P14 I/O
Operating Data
Power Requirements 120mA typical @ +3.3V DC
220mA typical @ +5V DC (TPMC816-10)
120mA typical @ +5V DC (TPMC816-11)
Temperature Range Operating: – 40°C to + 85°C
Storage: – 55°C to + 125°C
MTBF TPMC816-10: 752000 h
TPMC816-11: 927000 h
Weight 79 g
Size Singe Size CMC
Humidity 5 – 95 % non-condensing
Table 2-1 : Technical Specification

TPMC816 V.2.1 User Manual Issue 2.1.0 Page 8 of 22
3 Local Space Addressing
3.1Local I/O Space
Not used by the TPMC816
3.2Local Memory Space
The complete register sets of the two CAN controllers of the TPMC816 are accessible in the memory
space of the PMC module.
Address range: PCI Base Address 2 for Local Address Space 0 + (0x0000 to 0x01FF)
CAN controller Channel 0 CANCH0: PCI Base Address 2 + (0x0000 to 0x00FF)
CAN controller Channel 1 CANCH1: PCI Base Address 2 + (0x0100 to 0x01FF)
3.3Memory Address Map
Address Symbol Description
CAN Controller Channel 0 CANCH0
0x0000 Control Register
0x0001 Status Register
0x0002 CPU Interface Register
0x0003 Reserved
0x0004-0x0005 High Speed Read Register
0x0006-0x0007 Global Mask – Standard
0x0008-0x000B Global Mask – Extended
0x000C-0x000F Message 15 Mask
0x0010-0x001E Message 1
0x001F CLKOUT Register
0x0020-0x002E Message 2
0x002F Bus Configuration Register
0x0030-0x003E Message 3
0x003F Bit Timing Register 0
0x0040-0x004E Message 4
0x004F Bit Timing Register 1
0x0050-0x005E Message 5
0x005F Interrupt Register
0x0060-0x006E Message 6
0x006F Reserved
0x0070-0x007E Message 7
0x007F Reserved
0x0080-0x008E Message 8

TPMC816 V.2.1 User Manual Issue 2.1.0 Page 9 of 22
Address Symbol Description
0x008F Reserved
0x0090-0x009E Message 9
0x009F P1CONF
0x00A0-0x00AE Message A
0x00AF P2CONF
0x00B0-0x00BE Message B
0x00BF P1IN
0x00C0-0x00CE Message C
0x00CF P2IN
0x00D0-0x00DE Message D
0x00DF P1OUT
0x00E0-0x00EE Message E
0x00EF P2OUT
0x00F0-0x00FE Message F
0x00FF Serial Reset Address
Table 3-1 : Memory Address Map CAN Controller Channel 0 CANCH0
Address Symbol Description
CAN Controller Channel 1 CANCH1
0x0100 Control Register
0x0101 Status Register
0x0102 CPU Interface Register
0x0103 Reserved
0x0104-0x0105 High Speed Read Register
0x0106-0x0107 Global Mask – Standard
0x0108-0x010B Global Mask – Extended
0x010C-0x010F Message 15 Mask
0x0110-0x011E Message 1
0x011F CLKOUT Register
0x0120-0x012E Message 2
0x012F Bus Configuration Register
0x0130-0x013E Message 3
0x013F Bit Timing Register 0
0x0140-0x014E Message 4
0x014F Bit Timing Register 1
0x0150-0x015E Message 5
0x015F Interrupt Register
0x0160-0x016E Message 6
0x016F Reserved
0x0170-0x017E Message 7

TPMC816 V.2.1 User Manual Issue 2.1.0 Page 10 of 22
Address Symbol Description
0x017F Reserved
0x0180-0x018E Message 8
0x018F Reserved
0x0190-0x019E Message 9
0x019F P1CONF
0x01A0-0x01AE Message A
0x01AF P2CONF
0x01B0-0x01BE Message B
0x01BF P1IN
0x01C0-0x01CE Message C
0x01CF P2IN
0x01D0-0x01DE Message D
0x01DF P1OUT
0x01E0-0x01EE Message E
0x01EF P2OUT
0x01F0-0x01FE Message F
0x01FF Serial Reset Address
Table 3-2 : Memory Address Map CAN Controller Channel 1 CANCH1