Texas Instruments SimpleLink CC3235MODS User manual

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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
CC3235MODS, CC3235MODSF
SWRS224A –FEBRUARY 2019–REVISED AUGUST 2019
CC3235MODx SimpleLink™ Wi-Fi CERTIFIED™ Dual-band Wireless MCU Module
1 Module Overview
1
1.1 Features
1
• Fully integrated and green/RoHS modules includes
all required clocks, SPI Flash, and passives
• 802.11 a/b/g/n: 2.4 GHz and 5 GHz
• FCC, IC/ISED, ETSI/CE, and MIC Certified
• FIPS 140-2 Level 1 Validated IC Inside
• Multilayered security features, help developers
protect identities, data, and software IP
• Low-power modes for battery powered application
• Coexistence with 2.4 GHz radios
• Industrial temperature: –40°C to +85°C
• CC3235MODx multiple-core architecture, system-
on-chip (SoC)
• 1.27-mm pitch QFM package for easy assembly
and low-cost PCB design
• Transferrable Wi-Fi Alliance®Certification
• Application microcontroller subsystem:
– Arm®Cortex®-M4 core at 80 MHz
– User-dedicated memory
– 256 KB RAM
– Optional 1 MB executable Flash
– Rich set of peripherals and timers
– McASP Supports Two I2S Channels
– SD, SPI, I2C, UART
– 8-Bit Synchronous Imager Interface
– 4-Channel 12-Bit ADCs
– 4 General-Purpose Timers (GPT) with 16-Bit
PWM Mode
– Watchdog Timer
– Up to 27 GPIO Pins
– Debug Interfaces: JTAG, cJTAG, SWD
•Wi-Fi network processor subsystem:
– Wi-Fi®core:
– 802.11 a/b/g/n 2.4 GHz and 5 GHz
– Modes:
– Access Point (AP)
– Station (STA)
– Wi-Fi Direct®(only supported on 2.4 GHz)
– Security:
– WEP
– WPA™/ WPA2™ PSK
– WPA2 Enterprise
– Internet and application protocols:
– HTTPs server, mDNS, DNS-SD, DHCP
– IPv4 and IPv6 TCP/IP stack
– 16 BSD sockets (fully secured TLS v1.2 and
SSL 3.0)
– Built-in power management subsystem:
– Configurable low-power profiles (always on,
intermittently connected, tag)
– Advanced low-power modes
– Integrated DC/DC regulators
•Multilayered security features:
– Separate execution environments
– Networking security
– Device identity and key
– Hardware accelerator cryptographic engines
(AES, DES, SHA/MD5, CRC)
– File system security (encryption, authentication,
access control)
– Initial secure programming
– Software tamper detection
– Secure boot
– Certificate signing request (CSR)
– Unique per device key pair
• Application throughput
– UDP: 16 Mbps
– TCP: 13 Mbps
•Power-Management Subsystem:
– Integrated DC/DC converters support a wide
range of supply voltage:
– Single wide-voltage supply, VBAT: 2.3 V to
3.6 V
– Advanced low-power modes:
– Shutdown: 1 µA, Hibernate: 5.5 µA
– Low-power deep sleep (LPDS): 120 µA
– Idle connected (MCU in LPDS): 710 µA
– RX traffic (MCU active): 59 mA
– TX traffic (MCU active): 223 mA
– Wi-Fi TX power
– 2.4 GHz: 16 dBm at 1 DSSS
– 5 GHz: 15.1 dBm at 6 OFDM
– Wi-Fi RX sensitivity
– 2.4 GHz: –94.5 dBm at 1 DSSS
– 5 GHz: –89 dBm at 6 OFDM

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Module Overview Copyright © 2019, Texas Instruments Incorporated
• Additional integrated components
– 40.0 MHz crystal
– 32.768 kHz crystal (RTC)
– 32 Mbit SPI Serial Flash
– RF filters, diplexer and passive components
• Footprint compatible QFM package
– CC3235MODx: 1.27-mm pitch,
63-pin, 20.5-mm × 17.5-mm
• Module Supports SimpleLink Developer's
Ecosystem
1.2 Applications
• For Internet of Things applications, such as:
–Medical and Healthcare
•Multiparameter Patient Monitor
•Electrocardiogram (ECG)
•Electronic Hospital Bed & Bed Control
•Telehealth Systems
–Building and Home Automation:
•HVAC Systems & Thermostat
•Video Surveillance, Video Doorbells, and
Low-Power Camera
•Building Security Systems and E-locks
–Appliances
–Asset Tracking
–Factory Automation
–Grid Infrastructure
1.3 Description
Start your design with the fully programmable FCC, ISED/IC, ETSI/CE, and MIC Certified wireless
microcontroller (MCU) module with built-in dual-band Wi-Fi connectivity. The modules integrate the
40-MHz crystal, 32.768-kHz RTC clock, 32-Mb SPI serial Flash, RF filters, diplexer, and passive
components.
The SimpleLink™ CC3235MODx module family come in two different module variants:
•CC3235MODS includes 256KB of RAM, IoT networking security, device identity/keys, as well as, MCU
level security features such as file system encryption, user IP (MCU image) encryption, secure boot
and debug security.
•CC3235MODSF builds on the CC3235MODS and integrates a user-dedicated 1MB of executable flash
in addition to the 256KB of RAM.
Created for IoT, the SimpleLink™ Wi-Fi®CC3235MODx module family from Texas Instruments™ is a
wireless module that integrates two physically separated on-chip MCUs.
• Application processor—Arm®Cortex®-M4 MCU with a user-dedicated 256KB of RAM and an optional
1MB of executable flash.
• Network processor to run all Wi-Fi®and Internet logical layers. This ROM-based subsystem completely
offloads the host MCU and includes an 802.11 a/b/g/n dual-band 2.4 GHz and 5 GHz radio, baseband,
and MAC with a powerful hardware cryptography engine.
This generation introduces new capabilities that further simplify the connectivity of things to the Internet.
The main new features include:
• 802.11 a/b/g/n: 2.4 GHz and 5 GHz support
• 2.4 GHz Coexistence with Bluetooth®low energy radio
• Antenna diversity
• Enhanced security with FIPS 140-2 Level 1 validated IC inside: certification.
• More concurrent secure sockets (up to 16)
• Certificate signing request (CSR)
• Online certificate status protocol (OCSP)
• Wi-Fi Alliance®certified for IoT applications with low-power capabilities and more
• Hostless mode for offloading template packet transmissions
• Improved fast scan

CC3235
MAC/PHY
WRF_BGN F
BGN
RF_ABG
32-Mbit
SFlash
External SPI
Programming
40 MHz
32.768 kHz
UART
SPI
nReset
PM
2.3 V to 3.6 V
VBAT
User GPIOx
Aband
F
D
5 GHz
SPDT
WRF_A
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Module OverviewCopyright © 2019, Texas Instruments Incorporated
(1) For more information, see Section 10.
The CC3235MODx device family is part of the SimpleLink™ MCU platform—a common, easy-to-use
development environment based on a single-core software development kit (SDK) with a rich tool set and
reference designs. The E2E™ community supports Wi-Fi®, Bluetooth®low energy, Sub-1 GHz, and host
MCUs. For more information, visit www.ti.com/simplelink or www.ti.com/simplelinkwifi.
Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
CC3235MODSM2MOB QFM (63) 20.5 mm × 17.5 mm
CC3235MODSF12MOB QFM (63) 20.5 mm × 17.5 mm
1.4 Functional Block Diagrams
Figure 1-1 shows the functional block diagram of the CC3235MODx module.
Figure 1-1. CC3235MODx Functional Block Diagram

CC32xx ±Single-Chip Wireless MCU
ARM
Cortex-M4
80 MHz
1-MB Flash (optional)
256-KB RAM
ROM
Peripherals
1x SPI
2x UART
1x I2C
1x I2S/PCM
1x SD/MMC
8-bit Camera
4x ADC
System
DMA
Timers
GPIOs
Network Processor
Application
Protocols
RAM
ROM
Crypto Engine
Wi-Fi Driver
TCP/IP Stack
(ARM Cortex)
Power
Management
Oscillators
DC-DC
RTC
Baseband
MAC
Processor
Radio
Synthesizer
Dual Band
Wi-Fi
COEX I/Os
Antenna Selection
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Module Overview Copyright © 2019, Texas Instruments Incorporated
Figure 1-2 shows the an overview of the CC3235x hardware.
Figure 1-2. CC3235x Hardware Overview

Customer Application
Peripherals
Driver SimpleLink Driver APIs
NetApp BSD
Socket Wi-Fi
Host Interface
Network Applications
WLAN Security
and
Management
TCP/IP Stack
WLAN MAC and PHY
Applications MCU
Network Processor
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Module OverviewCopyright © 2019, Texas Instruments Incorporated
Figure 1-3 shows the an overview of the CC3235x embedded software.
Figure 1-3. CC3235x Embedded Software Overview

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Table of Contents Copyright © 2019, Texas Instruments Incorporated
Table of Contents
1 Module Overview ........................................ 1
1.1 Features .............................................. 1
1.2 Applications........................................... 2
1.3 Description............................................ 2
1.4 Functional Block Diagrams........................... 3
2 Revision History ......................................... 7
3 Device Comparison ..................................... 8
3.1 Related Products.................................... 10
4 Terminal Configuration and Functions ............ 11
4.1 CC3235MODx Pin Diagram......................... 11
4.2 Pin Attributes and Pin Multiplexing.................. 12
4.3 Signal Descriptions.................................. 29
4.4 Drive Strength and Reset States for Analog-Digital
Multiplexed Pins..................................... 35
4.5 Pad State After Application of Power to Chip, but
Before Reset Release............................... 35
4.6 Connections for Unused Pins....................... 36
5 Specifications........................................... 37
5.1 Absolute Maximum Ratings......................... 37
5.2 ESD Ratings ........................................ 37
5.3 Recommended Operating Conditions............... 37
5.4 Current Consumption (CC3235MODS) ............. 38
5.5 Current Consumption (CC3235MODSF)............ 40
5.6 TX Power Control for 2.4 GHz Band................ 42
5.7 TX Power Control for 5 GHz ........................ 44
5.8 Brownout and Blackout Conditions ................. 44
5.9 Electrical Characteristics for GPIO Pins ............ 46
5.10 GPIO Pins Except 25, 26, 42, and 44 (25°C)....... 46
5.11 GPIO Pins 25, 26, 42, and 44 (25°C)............... 47
5.12 Pin Internal Pullup and Pulldown (25°C)............ 47
5.13 WLAN Receiver Characteristics .................... 48
5.14 WLAN Transmitter Characteristics.................. 49
5.15 BLE and WLAN Coexistence Requirements........ 50
5.16 Reset Requirement ................................. 50
5.17 Thermal Resistance Characteristics for MOB
Packages............................................ 50
5.18 Timing and Switching Characteristics............... 51
6 Detailed Description ................................... 63
6.1 Overview ............................................ 63
6.2 Functional Block Diagram........................... 63
6.3 Arm®Cortex®-M4 Processor Core Subsystem ..... 64
6.4 Wi-Fi®Network Processor Subsystem.............. 65
6.5 Security.............................................. 67
6.6 FIPS 140-2 Level 1 Certification .................... 70
6.7 Power-Management Subsystem .................... 70
6.8 Low-Power Operating Mode ........................ 70
6.9 Memory.............................................. 72
6.10 Restoring Factory Default Configuration............ 74
6.11 Boot Modes.......................................... 74
6.12 Hostless Mode ...................................... 75
6.13 Device Certification and Qualification............... 76
6.14 Module Markings.................................... 78
6.15 End Product Labeling ............................... 79
6.16 Manual Information to the End User ................ 79
7 Applications, Implementation, and Layout ....... 79
7.1 Typical Application .................................. 79
7.2 Device Connection and Layout Fundamentals...... 83
7.3 PCB Layout Guidelines ............................. 84
8 Environmental Requirements and SMT
Specifications........................................... 90
8.1 PCB Bending........................................ 90
8.2 Handling Environment .............................. 90
8.3 Storage Condition ................................... 90
8.4 PCB Assembly Guide ............................... 90
8.5 Baking Conditions................................... 91
8.6 Soldering and Reflow Condition .................... 92
9 Device and Documentation Support ............... 93
9.1 Third-Party Products Disclaimer .................... 93
9.2 Development Tools and Software................... 93
9.3 Firmware Updates................................... 95
9.4 Device Nomenclature ............................... 95
9.5 Documentation Support ............................. 96
9.6 Related Links........................................ 98
9.7 Trademarks.......................................... 98
9.8 Electrostatic Discharge Caution..................... 98
9.9 Export Control Notice ............................... 98
9.10 Glossary............................................. 98
10 Mechanical, Packaging, and Orderable
Information .............................................. 99
10.1 Mechanical, Land, and Solder Paste Drawings..... 99
10.2 Package Option Addendum........................ 100

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Revision HistoryCopyright © 2019, Texas Instruments Incorporated
2 Revision History
Changes from Original (February 2019) to Revision A Page
• Changed Figure 1-1 ................................................................................................................. 3
• Changed NWP LPDS row in Table 5-1 .......................................................................................... 38
• Changed NWP LPDS row in Table 5-2 .......................................................................................... 39
• Changed NWP LPDS row in Table 5-3 .......................................................................................... 40
• Changed NWP LPDS row in Table 5-4 .......................................................................................... 41
• Deleted footnote from Table 5-9 .................................................................................................. 49
• Changed MIC ID in Table 6-7 ..................................................................................................... 78
• Updated Dual-Antenna Coexistence Mode Block Diagram image. .......................................................... 80
• Updated Coexistence Solution with Wi-Fi Antenna Selection and Dedicated BLE Antenna image. .................... 81
• Changed Section 8.1 ............................................................................................................... 90
• Changed shelf life in Section 8.3.1................................................................................................ 90
• Changed assembly operations in Section 8.4.2 ................................................................................ 90
• Changed solder paste composition in Section 8.6.............................................................................. 92
• Changed peak temperature in Section 8.6....................................................................................... 92
• Changed Figure 8-1 ................................................................................................................ 92
• Added Table 8-1 .................................................................................................................... 92
• Changed Figure 9-1 ................................................................................................................ 95
• Changed first NOTE in Section 10.1 ............................................................................................. 99

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3 Device Comparison
Table 3-1 shows the features supported across different CC3x35 modules.
Table 3-1. Device Features Comparison
FEATURE DEVICE
CC3135MOD CC3235MODS CC3235MODSF
On-board chip CC3135 CC3235S CC3235SF
On-board ANT No No No
sFlash 32-Mbit 32-Mbit 32-Mbit
Regulatory certifications FCC, IC/ISED, ETSI/CE, MIC FCC, IC/ISED, ETSI/CE, MIC FCC, IC/ISED, ETSI/CE, MIC
Wi-Fi Alliance®Certification Yes Yes Yes
Input voltage 2.3 V to 3.6 V 2.3 V to 3.6 V 2.3 V to 3.6 V
Package 17.5 mm × 20.5 mm QFM 17.5 mm × 20.5 mm QFM 17.5 mm × 20.5 mm QFM
Operating temperature range –40°C to +85°C –40°C to +85°C –40°C to +85°C
Classification Wi-Fi Network Processor Wireless Microcontroller Wireless Microcontroller
Standard 802.11 a/b/g/n 802.11 a/b/g/n 802.11 a/b/g/n
Frequency 2.4 GHz, 5 GHz 2.4 GHz, 5 GHz 2.4 GHz, 5 GHz
TCP/IP Stack IPv4, IPv6 IPv4, IPv6 IPv4, IPv6
Secured sockets 16 16 16
Integrated MCU – Arm®Cortex®-M4 at 80 MHz Arm®Cortex®-M4 at 80 MHz
ON-CHIP APPLICATION MEMORY
RAM – 256KB 256KB
Flash – – 1MB
PERIPHERALS AND INTERFACES
Universal Asynchronous
Receiver/Transmitter (UART) 1 2 2
Serial Port Interface (SPI) 1 1 1
Multichannel Audio Serial Port (McASP)- I2S or PCM – 2-ch 2-ch
Inter-Integrated Circuit (I2C) – 1 1
Analog-to-digital converter (ADC) – 4-ch, 12-bit 4-ch, 12-bit
Parallel interface (8-bit PI) – 1 1
General-purpose timers – 4 4
Multimedia card (MMC / SD) – 1 1
SECURITY FEATURES
Additional networking security Unique Device Identity Trusted Root-Certificate Catalog
TI Root-of-Trust Public key
Unique Device Identity
Trusted Root-Certificate Catalog
TI Root-of-Trust Public key
Unique Device Identity
Trusted Root-Certificate Catalog
TI Root-of-Trust Public key
Hardware acceleration Hardware Crypto Engines Hardware Crypto Engines Hardware Crypto Engines

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Table 3-1. Device Features Comparison (continued)
FEATURE DEVICE
CC3135MOD CC3235MODS CC3235MODSF
Secure boot – Yes Yes
Enhanced Application Level Security –
File system security
Secure key storage
Software tamper detection
Cloning protection
Initial secure programming
File system security
Secure key storage
Software tamper detection
Cloning protection
Initial secure programming
FIPS 140-2 Level 1 Certification Yes Yes Yes

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3.1 Related Products
For information about other devices in this family of products or related products see the links below.
The SimpleLink™ MCU Portfolio offers a single development environment that delivers flexible
hardware, software and tool options for customers developing wired and wireless
applications. With 100 percent code reuse across host MCUs, Wi-Fi®, Bluetooth®low
energy, Sub-1GHz devices and more, choose the MCU or connectivity standard that fits your
design. A one-time investment with the SimpleLink software development kit (SDK) allows
you to reuse often, opening the door to create unlimited applications.
SimpleLink™ Wi-Fi®Family The SimpleLink Wi-Fi Family offers several Internet-on-a chip solutions,
which address the need of battery operated, security enabled products. Texas instruments
offers a single chip wireless microcontroller and a wireless network processor which can be
paired with any MCU, to allow developers to design new wi-fi products, or upgrade existing
products with wi-fi capabilities.
BoosterPack™ Plug-In Modules BoosterPack™ Plug-In Modules extend the functionality of TI
LaunchPad Kit. Application specific BoosterPack Plug in modules allow you to explore a
broad range of applications, including capacitive touch, wireless sensing, LED Lighting
control, and more. Stack multiple BoosterPack modules onto a single LaunchPad kit to
further enhance the functionality of your design.
Reference Designs for CC3200, CC3220, and CC3235 Modules TI Designs Reference Design Library
is a robust reference design library spanning analog, embedded processor and connectivity.
Created by TI experts to help you jump start your system design, all TI Designs include
schematic or block diagrams, BOMs and design files to speed your time to market.
SimpleLink™ Wi-Fi®CC3235 SDK The SDK contains drivers for the CC3235 programmable MCU,
sample applications, and documentation required to start development with CC3235x
solutions.

CC3235MODx
63
59
62 61
60
57
56
58
55
FLASH_SPI_nCS_IN
FLASH_SPI_MOSI
12
11
10
9
8
7
6
5
4
3
2
1
13
15
16
14
GND
FLASH_SPI_CLK
FLASH_SPI_MISO
JTAG_TDI
GPIO22
GPIO13
GPIO12
GPIO17
GPIO16
GPIO15
GPIO14
GPIO11
GPIO10
GND
GND
2623
22
21 27252420
1918
17
GND
GND GND
SOP1 SOP2
JTAG_TMS
JTAG_TCK
NC
GPIO28
JTAG_TDO
32
33
34
35
36
37
38
39
40
41
42
43
31
29
28
30
4548
49
50 44464751
5253
54
GPIO0
NC GPIO1
GPIO2
GPIO3
GPIO4 GPIO5 GPIO6 GPIO7
GPIO8 GPIO9
GND
GND
GND
RF_ABG
GND
NC
SOP0
nRESET
VBAT_RESET
VBAT1
GND
NC
VBAT2
NC
GPIO30
GND
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Terminal Configuration and FunctionsCopyright © 2019, Texas Instruments Incorporated
4 Terminal Configuration and Functions
4.1 CC3235MODx Pin Diagram
Figure 4-1 shows the pin diagram for the CC3235MODx module.
NOTE: Figure 4-1 shows the approximate location of pins on the module.
Figure 4-1. CC3235MODx Pin Diagram Bottom View

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4.2 Pin Attributes and Pin Multiplexing
The module makes extensive use of pin multiplexing to accommodate the large number of peripheral
functions in the smallest possible package. To achieve this configuration, pin multiplexing is controlled
using a combination of hardware configuration (at module reset) and register control.
The board and software designers are responsible for the proper pin multiplexing configuration. Hardware
does not ensure that the proper pin multiplexing options are selected for the peripherals or interface mode
used. Table 4-2 and Table 4-2 describes the general pin attributes and presents an overview of pin
multiplexing. All pin multiplexing options are configurable using the pin MUX registers. The following
special considerations apply:
• All I/Os support drive strengths of 2, 4, and 6 mA. Drive strength is individually configurable for each
pin.
• All I/Os support 10-μA pullup and pulldown resistors.
• By default, all I/Os float in the Hibernate state. However, the default state can be changed by SW.
• All digital I/Os are non fail-safe.
NOTE
If an external device drives a positive voltage to the signal pads and the CC3235MODx
module is not powered, DC is drawn from the other device. If the drive strength of the
external device is adequate, an unintentional wakeup and boot of the CC3235MODx module
can occur. To prevent current draw, TI recommends any one of the following conditions:
• All devices interfaced to the CC3235MODx module must be powered from the same
power rail as the chip.
• Use level shifters between the device and any external devices fed from other
independent rails.
• The nRESET pin of the CC3235MODx module must be held low until the VBAT supply to
the module is driven and stable.
• All GPIO pins default to high impedance unless programmed by the MCU. The
bootloader sets the TDI, TDO, TCK, TMS, and Flash_SPI pins to mode 1. All the other
pins are left in the Hi-Z state.
The ADC inputs are tolerant up to 1.8 V (see Table 5-22 for more details about the usable
range of the ADC). On the other hand, the digital pads can tolerate up to 3.6 V. Hence, take
care to prevent accidental damage to the ADC inputs. TI recommends first disabling the
output buffers of the digital I/Os corresponding to the desired ADC channel (that is,
converted to Hi-Z state), and thereafter disabling the respective pass switches (S7 [Pin 47],
S8 [Pin 48], S9 [Pin 49], and S10 [Pin 50]). For more information, see Table 4-4.
Table 4-1 lists the pin descriptions of the CC3235MODx module.

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Table 4-1. Module Pin Descriptions
MODULE PIN TYPE(1) CC3235 DEVICE
PIN NO. MODULE PIN DESCRIPTION
NO. NAME
1 GND – – Ground
2 GND – – Ground
3 GPIO10 I/O 1 GPIO(2)
4 GPIO11 I/O 2 GPIO(2)
5 GPIO14 I/O 5 GPIO(2)
6 GPIO15 I/O 6 GPIO(2)
7 GPIO16 I/O 7 GPIO(2)
8 GPIO17 I/O 8 GPIO(2)
9 GPIO12 I/O 3 GPIO(2)
10 GPIO13 I/O 4 GPIO(2)
11 GPIO22 I/O 15 GPIO(2)
12 JTAG_TDI I/O 16 JTAG TDI input. Leave unconnected if not used on product(2)
13 FLASH_SPI_MISO I – External Serial Flash Programming: SPI data in
14 FLASH_SPI_nCS_IN I – External Serial Flash Programming: SPI chip select (active low)
15 FLASH_SPI_CLK I – External Serial Flash Programming: SPI clock
16 GND – – Ground
17 FLASH_SPI_MOSI O – External Serial Flash Programming: SPI data out
18 JTAG_TDO I/O 17 JTAG TDO output. Leave unconnected if not used on product(1)
19 GPIO28 I/O 18 GPIO(2)
21 JTAG_TCK I/O 19 JTAG TCK input. Leave unconnected if not used on product.(2)
An internal 100 kΩpull down resistor is tied to this pin.
22 JTAG_TMS I/O 20 JTAG TMS input. Leave unconnected if not used on product.(2)
23 SOP2 – 21 An internal 100 kΩpull down resistor is tied to this SOP pin. An external 10 kΩresistor is required to pull this pin high. See
Section 6.11.1 for SOP[2:0] configuration modes.
24 SOP1 – 34 An internal 100 kΩpull down resistor is tied to this SOP pin. An external 10 kΩresistor is required to pull this pin high. See
Section 6.11.1 for SOP[2:0] configuration modes.
25 GND – – Ground
26 GND – – Ground
27 GND – – Ground
28 GND – – Ground
29 GND – – Ground
30 GND – – Ground
31 RF_ABG I/O 31 2.4 GHz and 5 GHz RF input/output
32 GND – – Ground
34 SOP0 – 35 An internal 100 kΩpull down resistor is tied to this SOP pin. An external 10 kΩresistor is required to pull this pin high. See
Section 6.11.1 for SOP[2:0] configuration modes.
35 nRESET I 32 There is an internal, 100 kΩ, pull-up resistor option from the
nRESET pin to VBAT_RESET. Note: VBAT_RESET is not
connected to VBAT1 or VBAT2 within the module. The following
connection schemes are recommended:
• Connect nRESET to a switch, external controller, or host,
only if nRESET will be in a defined state under all operating
conditions. Leave VBAT_RESET unconnected to save
power.
• If nRESET cannot be in a defined state under all operating
conditions, connect VBAT_RESET to the main module
power supply (VBAT1 and VBAT2). Due to the internal pull-
up resistor a leakage current of 3.3 V / 100 kΩis expected.
36 VBAT_RESET – 37

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Terminal Configuration and Functions Copyright © 2019, Texas Instruments Incorporated
Table 4-1. Module Pin Descriptions (continued)
MODULE PIN TYPE(1) CC3235 DEVICE
PIN NO. MODULE PIN DESCRIPTION
NO. NAME
37 VBAT1 Power 39 Power supply for the module, must be connected to battery (2.3
V to 3.6 V)
38 GND – – Ground
40 VBAT2 Power 10, 44, 54 Power supply for the module, must be connected to battery (2.3
V to 3.6 V)
42 GPIO30 I/O 53 GPIO(2)
43 GND – – Ground
44 GPIO0 I/O 50 GPIO(2)
46 GPIO1 I/O 55 GPIO(2)
47 GPIO2 I/O 57 GPIO(2)
48 GPIO3 I/O 58 GPIO(2)
49 GPIO4 I/O 59 GPIO(2)
50 GPIO5 I/O 60 GPIO(2)
51 GPIO6 I/O 61 GPIO(2)
52 GPIO7 I/O 62 GPIO(2)
53 GPIO8 I/O 63 GPIO(2)
54 GPIO9 I/O 64 GPIO(2)
55 GND – – Thermal ground
56 GND – – Thermal ground
57 GND – – Thermal ground
58 GND – – Thermal ground
59 GND – – Thermal ground
60 GND – – Thermal ground
61 GND – – Thermal ground
62 GND – – Thermal ground
63 GND – – Thermal ground
(1) I = input; O = output; I/O = bidirectional
(2) For pin multiplexing details, see Table 4-2.

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Table 4-2. Pin Attributes and Pin Multiplexing
GENERAL PIN ATTRIBUTES FUNCTION PAD STATES
Pkg.
Pin Pin Alias Use Select as
Wakeup
Source
Config.
Addl.
Analog
Mux
Muxed
With
JTAG
Dig. Pin Mux
Config. Reg.
Dig.
Pin
Mux
Config.
Mode
Value
Signal Name Signal
Description Signal Direction LPDS(1) Hib(2) nRESET = 0
1 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
2 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
3 GPIO10 I/O No No No GPIO_PAD_ CONFIG_10
(0x4402 E0C8)
0 GPIO10 GPIO I/O Hi-Z, Pull,
Drive
Hi-Z,
Pull,
Drive Hi-Z
1 I2C_SCL I2C clock I/O (open
drain)
Hi-Z,
Pull,
Drive
3 GT_PWM06 Pulse-width
modulated O/P OHi-Z,
Pull,
Drive
7 UART1_TX UART TX data O 1
6 SDCARD_CLK SD card clock O 0
12 GT_CCP01 Timer capture port I Hi-Z, Pull,
Drive

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Table 4-2. Pin Attributes and Pin Multiplexing (continued)
GENERAL PIN ATTRIBUTES FUNCTION PAD STATES
Pkg.
Pin Pin Alias Use Select as
Wakeup
Source
Config.
Addl.
Analog
Mux
Muxed
With
JTAG
Dig. Pin Mux
Config. Reg.
Dig.
Pin
Mux
Config.
Mode
Value
Signal Name Signal
Description Signal Direction LPDS(1) Hib(2) nRESET = 0
4 GPIO11 I/O Yes No No GPIO_PAD_ CONFIG_11
(0x4402 E0CC)
0 GPIO11 GPIO I/O Hi-Z, Pull,
Drive
Hi-Z,
Pull,
Drive Hi-Z
1 I2C_SDA I2C data I/O (open
drain)
Hi-Z,
Pull,
Drive
3 GT_PWM07 Pulse-width
modulated O/P OHi-Z,
Pull,
Drive
4 pXCLK (XVCLK) Free clock to
parallel camera O 0
6 SDCARD_CMD SD card command
line I/O
(open
drain)
Hi-Z,
Pull,
Drive
7 UART1_RX UART RX data I Hi-Z, Pull,
Drive
12 GT_CCP02 Timer capture port I Hi-Z, Pull,
Drive
13 MCAFSX I2S audio port
frame sync OHi-Z,
Pull,
Drive
5 GPIO14 I/O No No No GPIO_PAD_ CONFIG_14
(0x4402 E0D8)
0 GPIO14 GPIO I/O
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive Hi-Z
5 I2C_SCL I2C clock I/O (open
drain)
7 GSPI_CLK General SPI clock I/O
4pDATA8
(CAM_D4) Parallel camera data bit 4 I
12 GT_CCP05 Timer capture port I

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Table 4-2. Pin Attributes and Pin Multiplexing (continued)
GENERAL PIN ATTRIBUTES FUNCTION PAD STATES
Pkg.
Pin Pin Alias Use Select as
Wakeup
Source
Config.
Addl.
Analog
Mux
Muxed
With
JTAG
Dig. Pin Mux
Config. Reg.
Dig.
Pin
Mux
Config.
Mode
Value
Signal Name Signal
Description Signal Direction LPDS(1) Hib(2) nRESET = 0
6 GPIO15 I/O No No No GPIO_PAD_ CONFIG_15
(0x4402 E0DC)
0 GPIO15 GPIO I/O
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive Hi-Z
5 I2C_SDA I2C data I/O (open
drain)
7 GSPI_MISO General SPI MISO I/O
4pDATA9
(CAM_D5) Parallel camera data bit 5 I
13 GT_CCP06 Timer capture port I
8SDCARD_
DATA0 SD card data I/O
7 GPIO16 I/O No No No GPIO_PAD_ CONFIG_16
(0x4402 E0E0)
0 GPIO16 GPIO I/O
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive Hi-Z
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
7 GSPI_MOSI General SPI MOSI I/O Hi-Z, Pull,
Drive
4pDATA10
(CAM_D6) Parallel camera data bit 6 IHi-Z,
Pull,
Drive
5 UART1_TX UART1 TX data O 1
13 GT_CCP07 Timer capture port I Hi-Z, Pull,
Drive
8 SDCARD_CLK SD card clock O Zero

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Table 4-2. Pin Attributes and Pin Multiplexing (continued)
GENERAL PIN ATTRIBUTES FUNCTION PAD STATES
Pkg.
Pin Pin Alias Use Select as
Wakeup
Source
Config.
Addl.
Analog
Mux
Muxed
With
JTAG
Dig. Pin Mux
Config. Reg.
Dig.
Pin
Mux
Config.
Mode
Value
Signal Name Signal
Description Signal Direction LPDS(1) Hib(2) nRESET = 0
8 GPIO17 I/O Yes No No GPIO_PAD_ CONFIG_17
(0x4402 E0E4)
0 GPIO17 GPIO I/O
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive Hi-Z
5 UART1_RX UART1 RX data I
7 GSPI_CS General SPI chip
select I/O
4pDATA11
(CAM_D7) Parallel camera data bit 7 I
8SDCARD_
CMD SD card command line I/O
9 GPIO12 I/O No No No GPIO_PAD_ CONFIG_12
(0x4402 E0D0)
0 GPIO12 GPIO I/O Hi-Z, Pull,
Drive
Hi-Z,
Pull,
Drive Hi-Z
3 McACLK I2S audio port
clock output OHi-Z,
Pull,
Drive
4 pVS (VSYNC) Parallel camera
vertical sync IHi-Z,
Pull,
Drive
5 I2C_SCL I2C clock I/O (open
drain)
Hi-Z,
Pull,
Drive
7 UART0_TX UART0 TX data O 1
12 GT_CCP03 Timer capture port I Hi-Z, Pull,
Drive
10 GPIO13 I/O Yes No No GPIO_PAD_ CONFIG_13
(0x4402 E0D4)
0 GPIO13 GPIO I/O
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive Hi-Z
5 I2C_SDA I2C data I/O (open
drain)
4 pHS (HSYNC) Parallel camera
horizontal sync I
7 UART0_RX UART0 RX data I
12 GT_CCP04 Timer capture port I

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Table 4-2. Pin Attributes and Pin Multiplexing (continued)
GENERAL PIN ATTRIBUTES FUNCTION PAD STATES
Pkg.
Pin Pin Alias Use Select as
Wakeup
Source
Config.
Addl.
Analog
Mux
Muxed
With
JTAG
Dig. Pin Mux
Config. Reg.
Dig.
Pin
Mux
Config.
Mode
Value
Signal Name Signal
Description Signal Direction LPDS(1) Hib(2) nRESET = 0
11 GPIO22 I/O No No No GPIO_PAD_ CONFIG_22
(0x4402 E0F8)
0 GPIO22 GPIO I/O Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive Hi-Z7 McAFSX I2S audio port
frame sync O
5 GT_CCP04 Timer capture port I
12 JTAG_TDI I/O No No Muxed
with
JTAG
TDI
GPIO_PAD_
CONFIG_23
(0x4402 E0FC)
1 TDI JTAG TDI. Reset
default pinout. IHi-Z,
Pull,
Drive Hi-Z,
Pull,
Drive Hi-Z
0 GPIO23 GPIO I/O
2 UART1_TX UART1 TX data O 1
9 I2C_SCL I2C clock I/O (open
drain)
Hi-Z,
Pull,
Drive
13 FLASH_ SPI_
MISO N/A N/A N/A N/A N/A N/A FLASH_SPI_MISO Data from SPI
serial Flash (fixed
default) N/A Hi-Z Hi-Z Hi-Z
14 FLASH_ SPI_
nCS_IN N/A N/A N/A N/A N/A N/A FLASH_SPI_nCS_
IN Chip select to SPI
serial Flash (fixed
default) N/A 1 Hi-Z,
Pull,
Drive Hi-Z
15 FLASH_
SPI_CLK N/A N/A N/A N/A N/A N/A FLASH_SPI_ CLK Clock to SPI serial
Flash (fixed
default) N/A Hi-Z,
Pull,
Drive (3)
Hi-Z,
Pull,
Drive Hi-Z
16 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
17 FLASH_ SPI_
MOSI N/A N/A N/A N/A N/A N/A FLASH_SPI_MOSI Data to SPI serial
Flash (fixed
default) N/A Hi-Z,
Pull,
Drive (3)
Hi-Z,
Pull,
Drive Hi-Z

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Table 4-2. Pin Attributes and Pin Multiplexing (continued)
GENERAL PIN ATTRIBUTES FUNCTION PAD STATES
Pkg.
Pin Pin Alias Use Select as
Wakeup
Source
Config.
Addl.
Analog
Mux
Muxed
With
JTAG
Dig. Pin Mux
Config. Reg.
Dig.
Pin
Mux
Config.
Mode
Value
Signal Name Signal
Description Signal Direction LPDS(1) Hib(2) nRESET = 0
18 JTAG_TDO I/O Yes No Muxed
with
JTAG
TDO
GPIO_PAD_
CONFIG_ 24
(0x4402 E100)
1 TDO JTAG TDO. Reset
default pinout. O
Hi-Z,
Pull,
Drive
Driven
high in
SWD;
driven
low in
4-wire
JTAG
Hi-Z
0 GPIO24 GPIO I/O
5 PWM0 Pulse-width
modulated O/P O
2 UART1_RX UART1 RX data I
9 I2C_SDA I2C data I/O (open
drain)
4 GT_CCP06 Timer capture port I
6 McAFSX I2S audio port
frame sync O
19 GPIO28 I/O No No No GPIO_PAD_ CONFIG_ 40
(0x4402 E140) 0 GPIO28 GPIO I/O Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive Hi-Z
20 NC WLAN
analog N/A N/A N/A N/A N/A NC Reserved N/A N/A N/A N/A
21 JTAG_TCK I/O No No
Muxed
with
JTAG/
SWD-
TCK
GPIO_PAD_
CONFIG_ 28
(0x4402 E110)
1 TCK JTAG/SWD TCK. Reset default
pinout. IHi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive Hi-Z
8 GT_PWM03 Pulse-width
modulated O/P O
22 JTAG_TMS I/O No No
Muxed
with
JTAG/
SWD-
TMSC
GPIO_PAD_
CONFIG_ 29
(0x4402 E114)
1 TMS JTAG/SWD TMS. Reset default
pinout. I/O Hi-Z, Pull,
Drive
Hi-Z,
Pull,
Drive Hi-Z
0 GPIO29 GPIO