Texas Instruments TPS73633EVM User manual

TPS73633EVM
April 2004 PMP Portable Power
User’s Guide
SLVU109

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Copyright 2004, Texas Instruments Incorporated

EVM IMPORTANT NOTICE
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:
This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION
PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided
may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective
considerations, including product safety measures typically found in the end product incorporating the goods.
As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic
compatibility and therefore may not meet the technical requirements of the directive.
Should this evaluation kit not meet the specifications indicated in the EVM User’s Guide, the kit may be returned
within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE
WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED,
IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY
PARTICULAR PURPOSE.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user
indemnifies TI from all claims arising from the handling or use of the goods. Please be aware that the products
received may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). Due to the open construction
of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic
discharge.
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE
TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not
exclusive.
TI assumes no liability for applications assistance, customer product design, software performance, or
infringement of patents or services described herein.
Please read the EVM User’s Guide and, specifically, the EVM Warnings and Restrictions notice in the EVM
User’s Guide prior to handling the product. This notice contains important safety information about temperatures
and voltages. For further safety concerns, please contact the TI application engineer.
Persons handling the product must have electronics training and observe good laboratory practice standards.
No license is granted under any patent right or other intellectual property right of TI covering or relating to any
machine, process, or combination in which such TI products or services might be or are used.
Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright 2004, Texas Instruments Incorporated

EVM WARNINGS AND RESTRICTIONS
It is important to operate this EVM within the input voltage range of 1.8 V and 6.0 V and the
output voltage range of 1.8 V and 6.0 V.
Exceeding the specified input range may cause unexpected operation and/or irreversible
damage to the EVM. If there are questions concerning the input range, please contact a TI
field representative prior to connecting the input power.
Applying loads outside of the specified output range may result in unintended operation and/or
possible permanent damage to the EVM. Please consult the EVM User’s Guide prior to
connecting any load to the EVM output. If there is uncertainty as to the load specification,
please contact a TI field representative.
During normal operation, some circuit components may have case temperatures greater than
100°C. The EVM is designed to operate properly with certain components above 100°C as
long as the input and output ranges are maintained. These components include but are not
limited to linear regulators, switching transistors, pass transistors, and current sense
resistors. These types of devices can be identified using the EVM schematic located in the
EVM User’s Guide. When placing measurement probes near these devices during operation,
please be aware that these devices may be very warm to the touch.
Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright 2004, Texas Instruments Incorporated

Related Documentation From Texas Instruments
v
Preface

About This Manual
This User’s Guide describes the characteristics, operation, and use of the
TPS73633EVM evaluation module (EVM). This EVM is designed to help the
user easily evaluate and test the operation and functionality of the TPS73633.
This User’s Guide includes setup instructions for the hardware, a schematic
diagram, a bill of materials (BOM), and PCB layout drawings for the evaluation
module.
How to Use This Manual
This document contains the following chapters:
-Chapter 1 — Introduction
-Chapter 2 — Setup
-Chapter 3 — Board Layout
-Chapter 4 — Schematic and Bill of Materials
Related Documentation From Texas Instruments
TPS73633 data sheet (SBVS038)
FCC Warning
This equipment is intended for use in a laboratory test environment only. It gen-
erates, uses, and can radiate radio frequency energy and has not been tested
for compliance with the limits of computing devices pursuant to subpart J of
part 15 of FCC rules, which are designed to provide reasonable protection
against radio frequency interference. Operation of this equipment in other en-
vironments may cause interference with radio communications, in which case
the user at his own expense will be required to take whatever measures may
be required to correct this interference.
If You Need Assistance. . .
Contact your local TI sales representative.

vi

Contents
vii

1 Introduction 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1 Background 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Performance Specification 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Modifications 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3.1 Fixed Output IC Operation 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3.2 Adjustable Output IC Operation 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Setup 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1 Input/Output Connector Descriptions EVM Connection 2-2. . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Setup 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 Board Layout 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1 Layout 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4 Schematic and Bill of Materials 4-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1 Schematic 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2 Bill of Materials 4-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Contents
viii

3−1 Assembly Layer 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−2 Top Layer Routing 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−3 Bottom Layer Routing 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−1 TPS73633EVM Schematic 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1−1 Performance Specification Summary 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−1 TPS73633EVM Bill of Materials 4-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1-1
Introduction

The Texas Instruments TPS73633DRB is a low dropout regulator (LDO) in a
3×3-mm QFN package that provides output currents of up to 500 mA. This IC
has an NMOS topology with a voltage-follower pass element that allows
operation with either low-ESR ceramic output capacitors or no output
capacitors at all.
Topic Page
1.1 Background 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Performance Specification 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Modifications 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 1

Background
1-2
1.1 Background
The TPS73633EVM uses the TPS73633DRB in a 3×3-mm QFN package to
provide 3.3 V at up to 500 mA. The EVM operates at full-rated performance
with an input voltage between 3.5 V and 5.5 V. Although the IC does not require
input or output capacitors, the EVM comes with these capacitors populated.
A 2.2-µF input capacitor ensures that the EVM is stable in laboratory setups
where the input supply is not located in close proximity to the EVM. The output
capacitor helps stabilize the output voltage for loads that are not physically
close to the EVM.
1.2 Performance Specification
Table 1−1 provides a summary of the TPS73633EVM performance
specifications. All specifications are given for an ambient temperature of 25°C
Table 1−1.Performance Specification Summary
Specification Test Conditions Min Typ Max Unit
Input voltage 3.5 5.5 V
Output voltage IO= 10 mA to 500 mA 3.267 3.3 3.333 V
Output current 0 500 mA
1.3 Modifications
The PWB for this EVM is designed to accommodate both the fixed and
adjustable versions of this IC. At the time the EVM was released, only the fixed
3.3-V version was available.
1.3.1 Fixed Output IC Operation
For use with a fixed-output IC, R1 must be open. R2 may either be left open
or populated with a noise-reduction capacitor. Placing a capacitor in the R2
position reduces noise that is generated by the internal bandgap reference
and produces a low-noise output. Typical noise-reduction capacitors range
from 1000 pF to 0.01 µF. See the TPS73633 data sheet for more information.
1.3.2 Adjustable Output IC Operation
For use with an adjustable output IC, R1 and R2 must be populated. These two
resistors are the feedback resistors that set the output voltage for the regulator.
See the TPS73633 data sheet for more information.

2-1
Setup

This chapter describes how to properly use the TPS73633EVM.
Topic Page
2.1 Input/Output Connector Descriptions EVM Connection 2-2. . . . . . . . . .
2.2 Setup 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 2

Input/Output Connector Descriptions EVM Connection
2-2
2.1 Input/Output Connector Descriptions EVM Connection
J1−VIN Positive input connection from the input supply
J2−GND Return connection from the input supply. Common with J4.
J3−VOUT Output voltage from the EVM
J4−GND Return connection from the load. Common with J2.
JP1−EN Enable jumper for the EVM.
Shorting EN to ON turns the EVM on.
Shorting EN to OFF turns the EVM off.
2.2 Setup
To operate the EVM, simply connect an input supply to the appropriate pins,
connect a load to the appropriate pins, and enable the EVM by shorting the EN
to ON on JP1.

3-1
Board Layout
 
This chapter provides the TPS73633EVM board layout and illustrations.
Topic Page
3.1 Layout 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 3

Layout
3-2
3.1 Layout
Figure 1−3 shows the board layout for the TPS73633EVM PWB.
Figure 3−1.Assembly Layer
Figure 3−2.Top Layer Routing
Figure 3−3.Bottom Layer Routing

4-1
Schematic and Bill of Materials
    
This chapter provides the TPS73633EVM schematic and bill of materials.
Topic Page
4.1 Schematic 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2 Bill of Materials 4-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 4

Schematic
4-2
4.1 Schematic
Figure 4−1.TPS73633EVM Schematic

Bill of Materials
4-3
Schematic and Bill of Materials
4.2 Bill of Materials
Table 4−1.TPS73633EVM Bill of Materials
Count Ref Des Description SIZE MFR Part Number
1C1 Capacitor, ceramic, 2.2 µF, 6.3 V, X5R, 10% 805 TDK C2012X5R0J225KT
1C2 Capacitor, ceramic, 1.0 µF, 6.3 V, X5R, 10% 603 TDK C3216X5R0J105KT
4J1−J4 Header, 2 pin, 100 mil spacing, (36-pin strip) 0.100 ×2 Sullins PTC36SAAN
1JP1 Header, 3 pin, 100 mil spacing, (36-pin strip) 0.100 ×3 Sullins PTC36SAAN
0R1, R2 Resistor, chip, xx Ω, 1/16 W 603
1U1 IC, Cap free, NMOS, 400 mA LDO regulator
with reverse current protection TI TPS73633DRB
1—PCB, 1.205 In ×0.925 In ×0.062 In Any HPA066
1—Shunt, 100 mil, black 0.100 3M 929950−00

4-4

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