Texas Instruments DS90UB949A-Q1EVM User manual

DS90UH949A-Q1EVM or DS90UB949A-Q1EVM
User's Guide
Literature Number: SNLU232A
August 2018–Revised May 2019

2SNLU232A–August 2018–Revised May 2019
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Contents
Contents
1 DS90UH949A-Q1EVM or DS90UB949A-Q1EVM User's Guide..................................................... 5
1.1 General Description ......................................................................................................... 5
1.2 Features....................................................................................................................... 6
1.3 System Requirements....................................................................................................... 6
1.4 Contents of the Demo Evaluation Kit ..................................................................................... 6
1.5 Applications Diagram........................................................................................................ 7
1.6 Typical Configuration........................................................................................................ 7
1.7 Quick Start Guide............................................................................................................ 8
1.8 Default Jumper Settings................................................................................................... 10
1.9 Default Switch Settings.................................................................................................... 10
1.10 Demo Board Connections................................................................................................. 11
1.11 ALP Software Setup ....................................................................................................... 14
1.11.1 System Requirements........................................................................................... 14
1.11.2 Download Contents.............................................................................................. 14
1.11.3 Installation of the ALP Software................................................................................ 14
1.11.4 Start-Up - Software Description ................................................................................ 15
1.11.5 Information Tab................................................................................................... 17
1.11.6 HDMI Tab ......................................................................................................... 18
1.11.7 Pattern Generator Tab........................................................................................... 19
1.11.8 Registers Tab..................................................................................................... 20
1.11.9 Registers Tab - Address 0x00 Selected ...................................................................... 21
1.11.10 Registers Tab - Address 0x00 Expanded ................................................................... 22
1.11.11 Scripting Tab .................................................................................................... 23
1.12 Troubleshooting ALP Software........................................................................................... 24
1.12.1 ALP Loads the Incorrect Profile ................................................................................ 24
1.12.2 ALP Does Not Detect the EVM................................................................................. 26
1.13 Typical Connection and Test Equipment................................................................................ 28
1.14 Equipment References .................................................................................................... 29
1.15 Cable References .......................................................................................................... 29
2 Bill of Materials .................................................................................................................. 30
A EVM PCB Schematics ......................................................................................................... 39
B Board Layout..................................................................................................................... 48
Revision History.......................................................................................................................... 57

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List of Figures
List of Figures
1-1. Applications Diagram........................................................................................................ 7
1-2. Typical Configuration........................................................................................................ 7
1-3. Interfacing to the EVM ...................................................................................................... 9
1-4. Launching ALP ............................................................................................................. 15
1-5. Initial ALP Screen .......................................................................................................... 16
1-6. Follow-Up Screen .......................................................................................................... 16
1-7. ALP Information Tab....................................................................................................... 17
1-8. ALP HDMI Tab.............................................................................................................. 18
1-9. ALP Pattern Generator Tab............................................................................................... 19
1-10. ALP Registers Tab......................................................................................................... 20
1-11. ALP Device ID Selected................................................................................................... 21
1-12. ALP Device ID Expanded ................................................................................................. 22
1-13. ALP Scripting Tab.......................................................................................................... 23
1-14. USB2ANY Setup ........................................................................................................... 24
1-15. Remove Incorrect Profile.................................................................................................. 24
1-16. Add Correct Profile......................................................................................................... 25
1-17. Finish Setup................................................................................................................. 25
1-18. ALP No Devices Error ..................................................................................................... 26
1-19. Windows 7, ALP USB Driver ............................................................................................. 26
1-20. ALP in Demo Mode ........................................................................................................ 27
1-21. ALP Preferences Menu.................................................................................................... 27
1-22. Typical Test Setup for Video Application................................................................................ 28
1-23. Typical Test Setup for Evaluation........................................................................................ 28
A-1. Schematic - Block Diagram............................................................................................... 39
A-2. Schematic - DS90UH949A-Q1 and Power Decoupling ............................................................... 40
A-3. Schematic - MSP430 ...................................................................................................... 41
A-4. Schematic - PDB, IDx and MODE_SEL Switches ..................................................................... 42
A-5. Schematic - HDMI, HSD, SMA, I2C, DDC, CEC and GPIO/I2S/SPI Connectors ................................. 43
A-6. Schematic - LEDs.......................................................................................................... 44
A-7. Schematic - Audio (Not Populated)...................................................................................... 45
A-8. Schematic - Power Regulators ........................................................................................... 46
A-9. Schematic - Hardware..................................................................................................... 47
B-1. Board Layer - Top Overlay................................................................................................ 48
B-2. Board Layer - Top Solder ................................................................................................. 49
B-3. Board Layer - Top.......................................................................................................... 50
B-4. Board Layer - Ground-1 ................................................................................................... 51
B-5. Board Layer - Signal Layer ............................................................................................... 52
B-6. Board Layer - Power Split/GND.......................................................................................... 53
B-7. Board Layer - Ground - 2 ................................................................................................. 54
B-8. Board Layer - Bottom...................................................................................................... 55
B-9. Board Layer - Bottom Solder ............................................................................................. 56

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List of Tables
List of Tables
1-1. Default Board Jumper Settings........................................................................................... 10
1-2. Default Board Switch Settings............................................................................................ 10
1-3. Power Supply............................................................................................................... 11
1-4. FPD-Link III Output Signals P1 (HSD Connector) ..................................................................... 11
1-5. Alternative SMA FPD-Link III Output Signals (Note: SMAs are Not Connected by Default From the
Factory) ..................................................................................................................... 11
1-6. HDMI Input Signals ........................................................................................................ 11
1-7. USB2ANY Connector...................................................................................................... 11
1-8. I2C/CCI Interface Header J25............................................................................................ 11
1-9. GPIO/Audio Interface...................................................................................................... 12
1-10. SPI/D_GPIO Interface ..................................................................................................... 12
1-11. MODE_SEL[1:0] Settings ................................................................................................. 12
1-12. Configuration Select (MODE_SEL0) -- SW-DIP8 - S2 ................................................................ 12
1-13. Configuration Select (MODE_SEL1) - SW-DIP8 - S6................................................................. 13
1-14. IDx SW-DIP8 - S3 ......................................................................................................... 13
2-1. Bill of Materials ............................................................................................................. 30

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DS90UH949A-Q1EVM or DS90UB949A-Q1EVM User's Guide
Chapter 1
SNLU232A–August 2018–Revised May 2019
DS90UH949A-Q1EVM or DS90UB949A-Q1EVM User's
Guide
1.1 General Description
The DS90Ux949A-Q1EVM (Evaluation Module) converts HDMI to FPD-Link III. This kit will demonstrate
the functionality and operation of the DS90Ux949A-Q1. The DS90Ux949A-Q1 is an HDMI to FPD-Link III
serializer which, in conjunction with the DS90Ux940-Q1/DS90Ux948-Q1 deserializers, takes the data from
HDMI serial stream and translates it into either single- or dual-lane FPD-Link III interface. The
DS90Ux949A-Q1 supports video resolutions up to 210 MHz for 3K (2880x1620) with 24-bit color depth.
The FPD-Link III interface supports video and audio data transmission and full duplex control, including
I2C and SPI communication, over the same differential link. In backward-compatible mode, the device
supports up to WXGA and 720p resolutions with 24-bit color depth over a single differential link.
The device supports up to 7.1 audio channels. Audio data received from the HDMI stream is encrypted,
serialized, and sent out on the FPD-Link III stream to a compatible deserializer. Up to 8-channel I2S
interface with maximum bit rate of 192 kHz.
The demo board is not intended for EMI testing. The demo board was designed for easy accessibility to
device pins with tap points for monitoring or applying signals, additional pads for termination, and multiple
connector options.
In this document:
1. The DS90UH949A-Q1EVM and DS90UB949A-Q1EVM devices are referred to as DS90Ux949A-
Q1EVM.
2. The DS90UH949A-Q1 and DS90UB949A-Q1 devices are referred to as DS90Ux949A-Q1.
3. The DS90UH926-Q1 and DS90UB926-Q1 devices are referred to as DS90Ux926-Q1.
4. The DS90UH928-Q1 and DS90UB928-Q1 devices are referred to as DS90Ux926-Q1.
5. The DS90UH948-Q1 and DS90UB948-Q1 devices are referred to as DS90Ux948-Q1.
6. The DS90UH940-Q1 and DS90UB940-Q1 devices are referred to as DS90Ux940-Q1.

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1.2 Features
• Supports pixel clock frequency up to 210 MHz for 3K (2880x1620) and 1080p60 resolutions with 24-bit
color depth
• HDMI receiver to accept HDMI as input
• Dual FPD-Link III output interface
– Single channel: up to 105-MHz pixel clock
– Dual channel: up to 210-MHz pixel clock
• Supports single-ended coaxial or differential shielded twisted-pair (STP/Q) cables
• Backward-compatible to DS90Ux926Q-Q1, DS90Ux928-Q1, DS90Ux940-Q1, and DS90Ux948-Q1
FPD-Link III deserializers
• @Speed BIST
• Supports 7.1 multiple I2S (4 data) channels
• Single +12-V power supply for EVM
• 1.8-V LVCMOS I/O interface
• 1.8-V or 3.3-V compatible LVCMOS I2C interface
• Automotive grade product: AEC-Q100 grade 2 qualified
1.3 System Requirements
To demonstrate, the following is required:
1. FPD-Link III compatible deserializer
1. DS90Ux940-Q1, DS90Ux948-Q1 up to 1080p60
2. DS90Ux926Q-Q1, DS90Ux928-Q1 up to 720p60
2. HDMI source
3. Optional I2C controller
4. 12-V power supply at approximately 1 A (required)
1.4 Contents of the Demo Evaluation Kit
1. One EVM board with the DS90Ux949A-Q1

DS90Ux949A
FPD-Link III
Deserializer
Video
Processor
Video Processor Board
Cluster, Head Unit
Dual FPD-LINK III
Display
HDMI
I2C
I2C
oLDI
FPD-Link III
2 Lane
VDDIO
1.8 V
IDx
DOUT0+
DOUT0-
1.1 V
IN_CLK-/+
HDMI
DDC
CEC
DOUT1+
DOUT1-
RIN0+
RIN0-
RIN1+
RIN1-
CLK+/-
CLK2+/-
oLDI
D0+/-
D1+/-
D2+/-
D3+/-
D4+/-
D5+/-
D6+/-
D7+/-
DS90Ux949A-Q1
Serializer DS90Ux948-Q1
Deserializer
IDx
D_GPIO
(SPI)
D_GPIO
(SPI)
LVDS Display
(2880x1080)
or Graphic
Processor
Graphics
Processor
IN_D0-/+
IN_D1-/+
IN_D2-/+
I2C
VDDIO
(3.3 V / 1.8 V)
3.3 V
I2C
1.25 V1.8 V
HDMI ±High Definition Multimedia Interface
HDCP* ±High-Bandwidth Content Protection
* Only on DS90UH devices
HPD
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1.5 Applications Diagram
Figure 1-1 and Figure 1-2 show the use of the chipset in a display application.
Figure 1-1. Applications Diagram
1.6 Typical Configuration
Figure 1-2. Typical Configuration

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1.7 Quick Start Guide
1. Configure switches S2, S3, and S6 to set the operating modes of the device
• S2: MODE_SEL0 = S2 switch position 1 = ON, all other switch positions = OFF (default factory
setting)
• S3: IDx = 0x18; S3 switch position 1 = ON, all other switch positions = OFF (default factory setting)
• S6: MODE_SEL1 = S6 switch ; position 1 = ON, all other switch positions = OFF (default factory
setting)
2. Connect P1 (DOUT[1:0]±) to the compatible deserializer (for example, the DS90Ux940-Q1EVM or
DS90Ux948-Q1EVM using a STP cable (default))
3. Connect J8 to 12 V.
a. Optional power options available (see Table 1-3)
4. Plug in the HDMI source
5. Connect J34 with the miniUSB cable to PC USB port (5-pin_ to USB A (4-pin))
For details of pin names and pin functions, see the DS90Ux949A-Q1 datasheet.

PDB
MOMENTARY (1)
APPLY
EXTERNAL
12V HERE
APPLY
HDMI
INPUT
HERE
DOUT0+
(option)
DOUT0-
(option)
DOUT1+
(option)
DOUT1-
(option)
MODE_SEL0 MODE_SEL1 IDx
34 30
2C
28 24 20
1C
18
8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1
DS90Ux949A
VDD_I2C
SCL
SDA
GND
VDD_DDC
DDC_SCL
DDC_SDA
GND (2)
(3)
(4)
(5)
Connect to PC for
I2C register access
I2C
Default
Configuration
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Figure 1-3. Interfacing to the EVM

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1.8 Default Jumper Settings
Ensure that the board has the default board jumper settings:
Table 1-1. Default Board Jumper Settings
Jumper Jumper Settings
J5 Connect 2 and 3
J9 Connect 2 and 3
J11 Connect 2 and 3
J12 Connect 2 and 3
J20 Connect 2 and 3
J23 Connect 2 and 3
J40 Connect 2 and 3
J41 Connect 2 and 3
1.9 Default Switch Settings
Ensure that the board has the default board switch settings:
Table 1-2. Default Board Switch Settings
Switch Switch Settings
S2 1 ON (silk screen L side), 2-8 OFF (silk screen H side)
S3 1 ON (silk screen L side), 2-8 OFF (silk screen H side)
S6 1 ON (silk screen L side), 2-8 OFF (silk screen H side)
S5 1-2 OFF (silk screen H side), 3-4 ON (silk screen L side)

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1.10 Demo Board Connections
Table 1-3. Power Supply
Designator Signal Description
J8 +12 V 12-V ±5% Main Power, Single +12-V power connector that supplies
power to the entire board.
J7.1 (Optional) +1.1 V 1.1-V ±5%, Alternative to Main Power. If used, remove R17.
J10.1 (Optional) +1.8 V 1.8-V ±5%, Alternative to Main Power. If used, remove R26.
J13.1 (Optional) +3.3 V 3.3-V ±5%, Alternative to Main Power. If used, remove R29.
J4.1 (Optional) +5 V 5-V ±5%, Alternative to Main Power. If used, remove R13.
Table 1-4. FPD-Link III Output Signals P1 (HSD Connector)
Designator Port Signal
P1.1 FPD-Link III Port 0 DOUT0–
P1.3 DOUT0+
P1.2 FPD-Link III Port 1 DOUT1–
P1.4 DOUT1+
Table 1-5. Alternative SMA FPD-Link III Output Signals
(Note: SMAs are Not Connected by Default From the Factory)
Designator Port Signal
J15 FPD-Link III Port 0 DOUT0–
J17 DOUT0+
J14 FPD-Link III Port 1 DOUT1–
J15 DOUT1+
Table 1-6. HDMI Input Signals
Designator Signal Description
J18.12
J18.10 IN_CLK- IN_CLK+ HDMI TMDS clock input
J18.9
J18.7 IN_D0- IN_D0+ HDMI TMDS data0 input
J18.6
J18.4 IN_D1- IN_D1+ HDMI TMDS data1 input
J18.3
J18.1 IN_D2- IN_D2+ HDMI TMDS data2 input
Table 1-7. USB2ANY Connector
Designator Description
J34 mini USB 5 pin
Table 1-8. I2C/CCI Interface Header J25
Designator Signal
J25.1 VDDI2C
J25.2 SCL
J25.3 SDA
J25.4 GND

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Table 1-9. GPIO/Audio Interface
Designator Signal Description
J26.18 SDIN/GPIO0 Aux I2S Data Input / Remote or Local I/O
J26.20 SWC/GPIO1 Aux I2S Word Clock Output / Remote or Local I/O
J26.2 I2S_DC/GPIO2 I2S Data Input / Remote or Local I/O
J26.4 I2S_DD/GPIO3 I2S Data Input / Remote or Local I/O
J26.8 I2S_DB/GPIO5_RE
GI2S Data Input / Local only I/O
J26.10 I2S_DA/GPIO6_RE
GI2S Data Input / Local only I/O
J26.12 I2S_WC/GPIO7_RE
GI2S Word Clock Input / Local only I/O
J26.14 I2S_CLK/GPIO8_RE
GI2S Clock Input / Local only I/O
J26.24 MCLK I2S System Clock Output
Table 1-10. SPI/D_GPIO Interface
Designator Signal Description
J26.32 D_GPIO3/SS I/O in Dual FPD-Link III mode / Slave Select
J26.30 D_GPIO2/SCLK I/O in Dual FPD-Link III mode / Serial Clock
J26.28 D_GPIO1/MISO I/O in Dual FPD-Link III mode / Master In, Slave Out
J26.26 D_GPIO0/MOSI I/O in Dual FPD-Link III mode / Master Out, Slave In
Configuration of the device may be done through the MODE_SEL[1:0]. These modes are latched into
register location during power up:
Table 1-11. MODE_SEL[1:0] Settings
Mode Setting Function
EDID_SEL: Display ID Select 0Look for remote EDID, if none found, use internal SRAM EDID. Can be
overridden from register. Remote EDID address may be overridden from
default 0xA0.
1 Use external local EDID.
AUTO-SS: Auto Sleep-State 0 Disable.
1 Enable.
AUX_I2S: AUX Audio
Channel 0 HDMI audio.
1 HDMI + AUX audio channel.
EXT_CTL: External Controller
Override 0 Internal HDCP/HDMI control.
1 External HDCP/HDMI control from I2C interface pins.
COAX: Cable Type 0 Enable FPD-Link III for twisted pair cabling.
1 Enable FPD-Link III for coaxial cabling.
REM_EDID_LOAD: Remote
EDID Load 0 Use internal SRAM EDID.
1 If available, remote EDID is copied into internal SRAM EDID.
(1) Only set one high.
Table 1-12. Configuration Select (MODE_SEL0) -- SW-DIP8 - S2(1)
MODE # EDID_SEL AUX_I2S
1 0 0
2 0 1
3 1 0
4 1 1

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(1) Only set one high.
Table 1-13. Configuration Select (MODE_SEL1) - SW-DIP8 - S6(1)
MODE # EXT_CTL COAX REM_EDID_LOAD
1 0 0 0
2 0 0 1
3 0 1 0
4 0 1 1
5 1 0 0
6 1 0 1
7 1 1 0
8 1 1 1
The strapped values can be viewed and/or modified in the following locations:
• EDID_SEL: Latched into BRIDGE_CTL[0], EDID_DISABLE (0x4F[0]).
• AUX_I2S: Latched into BRIDGE_CFG[1], AUDIO_MODE[1] (0x54[1]).
• EXT_CTL: Latched into BRIDGE_CFG[7], EXT_CONTROL (0x54[7]).
• COAX: Latched into DUAL_CTL1[7], COAX_MODE (0x5B[7]).
• REM_EDID_LOAD: Latched into BRIDGE_CFG[5] (0x54[5]).
(1) Only set one high.
Table 1-14. IDx SW-DIP8 - S3(1)
Designator 7-Bit Address 8-Bit Address
S3.1 (Default) 0x0C 0x18
S3.2 0x0E 0x1C
S3.3 0x10 0x20
S3.4 0x12 0x24
S3.5 0x14 0x28
S3.6 0x16 0x2C
S3.7 0x18 0x30
S3.8 0x1A 0x34

1 3 42 A
1 2 3 4 MINI
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1.11 ALP Software Setup
1.11.1 System Requirements
Operating System: Windows 7 64-bit
USB: USB2ANY
USB2ANY Firmware Version: 2.5.2.0
1.11.2 Download Contents
TI Analog LaunchPAD can be downloaded from: http://www.ti.com/tool/alp.
Download and extract the “snlc048.zip” file to a temporary location that can be deleted later.
Make sure J34 on the DS90Ux949A-Q1EVM is connected to a PC USB port with USB cable and power is
applied to the DS90Ux949A-Q1EVM.
The following installation instructions are for the Windows 7 64-bit Operating System.
1.11.3 Installation of the ALP Software
Execute the ALP Setup Wizard program called “ALPF_setup_v_x_x_x.exe” that was extracted to a
temporary location on the local drive of your PC.
There are 7 installation steps after the setup wizard starts:
1. Click the "Next" button in the ALP Setup Wizard to start the installation.
2. Select “I accept the agreement” and then click the “Next” button.
3. Select the location to install the ALP software and then click the “Next” button.
4. Select the location for the start menu shortcut and then click the “Next” button.
5. Create the desktop icon on the next screen. After selecting the desired choices, click the “Next” button.
6. Click the “Install” button to install the software in the selected location.
7. Uncheck “Launch Analog LaunchPAD” and click the “Finish” button. The ALP software can start if
“Launch Analog LaunchPAD” is checked, but it will not be useful until the USB driver is installed and
board is attached.
Connect the J34 USB jack of the DS90Ux949A-Q1EVM board to a PC or laptop USB port using a Type A
to mini-B USB cable. Power the DS90Ux949A-Q1EVM board with a 12-VDC
power supply to launch the “Found New Hardware Wizard” on the PC or laptop.

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1.11.4 Start-Up - Software Description
Make sure all the software has been installed and the hardware is powered on and connected to the PC.
Execute “Analog LaunchPAD” shortcut from the start menu. The default start menu location is under All
Programs →Texas Instruments →Analog LaunchPAD vx.x.x →Analog LaunchPAD to start
MainGUI.exe.
Figure 1-4. Launching ALP
The application should come up in the state shown in Figure 1-5. If it does not, see Section 1.12,
“Troubleshooting ALP Software”.
NOTE: The ALP window graphics in this document show "DS90UH949", and the document text
refers to the DS90Ux949. Replace the "DS90Ux949" text with "DS90UH949" if you have the
DS90UH949A-Q1EVM or "DS90UB949" if you have the DS90UB949A-Q1EVM.

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Under the Devices tab, select “DS90UH949” for the DS90UB949A-Q1EVM or "DS90UB949" for the
DS90UB949A-Q1EVM to open up the device profile with its associated tabs.
Figure 1-5. Initial ALP Screen
After selecting the DS90Ux949, the screen shown in Figure 1-6 should appear.
Figure 1-6. Follow-Up Screen

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1.11.5 Information Tab
The Information tab is shown in Figure 1-7. Note the device revision could be different.
Figure 1-7. ALP Information Tab

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1.11.6 HDMI Tab
The HDMI tab is shown in Figure 1-8.
Figure 1-8. ALP HDMI Tab

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1.11.7 Pattern Generator Tab
The SER Pattern Generator tab is shown in Figure 1-9.
Figure 1-9. ALP Pattern Generator Tab

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1.11.8 Registers Tab
The Registers tab is shown in Figure 1-10.
Figure 1-10. ALP Registers Tab