Texas Instruments TAS2563 User manual

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TAS2563YBGEVM-DC Evaluation module
User's Guide
SLAU800–January 2019
TAS2563YBGEVM-DC Evaluation module
This user’s guide describes the TAS2563 evaluation module (TAS2563YBGEVM-DC). The
TAS2563YBGEVM-DC allows for evaluation of the TAS2563 device with end products.
Contents
1 Export Control Notice ....................................................................................................... 2
2 Description ................................................................................................................... 2
3 Specifications ................................................................................................................ 2
4 Software ...................................................................................................................... 3
5 Device Configuration ....................................................................................................... 3
6 Digital Audio Interfaces ................................................................................................... 10
7 EVM Schematics .......................................................................................................... 11
8 EVM Layer Plots ........................................................................................................... 14
9 Bill of Materials ............................................................................................................. 20
List of Figures
1 Requesting PPC3 Access ................................................................................................. 3
2 Default Jumper Settings .................................................................................................... 4
3 Mono Setup................................................................................................................... 5
4 Windows Playback Devices................................................................................................ 6
5 Texas Instruments USB Audio Device Control Panel................................................................... 6
6 Windows Playback device Sample Rate ................................................................................. 7
7 Stereo Setup ................................................................................................................. 8
8 Windows Playback Devices................................................................................................ 9
9 Texas Instruments USB Audio Device Control Panel................................................................... 9
10 Windows Playback device Sample Rate................................................................................ 10
11 Mother Board Connections ............................................................................................... 11
12 Channel 1 ................................................................................................................... 12
13 Channel 2 ................................................................................................................... 13
14 TAS2563YBGEVM-DC Top Assembly ................................................................................. 14
15 TAS2563YBGEVM-DC Top Silk Screen ............................................................................... 14
16 TAS2563YBGEVM-DC Top Solder Mask .............................................................................. 14
17 TAS2563YBGEVM-DC Top Copper .................................................................................... 14
18 TAS2563YBGEVM-DC Copper Layer 2 ................................................................................ 15
19 TAS2563YBGEVM-DC Copper Layer 3 ................................................................................ 15
20 TAS2563YBGEVM-DC Copper Layer 4 ................................................................................ 16
21 TAS2563YBGEVM-DC Copper Layer 5 ................................................................................ 16
22 TAS2563YBGEVM-DC Bottom Copper ................................................................................ 17
23 TAS2563YBGEVM-DC Bottom Solder ................................................................................. 17
24 TAS2563YBGEVM-DC Bottom Silk Screen ........................................................................... 18
25 TAS2563YBGEVM-DC Bottom Assembly .............................................................................. 18
List of Tables
1 Specifications................................................................................................................. 2

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2 Default Jumper Settings .................................................................................................... 3
3 TAS2563YBGEVM-DC Bill of Materials................................................................................. 20
Trademarks
PurePath is a trademark of Texas Instruments.
Microsoft, Windows are registered trademarks of Microsoft Corporation.
All other trademarks are the property of their respective owners.
1 Export Control Notice
Recipient agrees to not knowingly export or re-export, directly or indirectly, any product or technical data
(as defined by the U.S., EU, and other Export Administration Regulations) including software, or any
controlled product restricted by other applicable national regulations, received from disclosing party under
nondisclosure obligations (if any), or any direct product of such technology, to any destination to which
such export or re-export is restricted or prohibited by U.S. or other applicable laws, without obtaining prior
authorization from U.S. Department of Commerce and other competent Government authorities to the
extent required by those laws.
2 Description
The TAS2563YBGEVM-DC is designed to demonstrate the performance of TAS2563 in a stereo
configuration. The design utilizes the PPC3-EVM-MB hardware to provide an interface and supply
voltages to the EVM. TAS2563 is a mono, digital-input, Class-D audio amplifier optimized for efficiently
driving high peak power into small loudspeaker applications. The Class-D amplifier is capable of delivering
6W of peak power into a 4 Ωload at a battery voltage of 4.2 V. Integrated speaker voltage and current
sense provides real time monitoring of loud speakers. Up to four devices can share a common bus via
I2S/TDM + I2C interfaces. TAS2563 also allows the user to generate speaker tuning profiles to achieve
optimal sound while actively providing protection against over temperature and over excursion events.
TAS2563YBGEVM-DC used in conjunction with PPC3-EVM-MB supports evaluation and development
with the TAS2563 device through the following interfaces:
• USB Interface
• Software control via PurePath™ TM Console 3 (PPC 3) GUI, USB-HID
• USB-class audio device, compatible with Microsoft®Windows®7+
• External 100 – mil headers
• PSIA - I2S/TDM interface
• I2C
• Hardware Shutdown Control
• Interrupt Output
NOTE: Please refer to PPC3-EVM-MB User’s Guide (SLEU120) for detailed configuration details.
3 Specifications
Table 1 lists the supply, input, and output requirements for TAS2563YBG.
Table 1. Specifications
Parameter Value
Supply Voltage - VBAT 2.7 to 5.5 V
Supply Voltage - VDD 1.65 to 1.95 V
Supply Voltage - PVDD (external mode olnly) VBAT to 16 V
Input Logic VDD
Output Power 6 W
USB, USB class-audio Micro-USB

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NOTE: PPC3-EVM-MB supports a VBAT range from 4.5 to 26 V. To apply a VBAT supply in the
range of 2.7 to 4.5 V, it is highly recommended to remove Jumpers J1 and J10 and to apply
this voltage directly to pin 2 of the respective header while simultaneously powering PPC3-
EVM-MB with 5 V. Otherwise it is possible that on-board supplies may collapse.
4 Software
The TAS2563 can be easily configured with PPC3 running the TAS2563 plug-in. To request access to the
software first request a myTI.com account here.
After creating an account, navigate to the TAS2563 product page and follow the link in the information box
to request access to the software.
Figure 1. Requesting PPC3 Access
5 Device Configuration
The default configuration for the TAS2563 is described below in Table 2 and Figure 2.
5.1 Default Jumper Settings
Table 2. Default Jumper Settings
Jumper Setting Description
J3 Remove Output 2 Sense
J11 Remove Output 1 Sense
J16 Insert EEPROM Write Protect
J18 I2C Control Select
J17 0x9A Ch 2 Address Select
J4 Insert VDD 2
J5 Insert IOVDD 2
J1 Insert VBAT 2
J9 - Data Remove PDM Data 2
J9 - CLK Remove PDM Clock 2
J8 - 2 Insert GPIO Select 2
J19 0x98 Ch 1 Address Select
J12 Insert VDD 1
J13 Insert IOVDD 1
J10 Insert VBAT 1
J15 - Data Remove PDM Data 1
J15 - CLK Remove PDM Clock 1
J8 -1 Insert GPIO Select 1

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Figure 2. Default Jumper Settings
5.2 Mono Setup
Use the following instructions to complete a mono setup:
1. Install PPC3 with the TAS2563 plug-in.
2. Connect a speaker to J14 on the TAS2563YBGEVM-DC.
3. Remove the jumpers at J1, J4, and J5 as shown in Figure 3.

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Figure 3. Mono Setup
4. Set the jumper at J19 to the desired I2C address as shown in .
5. Configure PPC3-EVM-MB as described in SLEU120.
• USB control for I2C
• USB control for I2S
• 3.3 V I2C
• 3.3 V I2S
• 1.8 V IOVDD
6. Connect a 5V supply to connector J12 or J11 on PPC3-EVM-MB

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7. Connect a Micro USB Cable from PC to PPC3-EVM-MB
8. Verify that TI USB Audio UAC2.0 is the default playback device by opening the sound dialog from the
Windows Control Panel
Figure 4. Windows Playback Devices
9. Set the maximum bit depth using the Texas Instruments USB Audio Device Control Panel found in the
system tray
Figure 5. Texas Instruments USB Audio Device Control Panel
10. Set the sampling rate
• Right click TI USB AUdio UAC2.0
• Select Properties
• Click advanced tab
• Select Rate

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Figure 6. Windows Playback device Sample Rate
11. Configure the device using the TAS2563 PPC3 Plug-in
5.3 Stereo Setup
Use the following instructions to complete a stereo setup:
1. Install PPC3 with the TAS2563 plug-in
2. Connect a speaker to both J14 and J6 on the TAS2563YBGEVM-DC
3. Set the jumpers at J19 and J17 to the unique I2C address as shown in

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Figure 7. Stereo Setup
4. Configure PPC3-EVM-MB as described in
• USB control for I2C
• USB control for I2S
• 3.3 V I2C
• 3.3 V I2S
• 1.8 V IOVDD
5. Connect a 5V supply to connector J12 or J11 on PPC3-EVM-MB
6. Connect a Micro USB Cable from PC to PPC3-EVM-MB

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7. Verify that TI USB Audio UAC2.0 is the default playback device by opening the sound dialog from the
Windows Control Panel
Figure 8. Windows Playback Devices
8. Set the maximum bit depth using the Texas Instruments USB Audio Device Control Panel found in the
system tray
Figure 9. Texas Instruments USB Audio Device Control Panel
9. Set the sampling rate
• Right click TI USB AUdio UAC2.0
• Select Properties
• Click advanced tab
• Select Rate

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Figure 10. Windows Playback device Sample Rate
10. Configure the device using the TAS2563 PPC3 Plug-in
6 Digital Audio Interfaces
Select the various digital audio interfaces on the TAS2563YBGEVM-DC through hardware settings and
software settings. Several headers on PPC3-EVM-MB allow access to the following digital audio signals:
• I2S Data out (SDOUT) from the TAS2563 (for example, current and voltage sense data)
• I2S Data in (SDIN) to the TAS2563
• I2S Word clock or frame sync (FSYNC)
• I2S Bit clock (SBCLK)
• I2C Clock (SCLK)
• I2C Data (SDA) The selection between USB (internal) and external inputs is set using the control
header on PPC3-EVM-MB.
Please refer to for detailed configuration settings.

IRQ1
CONTROL
I2C
SD
SCL
SDA
VBATVBAT
GND
1.8V
GND
DF2SE
<
>
>
>
SD
IRQ1
SCL
SDA
FSYNC
SBCLK1
>
<
>
SDIN1
<
<
>
>
>
>
GND
VSENSE2-
VSENSE2+
VSENSE1+
1.8V
VSENSE1-
10.0k
R7
>
IRQ2IRQ1 0R8
1 2
3 4
J8
GPIO SEL
GPIO2
GPIO1
GND
GND
GND
TP2
GND
TP3
GND
TP4
GND
GND
TP5
GND
3.3V
GND
SCL
SDA
GND
3
GND
5VCC
U4B
LVC1G125
GND
4
1
2
U4A
LVC1G125
GND
GND
C4
0.1µF
GND
0.1µF
C16
1
3
5
4
6
2
7
9
10
8
12 11
14 13
16 15
18 17
20 19
22 21
24 23
26 25
28 27
30 29
32 31
34 33
36 35
38 37
40 39
J2
Power/Analog
1
3
5
4
6
2
7
910
8
12 11
14 13
16 15
18 17
20 19
22 21
24 23
26 25
28 27
30 29
32 31
34 33
36 35
38 37
40 39
J7
MOSI
ASI/I2C/CONTROL
SPI
MISO
SCL
R13 10.0k
IOVDD
IOVDD
SS0
F
S
S
D
Y
I
N
N1
CASI1
SS1
MISO
MOSI
SS0
SS1
GPIO
SS0
GND
3
GND
B4
OE
1A
2
5VCC
U17
CBTLV1G125
GND 3
ADDR_SPICLK1
B4
OE
1A
2
5VCC
U15
1
CBTLV1G125
2
3
J18 SPI
I2C
I2C-SPI SEL
3.3V
GND
2 4
U16A
5VCC
SN74LVC1G14DCKR
GND 3 NC
1
U16B
SN74LVC1G14DCKR
I2C-EN
SPI-EN
3.3V
GND
I2C-EN
GND 3
SPII2C_MISO
B4
OE
1A
2
5VCC
U8
3
GND
CBTLV1G125
B4
OE
1A
2
5VCC
U7
CBTLV1G125
GND
I2C
I2C
SPI
SPI
MISO
SDA
3
GND
SDA_MOSI
B4
OE
1A
2
5VCC
U6
CBTLV1G125
IOVDD
3
GND
B4
OE
1A
2
5VCC
U5
CBTLV1G125
I2C
SPI
MOSI
GND 3
B4
OE
1A
2
5VCC
U14
GND 3
CBTLV1G125
B4
OE
1A
2
5VCC
U13
I2C
CBTLV1G125
SPI
SCL
SS1
GND 3
B4
OE
1A
2
5VCC
U12
CBTLV1G125
GND 3
ADDR_SPICLK2
B4
OE
1A
2
5VCC
U11
CBTLV1G125
I2C
SPI
3
GND
B4
OE
1A
2
5VCC
U10
3
GND
CBTLV1G125
B4
OE
1A
2
5VCC
U9
I2C
CBTLV1G125
SPI
IOVDD
GND
1 2
3 4
5 6
7 8
J19
ADDR1
10.0kR16
10.0kR17
IOVDD
GND
1 2
3 4
5 6
7 8
J17
ADDR2
10.0kR14
10.0kR15
CH2
CH2/1
CH1
SCL_SEL2
SCL_SEL1
GND
0.1µF
C43
3.3V
GND
0.1µF
C31
IOVDD
GND
0.1µF
C32
IOVDD
GND
0.1µF
C33
IOVDD
GND
0.1µF
C34
IOVDD
GND
0.1µF
C35
IOVDD
GND
0.1µF
C36
IOVDD
GND
0.1µF
C37
IOVDD
GND
0.1µF
C38
IOVDD
GND
0.1µF
C39
IOVDD
GND
0.1µF
C40
IOVDD
GND
0.1µF
C41
IOVDD
GND
0.1µF
C42
IOVDD
IOVDD
IOVDD
J16
WP
10.0k
R1
>SPICLK
SPICLK
GPIO
SPICLK
SPICLK
I2C-EN
I2C-EN
I2C-EN
I2C-EN
I2C-EN
SPI-EN
SPI-EN
SPI-EN
SPI-EN
SPI-EN
SPI-EN
I2C Mode Address Selection
I2C Mode Address Selection
0x9E
0x9C
0x9A
0x98*
SDOUT1
SDOUT1
S
S
D
D
O
O
U
U
T
T
2
2
-2
-1 ASI2
<
<
SDOUT2-1
SDOUT2-2
IOVDD
IOVDD IOVDD
100k
R25
GND
SBCLK1
0x9E
0x9C
0x9A*
0x98
*= Default Address
*= Default Address
5.6V
D1
VBAT
Over Voltage
Protection
GND
A0
1
2A1
3A2
4VSS 5
SDA
6
SCL
WP 7
8
VCC
U3
24FC512-I/ST
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7 EVM Schematics
Figure 11. Mother Board Connections

GND GND
GND
IOVDD1
C29
1µF
GND
1.8V
GNDGND GND
VBAT1
PVDD1
GREG1
DREG1
C17
0.1µF
PVDD1 TP6
1uH
L2
OUT1-
OUT-1P
OUT-1N
0R9
R10 0VDD1
DF2SE
VSENSE1-
VSENSE1+
J14
OUT1
C30
0.1µF
GND
GND
C25
1µF
GND
4.7uF
C23
GND
0.01uF
C22
GND
0.01uF
C24
1 2
3 4
J15
PDM1
GND
PCMCK1
PDMD1
SD
SDA_MOSI
SCL_SEL1
IOVDD
CONTROL SD
IRQ1
PVDD1
GND
0.01uF
C44
0R18
0R19
VSNS_N1
VSNS_P1
C46
1µF
GND
C47
1µF0
R22
C48
1µF0
R23
SDOUT1
SDOUT2-1
SDIN1
SCL_SEL1
SDA_MOSI
SPII2C_MISO
ADDR_SPICLK1
I2C/SPI
SPII2C_MISO
ADDR_SPICLK1
VBAT
J10
VBAT1
J12
VDD1
J13
IOVDD1
SW1
SDOUT2-2
SBCLK1
FSYNC
SDIN1
OUT1+
ASI2
SDOUT2-2
ASI1
C20 C21
GND
CONTROL
IRQ1
ASI1/ASI2
SDOUT1
SDOUT2-1
SBCLK1
FSYNC
GPIO1
J11
OUT1
GND
OUT1+
OUT1-
OUT1+
OUT1-
OUT1+
OUT1-
0
R11
0
R12
OUT1+
OUT1-
SNUBBER
OUT1+
OUT1-
AUX Connector
Address = 0x98
25V
C27
10µF
25V
C28
10µF
25V
C19
10µF
25V
C18
10µF
SBCLK1
16V
1µF
C26
PDMCK
A1
SW
F1
B2 SBCK1
B3 FSYNC
SDIN1
C2
B4 SCL_SEL
B5 SDA_MOSI
C3 SPII2C_MISO
SD
B1
G2 VBST
VBAT
D1
VDD
C6
G4 PVDD
D2 VBAT
C4 ADDR_SPICLK
GREG D4
SW
F2
SW
F3
G1 VBST
VBST
G3
PVDD
G5
G6 PVDD
SDOUT1 C1
GPIO D6
DREG B6
F5
OUT_P
OUT_N F6
D5
VSNS_P
D3
VSNS_N
GNDB E1
IRQ C5
GNDB E2
GNDB E3
GNDD E4
GNDP E5
GNDD F4
GNDP E6
PDMD
A2
A5 SBCLK2
SDOUT2 A3
SDIN2
A4
IOVDD
A6
U1
TAS2563YBG
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Figure 12. Channel 1

GND
C14
1µF
GREG2
DREG2
C15
0.1µF
IRQ2
PVDD2
GND
0.01uF
C45
OUT2-
CONTROL
IRQ2
ASI1/ASI2
SDOUT1
SDOUT2-2
SDOUT1
SDOUT2-2
OUT2+
GND GND
GND
1.8V
GNDGND GND
VBAT2
PVDD2
GND
GND
GNDGND
GND
GND
SD
IOVDD
CONTROL SD
SDIN1
SCL_SEL2
SDA_MOSI
SPII2C_MISO
ADDR_SPICLK2
SPII2C_MISO
VBAT
SDOUT2-1
SBCLK1
FSYNC
SDIN1
ASI2
ASI1
SDOUT2-1
C1
0.1µF
J1
VBAT2
SW2
1uH
L1
J4
VDD2
4.7uF
C8
0.01uF
C7
IOVDD2
VDD2
J5
IOVDD2
C10
1µF0.01uF
C9
1 2
3 4
J9
PDM2
PCMCK2
PDMD2
ADDR_SPICLK2
SDA_MOSI
SCL_SEL2
PVDD2 TP1
0
R5
0
R6 VSENSE2-
VSENSE2+
J3
OUT2
OUT-2P
OUT-2N
0R3
0R4
0R20
0R21
C49
1µF
C5 C6
C50
1µF0
R24
C51
1µF
0
R2
SBCLK1
FSYNC
Address = 0x9A
GPIO2
OUT2+
OUT2-
GND GND
VSNS_N2
VSNS_P2 OUT2+
OUT2-
DF2SE
AUX Connector
OUT2+
OUT2-
OUT2+
OUT2-
GND
SNUBBER
OUT2+
OUT2-
J6
OUT2
25V
C12
10µF
25V
C13
10µF
25V
C3
10µF
25V
C2
10µF
I2C/SPI
SBCLK1
16V
1µF
C11
PDMCK
A1
SW
F1
B2 SBCK1
B3 FSYNC
SDIN1
C2
B4 SCL_SEL
B5 SDA_MOSI
C3 SPII2C_MISO
SD
B1
VBST
G2
D1 VBAT
VDD
C6
PVDD
G4
VBAT
D2
C4 ADDR_SPICLK
D4
GREG
SW
F2
SW
F3
G1 VBST
VBST
G3
G5 PVDD
PVDD
G6
C1
SDOUT1
GPIO D6
DREG B6
OUT_P F5
F6
OUT_N
D5
VSNS_P
D3
VSNS_N
GNDB E1
IRQ C5
GNDB E2
GNDB E3
GNDD E4
GNDP E5
GNDD F4
GNDP E6
A2 PDMD
A5 SBCLK2
SDOUT2 A3
SDIN2
A4
IOVDD
A6
U2
TAS2563YBG
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Figure 13. Channel 2

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8 EVM Layer Plots
Figure 14. TAS2563YBGEVM-DC Top Assembly Figure 15. TAS2563YBGEVM-DC Top Silk Screen

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Figure 16. TAS2563YBGEVM-DC Top Solder Mask Figure 17. TAS2563YBGEVM-DC Top Copper

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Figure 18. TAS2563YBGEVM-DC Copper Layer 2 Figure 19. TAS2563YBGEVM-DC Copper Layer 3

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Figure 20. TAS2563YBGEVM-DC Copper Layer 4 Figure 21. TAS2563YBGEVM-DC Copper Layer 5

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Figure 22. TAS2563YBGEVM-DC Bottom Copper Figure 23. TAS2563YBGEVM-DC Bottom Solder

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Figure 24. TAS2563YBGEVM-DC Bottom Silk Screen Figure 25. TAS2563YBGEVM-DC Bottom Assembly

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20 SLAU800–January 2019
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TAS2563YBGEVM-DC Evaluation module
9 Bill of Materials
(1) Unless otherwise noted in the Alternate PartNumber and/or Alternate Manufacturer columns, all parts may be substituted with equivalents
Table 3. TAS2563YBGEVM-DC Bill of Materials
Designator Quantity Value Description Package
Reference Part Number Manufacturer Alternate Part Number(1) Alternate Manufacturer(1)
!PCB1 1 Printed Circuit
Board AMPS063 Any
C2, C3, C13, C18,
C19, C28 6 10µF CAP, TA, 10 µF,
25 V, ±10%, 2
ohm, SMD 3.2x1.7 mm F951E106KAAAQ2 AVX
C4, C15, C16,
C30, C31, C32,
C33, C34, C35,
C36, C37, C38,
C39, C40, C41,
C42, C43
17 0.1µF CAP, CERM, 0.1
µF, 25 V, ±10%,
X7R, AEC-Q200
Grade 1, 0402 0402 CGA2B3X7R1E10
4K050BB TDK
C8, C23 2 4.7µF CAP, CERM, 4.7 uF, 10 V, ±10%,
X5R, 0603 0603 CGB3B1X5R1A47
5K055AC TDK
C10, C14, C25,
C29 4 1µF CAP, CERM, 1 µF,
16 V, ±20%, X7R,
0603 0603 CL10B105MO8
NNWC Samsung
C11, C26 2 1µF CAP, CERM, 1 µF, 16 V, ±20%, X5R,
0402 0402 CL05A105MO5
NNNC Samsung Electro- Mechanics
J1, J3, J4, J5, J10,
J11, J12, J13, J16 9Header, 100 mil, 2x1, Gold, TH Sullins 100 mil,
1x2, 230 mil above
insulator PBC02 SAAN Sullins Connector
Solutions
J2, J7 2 Receptacle, 2.54 mm, 20x2, Gold,
TH Receptacle, 2.54
mm, 20x2, TH SSQ-120-23-G-D Samtec
J6, J14 2 Conn Term Block, 2POS, 3.81 mm,
TH 2POS Terminal
Block 1727010 Phoenix Contact
J8, J9, J15 3 Header, 2.54 mm,
2x2, Gold, TH Header, 2.54 mm, 2x2, TH PBC02DAAN Sullins Connector Solutions
J17, J19 2 Header, 100 mil,
4x2, Tin, TH Header, 4x2, 100 mil, Tin PEC04DAAN Sullins Connector Solutions
J18 1 Header, 100 mil,
3x1, Gold, TH PBC03 SAAN PBC03 SAAN Sullins Connector Solutions
L1, L2 2 1µH Inductor, Shielded,
Metal Composite, 1
µH, 3.3 A, 0.04 Ω,
SMD 2.5x1.2x2 mm DFE252012F-
1R0M = P2 MuRata Toko