Texas Instruments TPS546C23 User manual

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Using the Stacking TPS546C23 Two Phase Evaluation Module
User's Guide
SLUUBH5–November 2016
Using the Stacking TPS546C23 Two Phase Evaluation
Module
The TPS546C23EVM2-746 evaluation module (EVM) is a two phase buck converter with two TPS546C23
devices. The TPS546C23 device is a stackable synchronous buck with PMBus interface that can operate
from a nominal 4.5-V to 18-V supply. The device allows programming and monitoring via the PMBus
interface.
Two TPS546C23 devices are configured as two phase buck converter in factory default, output current is
evenly distributed in the two devices; both the negative and positive output terminals are connected
together.
Contents
1 Description.................................................................................................................... 3
1.1 Before You Begin................................................................................................... 3
1.2 Typical Applications ................................................................................................ 4
1.3 Features.............................................................................................................. 4
2 Electrical Performance Specifications..................................................................................... 5
3 Schematic..................................................................................................................... 5
4 Test Setup .................................................................................................................... 7
4.1 Test and Configuration Software ................................................................................. 7
4.2 Test Equipment ..................................................................................................... 7
4.3 Recommended Test Setup........................................................................................ 8
4.4 List of Test Points, Jumpers and Connectors................................................................... 9
5 EVM Configuration Using the Fusion GUI .............................................................................. 11
5.1 Configuration Procedure ......................................................................................... 12
6 Test Procedure ............................................................................................................. 12
6.1 Line and Load Regulation and Efficiency Measurement Procedure........................................ 12
6.2 Control Loop Gain and Phase Measurement Procedure .................................................... 12
6.3 Efficiency Measurement.......................................................................................... 13
7 Performance Data and Typical Characteristic Curves................................................................. 14
7.1 Efficiency ........................................................................................................... 14
7.2 Load Regulation................................................................................................... 14
7.3 Line Regulation.................................................................................................... 15
7.4 Transient Response............................................................................................... 15
7.5 Output Ripple ...................................................................................................... 16
7.6 Control On.......................................................................................................... 17
7.7 Control Off.......................................................................................................... 18
7.8 Current Sharing between two phases .......................................................................... 19
7.9 Control Loop Bode Plot........................................................................................... 19
7.10 Thermal Image..................................................................................................... 21
8 EVM Assembly Drawing and PCB Layout .............................................................................. 22
9 Bill of Materials ............................................................................................................. 31
10 Screenshots................................................................................................................. 33
10.1 Fusion GUI Screenshots ......................................................................................... 33
List of Figures
1 TPS546C23EVM2-746 Schematic ........................................................................................ 6
2 TPS546C23EVM2-746 EVM Recommended Test Set Up............................................................. 8

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3 Tip and Barrel Measurement............................................................................................... 8
4 Efficiency of 1.2-V Output vs Line and Load ........................................................................... 14
5 Load Regulation of 1.2-V Output......................................................................................... 14
6 Line Regulation of 1.2-V Output (Different Board)..................................................................... 15
7 Transient Response of 1.2-V Output at 12 VIN, Transient is 10 A to 60 A, 0.2 A/µs .............................. 15
8 Output Ripple and SW Node of 1.2-V Output at 12 VIN, 0-A Output................................................. 16
9 Output Ripple and SW Node of 1.2-V Output at 12 VIN, 70-A Output .............................................. 16
10 Start up from Control, 1.2-V Output at 12 VIN, 0-A Output (TON_RISE is modified to 5ms) ..................... 17
11 Start up from Control, 1.2-V Output at 12 VIN, 70-A Output (TON_RISE is modified to 5ms).................... 17
12 Soft Stop from Control, 1.2-V Output at 12 VIN, 0-A Output (TON_RISE is modified to 5ms) ................... 18
13 Soft Stop from Control, 1.2-V Output at 12 VIN, 70-A Output (TON_RISE is modified to 5ms).................. 18
14 Inductor Current and Switch Node Waveform, 1.2-V Output at 12 VIN, 70-A Output.............................. 19
15 Bode Plot at 1.2-V Output at 12 VIN, 0-A Output ...................................................................... 19
16 Bode Plot at 1.2-V Output at 12 VIN, 70-A Output...................................................................... 20
17 Thermal Image ............................................................................................................. 21
18 TPS546C23EVM2-746 EVM 3D Top View ............................................................................. 22
19 TPS546C23EVM2-746 EVM Top Layer Assembly Drawing (Top View) ........................................... 23
20 TPS546C23EVM2-746 EVM Bottom Assembly Drawing (Bottom View) ........................................... 24
21 TPS546C23EVM2-746 EVM Top Copper (Top View)................................................................. 25
22 TPS546C23EVM2-746 EVM Internal Layer 1 (Top View)............................................................ 26
23 TPS546C23EVM2-746 EVM Internal Layer 2 (Top View)............................................................ 27
24 TPS546C23EVM2-746 EVM Internal Layer 3 (Top View)............................................................ 28
25 TPS546C23EVM2-746 EVM Internal Layer 4 (Top View)............................................................ 29
26 TPS546C23EVM2-746 EVM Bottom Copper (Top View)............................................................. 30
27 Select Device Scanning Mode............................................................................................ 33
28 Configure- Limits and On/Off ............................................................................................ 35
29 ON/OFF Control Pop-up................................................................................................... 36
30 Configure - Advanced ..................................................................................................... 37
31 Configure - SMBALERT # Mask ......................................................................................... 38
32 Configure - Device Info.................................................................................................... 39
33 Configure - All Config...................................................................................................... 40
34 Monitor Screen with 10A total load ...................................................................................... 42
35 Status Screen............................................................................................................... 43
List of Tables
1 TPS546C23EVM2-746 Electrical Performance Specifications ........................................................ 5
2 Test Point Functions ........................................................................................................ 9
3 Jumpers ..................................................................................................................... 10
4 Connector Functions....................................................................................................... 10
5 Key Factory Configuration Parameters.................................................................................. 11
6 List of Test Points for Loop Response Measurements................................................................ 12
7 Test Points for Better Efficiency Measurements ....................................................................... 13
8 TPS546C23EVM2-746 Components List .............................................................................. 31

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Trademarks
All trademarks are the property of their respective owners.
1 Description
The TPS546C23EVM2-746 is a two phase buck converter with two stacked TPS546C23 devices. It uses a
nominal 12-V bus to produce a regulated 1.2-V output at up to 70 A of load current. The
TPS546C23EVM2-746 is designed to demonstrate stacking operation of the TPS546C23 in a two phase
low output voltage application while providing a number of test points to evaluate the performance of the
devices. The TPS546C23EVM2-746 can be modified to two separated single phase buck converters by
changing the components assembled. Refer to the TPS546C23 (SLUSCC7) datasheet for more
information on single-phase configuration.
1.1 Before You Begin
The following warnings and cautions are noted for the safety of anyone using or working close to the
TPS546C23EVM2-746. Observe all safety precautions.
Warning The TPS546C23EVM2-746 circuit module may become hot
during operation due to dissipation of heat. Avoid contact with
the board. Follow all applicable safety procedures applicable
to your laboratory.
Caution Do not leave the EVM powered when unattended.
WARNING
The circuit module has signal traces, components, and component
leads on the bottom of the board. This may result in exposed
voltages, hot surfaces or sharp edges. Do not reach under the
board during operation.
CAUTION
The circuit module may be damaged by over temperature. To avoid damage,
monitor the temperature during evaluation and provide cooling, as needed, for
your system environment.
CAUTION
Some power supplies can be damaged by application of external voltages. If
using more than 1 power supply, check your equipment requirements and use
blocking diodes or other isolation techniques, as needed, to prevent damage to
your equipment.
CAUTION
The communication interface is not isolated on the EVM. Be sure no ground
potential exists between the computer and the EVM. Also be aware that the
computer is referenced to the Battery- potential of the EVM.

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1.2 Typical Applications
• High-density power solutions
• Wireless infrastructure
• Switcher
• Router Network
• Server
• Storage
• Smart power systems
1.3 Features
• Regulated 1.2-V output up to 70-A DC steady-state output current
• The output voltage is marginable and trimmable via the PMBus interface
– Programmable UVLO, soft-start, and enable via the PMBus interface
– Programmable overcurrent warning and fault limits and programmable response to faults via the
PMBus interface
– Programmable overvoltage and undervoltage warning and fault limits and programmable response
to faults via the PMBus interface
– Programmable turn-on and turn-off delays
• Convenient test points for probing critical waveforms

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2 Electrical Performance Specifications
Table 1 lists the electrical performance specifications under room temperature 25°C.
(1) The output current IOUT can be up to 80 A, if the output overcurrent limit (IOUT_OC_FAULT_LIMIT) is set to 45 A.
(2) The efficiency is measured based on Figure 2 and test setups, which includes power loss caused by on board copper traces.
Table 1. TPS546C23EVM2-746 Electrical Performance Specifications
Parameter Test Conditions MIN TYP MAX Unit
Input Characteristics
Voltage range VIN 5 12 18 V
Maximum input current VIN = 12 V, IO= 70 A 8.5 A
No load input current VIN = 12 V, IO= 0 A 120 mA
Output Characteristics
Output voltage, VOUT 1.2 V
Output load current, IOUT(1) 0 70 A
Output voltage regulation Line Regulation: Input voltage = 5 V to 18 V 1%
Load Regulation: Output current = 0 A to 70 A 1%
Output voltage ripple, VOUT VIN = 12 V, IOUT = 70 A 10 mVpp
Output Over-current Protection
Threshold Load current IOUT1, default setting of U1 42 A
Load current IOUT2, default setting of U2 42 A
Systems Characteristics
Switching frequency VIN = 12 V 500 kHz
Full load efficiency, VOUT(2) VIN = 12 V, IOUT = 70 A, 86%
Operating temperature Tambient 25 °C
PMBUS Interface and Pin-Strapping
U1 PMBUS Address Programmed by R33 and R35 27 Decimal
U2 PMBus Address Programmed by R37 and R36 36
U1 Voltage reference Default setting of VOUT_COMMAND 600 mV
U2 Voltage reference Default setting of VOUT_COMMAND 600
U1 Soft-start time (TON_RISE) Default setting of TON_RISE 3 ms
U2 Soft-start time (TON_RISE) Default setting of TON_RISE 3
3 Schematic
Figure 1 illustrates the TPS546C23EVM2-746 EVM schematic.

22µF
C9
6800pF
C17
GND
0.1µF
C21
0
R4
SMBALRT
CLK_M
DATA_M
34.8k
R33
CNTL
0.1µF
C40
1µF
C1
RSP_S
RSN_S
49.9
R11
TP15TP14
330pF
C76
1.10k
R6
1200pF
C23
47uF
C47DNP
49.9
R45
49.9
R47
22µF
C10
10.0k
R10
1000pF
C25
47µF
C48
0
R2
TP42
TP9
TP19
34.8k
R35
TP7
10.0k
R25
0.1µF
C22
0
R5
SMBALRT
CLK_S
DATA_S
51.1k
R36
4.7µF
C34
1µF
C20
TP27
0
R3
TP20
51.1k
R37
10.0k
R24
6800pF
C8
6800pF
C7 100µF
C3
0
R29
JP2
5.11k
R27
TP43
22µF
C16
22µF
C15
MASTER SLAVE
47uF
C46DNP
1 2
3 4
5 6
7 8
9 10
J1
DATACLK
SMBALRTCNTL
PMBus
TP10
1
2
3
JP3
CNTL
1
2
3
JP4
JP5 JP6
10.0k
R7
22µF
C14
22µF
C12
GND
Green
LED1
1.00k
R1
TP40
RT
1
ADDR1
2
ADDR0
3
PMB_DATA
4
PMB_CLK
5
SMB_ALRT
6
BOOT 7
SW 8
SW 9
SW 10
SW 11
SW 12
PGND 13
PGND 14
PGND 15
PGND 16
PGND 17
PGND 18
PGND 19
PGND 20
PVIN
21
PVIN
22
PVIN
23
PVIN
24
PVIN
25
DRGND
26
BP3
27
BP6
28
AVIN
29
RESET/PGD
30
ISHARE 31
VSHARE 32
RSP 33
RSN 34
DIFFO
35
FB
36
COMP
37
AGND
38
SYNC
39
CNTL
40
PAD 41
U1 TPS546C23RVFR
RT 1
ADDR1 2
ADDR0 3
PMB_DATA 4
PMB_CLK 5
SMB_ALRT 6
BOOT
7
SW
8
SW
9
SW
10
SW
11
SW
12
PGND
13
PGND
14
PGND
15
PGND
16
PGND
17
PGND
18
PGND
19
PGND
20
PVIN 21
PVIN 22
PVIN 23
PVIN 24
PVIN 25
DRGND 26
BP3 27
BP6 28
AVIN 29
RESET/PGD 30
ISHARE
31
VSHARE
32
RSP
33
RSN
34
DIFFO 35
FB 36
COMP 37
AGND 38
SYNC 39
CNTL 40
PAD
41
U2 TPS546C23RVFR
TP41
VIN = 4.5 - 18 VDC
100µF
C4
GND
TP16 TP17 1.10k
R8
1200pF
C24
10.0k
R13
SYNC
SYNC
J5
TP8
GND
J6
J9
J4
47uF
C43DNP
47µF
C44
47µF
C45
TP4
DNP
4.7µF
C39 0.1µF
C35
GND GND
49.9
R44
49.9
R46
330pF
C56
RSP_M
RSN_M
RSP_M
RSN_M
RSP_S
RSN_S
TP31
TP37
TP32
TP38
1µF
C29
10.0k
R18
10.0k
R19
1µF
C30
TP21
DNP TP22 DNP
40.2k
R38
10.0k
R34
10.0k
R31
DNP
470µF
C73DNP
470µF
C72
470µF
C74
470µF
C75DNP
PVIN1
AVIN1
PVIN2
AVIN2
TP28DNP TP29
DNP
TP11 TP12
VOUT1 VOUT2
VOUT1 VOUT2
CHA1 CHB1
Avg1 Avg2
CLK TP3
DNP
CNTL TP1
DNP
TP2
DNP
DATA SMBA L RT
CHA2CHB2
VOUT1
RSP2
GND
GND
GND
VSHARE1 VSHARE2 ISHARE1 ISHARE2
TP25
RST/PG1
TP26
RST/PG2
TP30
DNP
RSP1
RSN1
TP36
DNP
300nH
L1
300nH
L2
100µF
C2
100µF
C5
PVin
VOUT_M VOUT_S
47uF
C63DNP
47µF
C64
47uF
C65DNP
47uF
C66DNP
47uF
C62DNP
47uF
C50DNP
47uF
C51DNP
47µF
C52
47uF
C53DNP
47µF
C49
22µF
C11
22µF
C13
47µF
C41
47uF
C42DNP
47uF
C54DNP
47µF
C55
6800pF
C19
6800pF
C18
6800pF
C6
0
R30 5.11k
R26
0
R50
0
R51
0
R48
0
R49
CLK_S
DATA_S
DATA_M
CLK_M
10.0k
R9
DNP
1.0
R22
1000pF
C26
1.0
R23
TP33
DNP
TP39
DNP
JP1
RSN2
Fsw = 500kHz Fsw = 500kHz
0.35-5.5V/35A max 0.35-5.5V/35A max
VOUT2
J8
1546
J10
J7
1546
J11
1
2
SMB3 DNP
1
2
SMB4
DNP
1
2
SMB1
DNP
1
2
SMB2
DNP
GND GND
GND GND
VSHARE1 VSHARE2
ISHARE2ISHARE1
VSHARE
ISHARE
49.9
R15
49.9
R16
J2
1546
J3
1546
VIN
10.0k
R32
DNP
40.2k
R39
10.0k
R28
DNP
2.2µF
C36
2.2µF
C38
2200pF
C27
270pF
C32
5.60k
R20
5.60k
R21
270pF
C31 2200pF
C28
49.9
R12
DNP
2.2µF
C33
2.2µF
C37
TP5 TP6
TP18
DNP
10.0k
R17
TP13
DNP
10.0k
R14
47uF
C60
47uF
C61DNP
47uF
C67DNP
47uF
C68
47uF
C57DNP
47uF
C58DNP
47uF
C59DNP
47uF
C69DNP
47uF
C70DNP
47uF
C71DNP
TP23
TP34
DNP
TP35
DNP
TP24
0R41
0
R43
0
R40
0
R42
Dual_RSN
Dual_RSP
Dual_RSN
Dual_RSP
Coupled Inductor
300nH
1 2
34
L3
DNP
SW1 SW2
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Figure 1. TPS546C23EVM2-746 Schematic

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4 Test Setup
4.1 Test and Configuration Software
In order to change any of the default configuration parameters on the EVM, it is necessary to obtain the TI
Fusion Digital Power Designer software.
4.1.1 Description
The Fusion Digital Power Designer is the graphical user interface (GUI) used to configure and monitor the
Texas Instruments TPS546C23 power converter installed on this evaluation module. The application uses
the PMBus protocol to communicate with the controller over serial bus by way of a TI USB adapter. This
adapter can be purchased at http://www.ti.com/tool/usb-to-gpio. (see ).
4.1.2 Features
Some of the tasks you can perform with the GUI include:
• Turn on or off the power supply output, either through the hardware control line or the PMBus
operation command.
• Monitor real-time data. Items such as output voltage, output current, die temperature, warnings and
faults which are continuously monitored and displayed by the GUI.
• Configure common operating characteristics such as VOUT trim and margin, UVLO, soft-start time,
warning and fault thresholds, fault response, and ON/OFF modes.
This software is available for download at this location:
http://www.ti.com/tool/fusion_digital_power_designer
4.2 Test Equipment
4.2.1 Voltage Source
The input voltage source VIN should be a 0-V to 20-V variable DC source capable of supplying 25 ADC.
Connect input VIN and GND to J2 and J3 as shown in Figure 2 and .
4.2.2 Multimeters
It is recommended to use two separate multi-meters as shown in Figure 2 and . One meter to measure
VIN, the other to measure VOUT.
4.2.3 Output Load:
A variable electronic load is recommended for the test setup as shown in Figure 2 or . The load should be
capable of 80 A.
4.2.4 Oscilloscope
An oscilloscope is recommended for measuring output noise and ripple. Output ripple should be measured
using a Tip-and-Barrel method or better as shown in Figure 3.
4.2.5 Fan:
During prolonged operation at high loads, it may be necessary to provide forced air cooling with a small
fan aimed at the EVM. The surface temperature of the devices on the EVM should be maintained below
105°C.
4.2.6 USB-to-GPIO Interface Adapter:
A communications adapter is required between the EVM and the host computer. This EVM was designed
to use the Texas Instruments USB-to-GPIO Adapter, see . This adapter can be purchased here:
http://www.ti.com/tool/usb-to-gpio.

Metal Ground
Barrel
Probe
Tip
Tip and Barrel VOUT Ripple
Measurement
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4.2.7 Recommended Wire Gauge
• Input VIN and GND to J2 and J3 (GND) (12-V input) – The recommended wire size is AWG #12, with
the total length of wire less than 2 feet (1 feet input, 1 feet return).
• Output J8/J7 and GND J10/J11 (0.9-V output) – The minimum recommended wire size is AWG #10,
with the total length of wire less than 2 feet (1 feet OUTPUT, 1 feet return).
4.3 Recommended Test Setup
Figure 2 and shows the recommended test setup.
Figure 2. TPS546C23EVM2-746 EVM Recommended Test Set Up
Figure 3 illustrates the tip and barrel measurement for switching node waveform on TP19 with TP23 or
TP20 with TP24.
Figure 3. Tip and Barrel Measurement

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4.4 List of Test Points, Jumpers and Connectors
Table 2 lists the test point functions.
Table 2. Test Point Functions
Test
Point Type Name Description
TP1 Not Assembled DATA DATA signal on J1 socket
TP2 Not Assembled SMB_ALERT SMBALERT signal on J1 socket
TP3 Not Assembled CNTL CNTL signal on J1 socket
TP4 Not Assembled CLK CLK signal on J1 socket
TP5 T-H Loop VIN VIN+ measurement point
TP6 T-H Loop GND VIN- measurement point
TP7 T-H Loop PVIN1 PVIN pin voltage of U1 device measurement point
TP8 T-H Loop PVIN2 PVIN pin voltage of U2 device measurement point
TP9 T-H Loop AVIN1 AVIN pin voltage of U1 device measurement point
TP10 T-H Loop AVIN2 AVIN pin voltage of U2 device measurement point
TP11 T-H Loop GND GND reference
TP12 T-H Loop GND GND reference
TP13 Not Assembled ADJ Analog input to adjust rail 2 output voltage
TP14 T-H Loop CHA1 Input for small signal loop gain measurements for output rail 1 (B/A setup)
TP15 T-H Loop CHB1 OUTPUT for small signal loop gain measurements for output rail 1 (B/A setup)
TP16 T-H Loop CHB2 OUTPUT for small signal loop gain measurements for output rail 2 (B/A setup)
TP17 T-H Loop CHA2 Input for small signal loop gain measurements for output rail 2 (B/A setup)
TP18 Not Assembled ADJ Analog input to adjust rail 1 output voltage
TP19 T-H Loop SW1 Switching node of output rail 1 measurement point, reference to TP23
TP20 T-H Loop SW2 Switching node of output rail 2 measurement point, reference to TP24
TP21 Not Assembled AVG1 Rail 1 switching node average voltage measurement point, reference to TP23
TP22 Not Assembled AVG2 Rail 2 switching node average voltage measurement point, reference to TP24
TP23 T-H Loop PGND1 GND reference for switching node measurement
TP24 T-H Loop PGND2 GND reference for switching node measurement
TP25 T-H Loop RST/RG1 PGOOD signal of output 1
TP26 T-H Loop RST/PG2 PGOOD signal of output 2
TP27 T-H Loop GND GND reference
TP28 Not Assembled EFF_VO1 U1 output voltage measurement point for efficiency, reference to TP34
TP29 Not Assembled EFF_VO2 U2 output voltage measurement point for efficiency, reference to TP35
TP30 Not Assembled RSP1 Output 1 remote sense + voltage point
TP31 T-H Loop +VOSENSE1 VOUT1+ measurement point
TP32 T-H Loop +VOSENSE2 VOUT2+ measurement point
TP33 Not Assembled RSP2 Output 2 remote sense + voltage point
TP34 Not Assembled EFF_GND1 Rail 1 output voltage referencing GND for efficiency measurement
TP35 Not Assembled EFF_GND2 Rail 1 output voltage referencing GND for efficiency measurement
TP36 Not Assembled RSN1 Output 1 remote sense - voltage point
TP37 T-H Loop –VOSENSE1 VOUT1– measurement point
TP38 T-H Loop –VOSENSE2 VOUT2– measurement point
TP39 Not Assembled RSN2 Output 2 remote sense - voltage point
TP40 T-H Loop Vshare2 VSHARE of U2 measurement point.Sensitive signal.
TP41 T-H Loop Ishare1 ISHARE of U1 measurement point.Sensitive signal.
TP42 T-H Loop Vshare1 VSHARE of U1 measurement point.Sensitive signal.
TP43 T-H Loop Ishare2 ISHARE of U2 measurement point. Sensitive signal.

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Table 3 lists the EVM jumpers.
Table 3. Jumpers
Jumper Type Name Description
JP1 Header, 100 mil, 2x1 SYNC2 Synchronization connection between U1 and U2. Jumper is plugged as
default.
JP2 Header, 100 mil, 2x1 SYNC1 Synchronization connection between U1 and U2. Jumper is plugged as
default.
JP3 Header, 100 mil, 3x1 CNTL1 PMBUS CNTL connection options for U1 to socket J1 or GND. Jumper
connecting U1 to J1 is plugged as default.
JP4 Header, 100 mil, 3x1 CNTL2 PMBUS CNTL connection options for U2 to socket J1 or GND. Jumper
connecting U2 to J1 is plugged as default.
JP5 Header, 100 mil, 2x1 ALERT1 PMBUS SMBALERT connection between U1 and socket J1. Jumper
connecting U1 to J1 is plugged as default.
JP6 Header, 100 mil, 2x1 ALERT2 PMBUS SMBALERT connection between U2 and socket J1. Jumper
connecting U2 to J1 is plugged as default.
Table 4 lists the EVM connector functions.
Table 4. Connector Functions
Connector Type Name Description
J1 Header, 100mil, 5x2 PMBUS PMBUS socket for TI FUSION adaptor
J2 Keystone 1546 VIN VIN+ connector
J3 Keystone 1546 GND VIN- (GND) connector
J8 Keystone 1546 VOUT1 VOUT1+ connector
J10 Keystone 1546 GND VOUT1- connector
J7 Keystone 1546 VOUT2 VOUT2+ connector
J11 Keystone 1546 GND VOUT2- connector

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5 EVM Configuration Using the Fusion GUI
The TPS546C23 on this EVM leave the factory pre-configured. See Table 5 for a short list of key factory
configuration parameters as obtained from the configuration file.
Table 5. Key Factory Configuration Parameters
ADDRESS HEX ADDRESS
DEC PART ID DESIGNATOR
0x33 27 TPS546C23 U1
0x44 36 TPS546C23 U2
GENERAL
CMD Code CMD CODE
HEX
ENCODED
HEX DECODED COMMENTS
VIN_OFF 0x36 0xF010 4.0 V Turn OFF voltage
VIN_ON 0x35 0xF012 4.5 V Turn ON voltage
IOUT_CAL_OFFSET 0x39 0xE000 0.0000 A Current offset for PMBUS readout
IOUT_OC_FAULT_LIMIT 0x46 0xF854 42 A OC fault level
IOUT_OC_FAULT_RESPONSE 0x47 0xFF Restart Response to OC fault
IOUT_OC_WARN_LIMIT 0x4A 0xF84A 37 A OC warning level
VOUT_COMMAND 0x21 0x0133 0.6 V Reference voltage
VOUT_MIN 0x2B 00B3h 0.35V minimum reference voltage
VOUT_MAX 0x24 0x034D 1.65 V maximum reference voltage
VOUT_TRANSITION_RATE 0x27 0xD03C 1 mV/us Vout transition rate
VOUT_SCALE_LOOP 0x29 0xF004 1 Output sense scaling ratio for main
control loop
PCT_OV_UV_WRN_FLT_LIMITS 0xD6 0x00
UV FAULT 83%
Output OV/UV Settings, reference to
nominal reference voltage.
UV WARN 88%
OV WARN 112%
OV FAULT 117%
VOUT_OV_FAULT_RESPONSE 0x41 0xBF Restart Output overvoltage fault response
VOUT_UV_FAULT_RESPONSE 0x45 0xBF Restart Output undervoltage fault response
ON_OFF_CONFIG 0x02 0x16 CNTL only, Active High. Control signal and operation
command
OPERATION 0x01 0x00 Operation is not used to
enable regulation Can be used to control device On/Off
OT_FAULT_LIMIT 0x4F 0x0091 145°C OT fault level
OT_WARN_LIMIT 0x51 0x0078 120°C OT warn level
OT_FAULT_RESPONSE 0x50 0x3F Ignore Response to over temperature faults
TON_DELAY 0x60 0x0000 0 ms Turn-on delay
TON_RISE 0x61 0x0003 3 ms Soft-start time
TON_MAX_FAULT_LIMIT 0x62 0x0000 Disabled Upper limit for Vout reaching
regulation
TOFF_DELAY 0x64 0x0000 0 ms Turn-off delay
TOFF_FALL 0x65 0x0000 0 ms Soft-stop fall time
If it is desired to configure the EVM to settings other than the factory settings shown above, the TI Fusion
Digital Power Designer software can be used for reconfiguration. It is necessary to have input voltage
applied to the EVM prior to launching the software so that the TPS546C23 may respond to the GUI and
the GUI can recognize the device. The default configuration for the EVM is to start converting at an input
voltage of 4.5V, therefore to avoid any converter activity during configuration, an input voltage less than
4.5 V should be applied. An input voltage of 4 V is recommended.

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5.1 Configuration Procedure
1. Adjust the input supply to provide 4 VDC, current limited to 1 A.
2. Apply the input voltage to the EVM. Refer to Figure 2 for connections and test setup.
3. Launch the Fusion GUI software. Refer to the screenshots in Section 10 for more information.
4. Configure the EVM operating parameters as desired.
By default, U1 is configured as loop master, U2 is configured as loop slave, PMBUS address for U1 is 27
decimal and for U2 is 36 decimal.
Both device can be configured or monitored through PMBUS interface at different address.
6 Test Procedure
6.1 Line and Load Regulation and Efficiency Measurement Procedure
1. Set up the EVM as described in Figure 2.
2. Ensure the electronic loads is set to draw 0 Adc.
3. Increase VIN from 0 V to 12 V using voltage meter to measure input voltage.
4. Use the other voltage meter to measure output voltage VOUT.
5. Vary the load from 0 to 70 Adc. VOUT should remain in regulation as defined in Table 1.
6. Vary VIN from 5 V to 18 V. VOUT should remain in regulation as defined in Table 1.
7. Decrease the load to 0 A.
8. Decrease VIN to 0 V.
6.2 Control Loop Gain and Phase Measurement Procedure
The TPS546C23EVM2-746 EVM includes a 49.9-Ωseries resistor in the feedback loop for VOUT . The
resistor is accessible at the test points TP14 / TP15 for loop response analysis. These test points should
be used during loop response measurements as the perturbation injecting points for the loop . See the
description in Table 6.
Table 6. List of Test Points for Loop Response Measurements
Test
Point Node Name Description Comment
TP14 CHA1 Input to feedback divider of
VOUT The amplitude of the perturbation at this node should be limited to less than 30 mV
TP15 CHB1 Resulting output of VOUT Bode can be measured by a network analyzer with a CH-B/CH-A configuration
Measure only one output at a time, with the following procedure:
1. Set up the EVM as described in Figure 2.
2. For VOUT, connect the network analyzer’s isolation transformer from TP14 to TP15,
3. Connect the input signal measurement probe to TP14. Connect the output signal measurement probe
to TP15.
4. Connect the ground leads of both probe channels to TP11.
5. On the network analyzer, measure the Bode as TP15/TP14 (Out/In).

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6.3 Efficiency Measurement
In order to evaluate the efficiency of the power train (device and inductor), it is important to measure the
voltages at the correct location. This is necessary because otherwise the measurements will include
losses that are not related to the power train itself. Losses incurred by the voltage drop in the copper
traces and in the input and output connectors are not related to the efficiency of the power train, which
should not be included in efficiency measurements.
Input current can be measured at any point in the input wires, and output current can be measured
anywhere in the output wires of the output being measured.
Table 7 shows the measurement points for input voltage and output voltage. VIN and VOUT are measured
to calculate the efficiency. Using these measurement points will result in efficiency measurements that
excluded losses due to the connectors and PCB traces.
Table 7. Test Points for Better Efficiency Measurements
Test
Point Node Name Description Comment
VOUT
TP7 PVIN1 Input voltage measurement
point for VIN1+ The pair of test points are connected to the PVIN/GND pins of U1. The voltage drop
between input terminal to the device pins is excluded for efficiency measurement.
TP23 PGND1 Input voltage measurement
point for VIN1- (GND)
TP28 Eff_Vo1 Output voltage measurement
point for VOUT1+ The pair of test points are connected to the closest points of Vout /GND to the inductor.
The voltage drop from the output point of inductor to the output terminals is excluded for
efficiency measurement.
TP34 Eff_GND1 Output voltage measurement
point for VOUT1- (GND)

Output Current (A)
Output Voltage (V)
0 10 20 30 40 50 60 70
1.194
1.195
1.196
1.197
1.198
1.199
1.2
1.201
1.202
1.203
1.204
1.205
1.206
D001
Input Voltage
5 V
12 V
18 V
Load Current (A)
Efficiency (%)
0 10 20 30 40 50 60 70
50
60
70
80
90
100
D001
Output Voltage
5 V
12 V
18 V
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7 Performance Data and Typical Characteristic Curves
Figure 4 through Figure 17 present typical performance curves for the TPS546C23EVM2-746 .
7.1 Efficiency
Figure 4. Efficiency of 1.2-V Output vs Line and Load
7.2 Load Regulation
Figure 5. Load Regulation of 1.2-V Output

Input Voltage (V)
Ouptut Voltage (V)
5 6 7 8 9 10 11 12 13 14 15 16 17 18
1.194
1.195
1.196
1.197
1.198
1.199
1.2
1.201
1.202
1.203
1.204
1.205
1.206
D001
Output Current
0 A
40 A
70 A
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7.3 Line Regulation
Figure 6. Line Regulation of 1.2-V Output (Different Board)
7.4 Transient Response
Ch1 = IOUT at 25 A/division, Ch3 = VOUT (AC coupled, measured at U1 side) at 50 mV/division, Ch4 = VOUT (AC
coupled, measured at U2 side) at 50 mV/division
Figure 7. Transient Response of 1.2-V Output at 12 VIN, Transient is 10 A to 60 A, 0.2 A/µs

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7.5 Output Ripple
Ch1 = VSW1 at 5 V/division, Ch2 = VSW2 at 5 V/division, Ch3 = VOUT (AC coupled, measured at U1 side) ripple at 10
mV/division, Ch4 = VOUT (AC coupled, measured at U2 side) ripple at 10 mV/division
Figure 8. Output Ripple and SW Node of 1.2-V Output at 12 VIN, 0-A Output
Ch1 = VSW1 at 5 V/division, Ch2 = VSW2 at 5 V/division, Ch3 = VOUT (AC coupled, measured at U1 side) ripple at 10
mV/division, Ch4 = VOUT (AC coupled, measured at U2 side) ripple at 10 mV/division
Figure 9. Output Ripple and SW Node of 1.2-V Output at 12 VIN, 70-A Output

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7.6 Control On
Ch1 = CNTL at 2 V/division, Ch2 = IOUT at 50 A/division, Ch3 = VOUT at 500 mV/division, Ch4 = PGOOD at 2 V/division
Figure 10. Start up from Control, 1.2-V Output at 12 VIN, 0-A Output (TON_RISE is modified to 5ms)
Ch1 = CNTL at 2 V/division, Ch2 = IOUT at 50 A/division, Ch3 = VOUT at 500 mV/division, Ch4 = PGOOD at 2 V/division
Figure 11. Start up from Control, 1.2-V Output at 12 VIN, 70-A Output (TON_RISE is modified to 5ms)

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7.7 Control Off
Ch1 = CNTL at 2 V/division, Ch2 = IOUT at 50 A/division, Ch3 = VOUT at 500 mV/division, Ch4 = PGOOD at 2 V/division
Figure 12. Soft Stop from Control, 1.2-V Output at 12 VIN, 0-A Output (TON_RISE is modified to 5ms)
Ch1 = CNTL at 2 V/division, Ch2 = IOUT at 50 A/division, Ch3 = VOUT at 500 mV/division, Ch4 = PGOOD at 2 V/division
Figure 13. Soft Stop from Control, 1.2-V Output at 12 VIN, 70-A Output (TON_RISE is modified to 5ms)

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7.8 Current Sharing between two phases
Ch1 = VSW1 at 5 V/division, Ch2 = VSW2 at 5 V/division, Ch3 = IL2 at 5 A/division, Ch4 = IL1 at 5 A/division
Figure 14. Inductor Current and Switch Node Waveform, 1.2-V Output at 12 VIN, 70-A Output
7.9 Control Loop Bode Plot
Figure 15. Bode Plot at 1.2-V Output at 12 VIN, 0-A Output

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Figure 16. Bode Plot at 1.2-V Output at 12 VIN, 70-A Output